change vmexit data array size according to vmexit dispatch_table size.
also add a size check to avoid array overflow.
Tracked-On: #7043
Signed-off-by: Minggui Cao <minggui.cao@intel.com>
Currently, in RTVM with multi vCPUs, lapic pass through is
configured, each vCPU works in x2apic mode. When one vCPU sends
IPI to all other vCPUs through writes ICR register with virtual
value 0x00000000000c00f8, this ICR writting will be intercepted,
the hypervisor passes destination shorthand field 11B (All Excluding
Self) in the virtual ICR value into physical ICR value during IPI
emulation, this IPI will be sent to each physical CPU core
in the platform according to 10.6.1 Interrupt Command Register (ICR),
Vol 3, SDM.
One vCPU in User VM with lapic pass through configuration can
send IPI with destination shorthand (10B or 11B) and any vector
(such as NMI or reboot vector) to other vCPUs, this IPI will sent
other VMs in the platform by hypervisor, this interference may
cause other VMs hang.
In this patch, set "Destination Shorthand" field of the
ICR value as 00B (No Shorthand) since the emulation is done
through sending IPI to each VCPU in dmask one by one.
Tracked-On: #6908
Signed-off-by: Xiangyang Wu <xiangyang.wu@intel.com>
Reviewed-by: Chen, Jason CJ <jason.cj.chen@intel.com>
If the MAX_MSIX_TABLE_NUM is specified in scenario.xml. Return the
largest number from count of MSI, table_size of MSIX or
MAX_MSIX_TABLE_NUM of scenario.xml.
Tracked-On: #6235
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
In current design, when pass-thru dev,
for the PIO bar, need to ensure the guest PIO start address
equals to host PIO start address.
Then set the VMCS io bitmap to pass-thru the corresponding
port io to guest for performance.
But malicious guest may reprogram the PIO bar,
then hv will pass-thru the reprogramed PIO address to guest.
This isn't safe behavior.
Here only pass-thru the host physical device PIO to guest.
If guest regrogram the PIO bar, just update the virtual bar only.
Currently, we don't support PIO bar reprogramming,
if guest reprogram the PIO bar, guest should take responsibility itself
When init the pass-thru dev PIO bars, set the VMCS io bitmap.
setup_io_bitmap is called before init pass-thru dev to
initiailize the io bitmap, so don't need to
call deny_guest_pio_access when deinit pass-thru dev.
v1 -> v2:
* set the VMCS io bitmap when init pass-thru devices
to migrate redoing allow_guest_pio_access()/deny_guest_pio_access().
Tracked-On: #6508
Signed-off-by: Liu,Junming <junming.liu@intel.com>
Customized environment variables are not inherited to child processes
created by the subprocess module. As a result the legacy board parser may
not be able to locate the prerequisite utilities if they can be found only
with the customized PATH.
This patch passes the PATH of cli.py to the legacy parser so that both
scripts use the same PATH to search for utilities.
This patch is added in v2 of the series.
Tracked-On: #6287
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
The length of the ACPI data entry in ve820 tab was 960K, while the
ACPI file is 1MB. It would cause ept unmapped fault when loading the
pre-launched VMs. This patch changes it to 1MB to fix the problem.
And the ACPI data length was missed when calculating
ENTRY_HPA1_LOW_PART2 length. Fixed here too.
The vACPI data and NVS entry size for pre-launched VM is currently
hard-coded. Add VIRT_ACPI_DATA_LEN and VIRT_ACPI_NVS_LEN to replace
them. And build connection with their starting address, too.
Tracked-On: #6507
Signed-off-by: Zhou, Wu <wu.zhou@intel.com>
Reviewed-by: Victor Sun <victor.sun@intel.com>
inj_guest_exp can be used to inject a virtual exception to a
specified vcpu of a vm. The command format is as follows:
inj_guest_exp <vm id, vcpu id, exception_num>
Tracked-On: #6468
Signed-off-by: Jian Jun Chen <jian.jun.chen@intel.com>
this feature is used to sample vmexit data per physical CPU
and per virtual CPU of VM, command used in HV console as following:
1. vmexit clear --> to clear current vmexit buffer
2. vmexit -->output current vmexit info
3. vmexit enable | disable, by default enabled.
Tracked-On: #5232
Signed-off-by: Minggui Cao <minggui.cao@intel.com>
The term PSRAM is now obsoleted and should be replaced with SSRAM, as has been
done by commit 9facbb43b3 ("config-tool: rename PSRAM to SSRAM"). However,
there are two places in the configuration toolset that still uses PSRAM. This
patch updates these missed occurrences accordingly.
Tracked-On: #6012
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
for core partition VM (like RTVM), PMC is always used for performance
profiling / tuning, so expose PMC capability and pass-through its MSRs
to the VM.
Tracked-On: #6307
Signed-off-by: Minggui Cao <minggui.cao@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
if one array just used in local only, and its size not used extern,
use ARRAY_SIZE macro to calculate its size.
Tracked-On: #6307
Signed-off-by: Minggui Cao <minggui.cao@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
ACRN does not support the variable range vMTRR. The default
memory type of vMTRR is UC. With this vMTRR emulation guest VM
such as Linux refuses to map the MMIO address space as WB. In
order to get better performance SHM BAR of ivshmem is mapped
with PAT ignored and memory type of SHM BAR is fixed to WB.
Tracked-On: #6389
Signed-off-by: Jian Jun Chen <jian.jun.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
"port->cb" in 'virtio_console_notify_tx()'
function maybe NULL when malicious inputs
are injected from virtio frondend in guest.
Tracked-On: #6388
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Add the MSI-X capability structure nodes under <capability
id="MSI-X"> in board.xml.
Example:
<capability id="MSI-X">
<table_size>16</table_size>
<table_bir>1</table_bir>
<table_offset>0x1000000</table_offset>
<pba_bir>1</pba_bir>
<pba_offset>0x0</pba_offset>
</capability>
Fix the MSI <count> nodes when there is only one vector.
Tracked-On: #6235
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
The PR 6236 has modified the board.xml format for MAX_MSIX_TABLE_NUM fix.
To compromise this PR, updates all the source file board.xmls.
Tracked-On: #6235
Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
The original use of recalc_checksum(eps->int_anchor, ...) may cause
an array bound overflow warning from code scanning tool. This patch
changes it to use offsetof to avoid using int_anchor directly.
Tracked-On: #6383
Signed-off-by: Yifan Liu <yifan1.liu@intel.com>
The debug uart of mmio@0xfe042000 has been switched to pci uart at 0:19.2,
so change the board file accordingly.
Tracked-On: #6348
Signed-off-by: Victor Sun <victor.sun@intel.com>
Currently the HV console does not support PCI UART with 64bit BAR, but in the
case that the BAR is in 64bit and the BAR space is below 4GB (i.e. the high
32bit address of the 64bit BAR is zero), HV should be able to support it.
Tracked-On: #6334
Signed-off-by: Victor Sun <victor.sun@intel.com>
The SMBIOS passthrough is supposed to work under UEFI environment.
Previous patches assumes UEFI environment but it may cause problems on
some platforms. This patch adds checking before probing SMBIOS table to
avoid this problem.
Tracked-On: #6345
Signed-off-by: Yifan Liu <yifan1.liu@intel.com>
According to PCIe Spec, for a RW register bits, If the optional feature
that is associated with the bits is not implemented, the bits are permitted
to be hardwired to 0b. However Zephyr would use INTx Line Register as writable
even this PCI device has no INTx, so emulate INTx Line Register as writable.
Tracked-On: #6330
Signed-off-by: Fei Li <fei1.li@intel.com>
Relocate ACPI address to 0x7fe00000 and ACPI NVS to 0x7ff00000 correspondingly.
In this case, we could include TPM event log region [0x7ffb0000, 0x80000000)
into ACPI NVS.
Tracked-On: #6320
Signed-off-by: Fei Li <fei1.li@intel.com>
If mmio resource is included in ACPI DATA e820 entry, it is will be
mapped to RAM first. Then pre-launched VM can't map mmio resource GPA
to its MMIO HPA.
Tracked-On: #6320
Signed-off-by: Tao Yuhong <yuhong.tao@intel.com>
The log area of TPM is typically placed as part of the ACPI data region in
e820. This patch follows this convention by adjusting how the virtual TPM
log area base address is allocated.
Tracked-On: #6320
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Enlarge the max size to store the PTCT/RTCT table to 1k bytes
because the size of RTCT table exceeded the original max size
0x1100 - 0xF00 which makes RTCT table overlap other ACPI tables.
Tracked-On: #6303
Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
Refine the arguments of bin_gen.py. The --board and --scenario take the
path to the XMLs as the argument. The allocation.xml is needed for
bin_gen.py to generate tpm2 acpi table.
Refine the condition of tpm2_acpi_gen. The tpm2 device "MSFT0101" can be
present in device id or compatible_id(CID). Check both attributes and
child node of tpm2 device.
Tracked-On: #6320
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
In addition to the mandatory _HID (Hardware ID), the ACPI spec also defines
an optional _CID (Compatible ID) object for device identification.
This patch enhances the ACPI extractor by parsing the _CID objects of devices as
well.
Tracked-On: #6320
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
This patch passthrough native SMBIOS information to prelaunched VM.
Currently this is enabled by default, the config-tool switch will be
added later.
Tracked-On: #6320
Signed-off-by: Yifan Liu <yifan1.liu@intel.com>
Create virtual acpi table of tpm2 based on the raw data if the tpm2
device is presented and the passthrough tpm2 is enabled.
Tracked-On: #6320
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
If passthrugh TPM2 is enabled and the log area is present, allocates
the log_area_start_address with the size log_area_minimum_length(256K).
Tracked-On: #6320
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
Create python script tpm2 which parse the tpm2 acpi table datas. Add
this parsed data to the <device id="MSFT0101" description="TPM 2.0 Device"> of board.xml.
Tracked-On: #6320
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
It is seen occasionally that a memory/port BAR of a PCI device is
programmed with the address 0 which is clearly invalid. This patch
gracefully handles this case by printing an error to warn the users that
this device cannot be passed through to any VM.
Tracked-On: #6298
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
According to section 19 of ACPI spec 6.4, the following clauses open name
scopes (in addition to the Scope clauses).
- Function
- Device
- Method
- Power Resource
- Thermal Zone
The current AML parser only opens a scope when parsing DefMethod and
DefDevice, however. This patch fixes the AML parsing by opening a scope on
visiting a DefPowerRes or DefThermalZone clause.
Note: Functions in ASL are equivalent to Methods at AML level.
Tracked-On: #6298
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
The current ConditionallyUnregisterSymbolVisitor has the following two
issues.
1. The visitor will crash when a DefIfElse node is not fully parsed due
to failed deferred expansion.
2. Nested DefIfElse of disabled blocks are still checked and one of its
branch may still take effect.
This patch fixes those issues by checking the predicates of a DefIfElse
block only when conditionally_hidden is False and check existence of
TermList and DefElse clauses.
Tracked-On: #6298
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
When parsing a sequence of clauses, it is not necessary to peek an opcode
from the current stream unless that sequence starts with one. Peeking an
opcode is even an error when the actual clause is empty (e.g. as a
TermList).
This patch makes the SequenceFactory only peeking at the next opcode when
the grammar expects one.
Tracked-On: #6298
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
This patch refines the AML parser to improve its readability and
performance in the following ways.
1. A Tree object now has the parts of the corresponding object being
member fields. As an example, a Tree with label `DefMethod` now has
members `NameString`, `MethodFlags` and `TermList`.
2. It is now possible to assign names each part of an object. The grammar
is updated to assign different names to the parts with the same type
in the same object.
Tracked-On: #6298
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
The current ACPI AML parser can generate incorrect AST if a DSDT/SSDT
satisfies the following:
1. The body of a method invokes a NameString that is defined later.
2. Before the method that NameString is also defined but in an outer
scope and with a different number of parameter.
Since method bodies hardly define any further symbol that is referenced
outside the method itself, this patch forces the parsing of method bodies
to be deferred to the second pass when all symbols have been declared.
Tracked-On: #6298
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
The current implementation of I/O buffers have the following issues.
1. I/O buffers are filled with values on creation. This may be fine for
memory-mapped I/O regions, but could be a problem to port I/O regions
and indexed I/O regions.
2. While not commonly seen, it IS witnessed that some devices only allow
its MMIO registers to be accessed with certain width. Accessing such
registers with a larger width will not be handled by the device,
causing SW to get all 1's rather than the actual values in these
registers.
This patch resolves the issues above as follows. I/O buffers now do not
access any register on creation. Instead, the register is accessed only
upon requests. Also the access width of these registers are followed to
ensure that the registers are accessed properly.
Tracked-On: #6298
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
DefDevide is now enountered when interpreting host DSDT/SSDT. This patch
implements the interpretation.
Tracked-On: #6298
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
The current implementation of the AML interpreter continues interpreting a
method after meeting a DefReturn object, which is incorrect. This patch
fixes this issue.
Tracked-On: #6298
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
If TPM device is passthrough to pre-launched VM, need check its
start method and event log settings in native TPM2 ACPI table.
Because when connect different TPM devices, TPM start method can
change in native ACPI table. And event log address change in native
ACPI table is expected by BIOS updating. Need fixup pre-launched
VM's ACPI table and vm_config if they are misaligned with native
platform. We add acrn_vm_fixup() in prepare_vm(), where the acrn_vm
structure is not created. This is suitable for checking between
vm_config and HW real configurations, and try fixup for native ACPI
updating.
Tracked-On: #6320
Signed-off-by: Tao Yuhong <yuhong.tao@intel.com>
