ACRN hypervisor always print CPU microcode update
warning message on KBL NUC platform, even after
BIOS was updated to the latest.
'check_cpu_security_cap()' returns false if
no ARCH_CAPABILITIES MSR support on current platform,
but this MSR may not be available on some platforms.
This patch is to remove this pre-condition.
Tracked-On: #3317
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Reviewed-by: Jason CJ Chen <jason.cj.chen@intel.com>
1. reset polarity of ptirq_remapping_info to zero.
this help to set correct initial pin state, and fix the interrupt lost issue
when assign a ptirq to uos.
2. since vioapic_generate_intr relys on rte, we should build rte before
generating an interrput, this fix the redundant interrupt.
Tracked-On: #3362
Signed-off-by: Cai Yulong <yulongc@hwtc.com.cn>
Add dsdt information for i2c adapter and i2c slave devices. Currently,
only support 'cam1', 'cam2' and 'hdac' for MRB board. To add other
specific i2c device, please extend acpi_node_table[].
Usage:
virtio-i2c,<bus>[:<slave_addr>[@<node>]][:<slave_addr>[@<node>]]
[,<bus>[:<slave_addr>[@<node>]][:<slave_addr>][@<node>]]
e.g.
virtio-i2c,0:70@cam1:2F
This will add slave devices 0x70, 0x74 to virtio i2c adapter.
And for 0x70, it has '@cam1', so, will also add acpi info for
it. For 0x74, it has no '@<node>', will not add any acpi info
for it.
Note, there is slave address in acpi node info, please use '@<node>'
according to real hardware.
Tracked-On: #3357
Signed-off-by: Conghui Chen <conghui.chen@intel.com>
Reviewed-by: Yuan Liu <yuan1.liu@intel.com>
Reviewed-by: Shuo A Liu <shuo.a.liu@intel.com>
Acked-by: Wang Yu <yu1.wang@intel.com>
Create a new thread for virtio-i2c to process i2c msg from FE. After
receive the msg, BE will dispatch it to corresponding native adapter,
after the process done, it will kick the FE.
Tracked-On: #3357
Signed-off-by: Conghui Chen <conghui.chen@intel.com>
Reviewed-by: Yuan Liu <yuan1.liu@intel.com>
Reviewed-by: Shuo A Liu <shuo.a.liu@intel.com>
Acked-by: Wang Yu <yu1.wang@intel.com>
Add backend interface for virtio-i2c, it will parse the parameters,
maintain the info for native i2c device, remap the slave address and
dispatch the requirement from FE. When there is only one native adapter,
will not remap the slave address.
Usage for virtio-i2c:
virtio-i2c,<bus>[:<slave_addr>][:<slave_addr>]
[,<bus>[:<slave_addr>][:<slave_addr>]]
e.g.
1. virtio-i2c,4:1C
SOS:
mount /dev/i2c-4, slave addr is 0x1C.
Guest OS:
/dev/i2c-x
|- 0x1C
2. virtio-i2c,4:1C:2F,6:70
SOS:
/dev/i2c-4, slave addr 0x1C and 0x2F
/dev/i2c-6, slave addr 0x70
Guest OS:
/dev/i2c-x
|- 0x1C
|- 0x2F
|- 0x70
Tracked-On: #3357
Signed-off-by: Conghui Chen <conghui.chen@intel.com>
Reviewed-by: Yuan Liu <yuan1.liu@intel.com>
Reviewed-by: Shuo A Liu <shuo.a.liu@intel.com>
Acked-by: Wang Yu <yu1.wang@intel.com>
Add virtio i2c adapter BE driver.
Tracked-On: #3357
Signed-off-by: Conghui Chen <conghui.chen@intel.com>
Reviewed-by: Yuan Liu <yuan1.liu@intel.com>
Reviewed-by: Shuo A Liu <shuo.a.liu@intel.com>
Acked-by: Wang Yu <yu1.wang@intel.com>
According to SDM, xsetbv writes the contents of registers EDX:EAX into the 64-bit
extended control register (XCR) specified in the ECX register. (On processors
that support the Intel 64 architecture, the high-order 32 bits of RCX are ignored.)
In current code, RCX is checked, should ingore the high-order 32bits.
Tracked-On: #3360
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Reviewed-by: Yonghua Huang <yonghua.huang@intel.com>
- check input by condition check, instead of assert.
- remove redundant header file including for some files.
Tracked-On: #3252
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Reviewed-by: Shuo Liu <shuo.a.liu@intel.com>
Rename vbdf to bdf for the following reasons:
Use the same coding style as struct pci_pdev, as pci_pdev uses bdf instead of pbdf
pci_vdev implies the its bdf is virtual, no need to prefix bdf with the v
prefix (redundant)
Tracked-On: #3241
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
For PIO bar emulation, initially or when guest reprograms the PIO bar, allow guest
access for the specified bar base address (pio port) and sized by calling vev_pt_allow_io_vbar
For PIO bar emulation, just set the initial vbar base address equal to pbar
base address. For example, if the pbar base address is 0x2000, then set the
initial vbar base address also to 0x2000
Tracked-On: #3241
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
For sos, its vbar base address is set to pbar base address (vbar gpa = pbar
hpa)
For pre-launched VMs, vbar base address is pre-assigned in vm_config
Rename vdev_pt_remap_msix_table_bar to vdev_pt_remap_msix_table_vbar and make it
a static function
Remove unused function prototye vdev_pt_remap_msix_table_bar() in vpci_priv.h
Tracked-On: #3241
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
Enable 64-bit bar emulation, if pbar is of type PCIBAR_MEM64, vbar will also be
of type PCIBAR_MEM64 instead of PCIBAR_MEM32
With 64-bit bar emulation code in place, we can remove enum pci_bar_type type
from struct pci_bar as bar type can be derived from struct pci_bar's reg member
by using the pci_get_bar_type function
Rename functions:
pci_base_from_size_mask --> git_size_masked_bar_base
Remove unused functions
Tracked-On: #3241
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
The current implement will trigger shutdown vm request on the BSP VCPU on the VM,
not the VCPU will trap out because triple fault. However, if the BSP VCPU on the VM
is handling another IO emulation, it may overwrite the triple fault IO request on
the vhm_request_buffer in function acrn_insert_request. The atomic operation of
get_vhm_req_state can't guarantee the vhm_request_buffer will not access by another
IO request if it is not running on the corresponding VCPU. So it should trigger
triple fault shutdown VM IO request on the VCPU which trap out because of triple
fault exception.
Besides, rt_vm_pm1a_io_write will do the right thing which we shouldn't do it in
triple_fault_shutdown_vm.
Tracked-On: #1842
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Since spinlock ptdev_lock is used to protect ptdev entry, there's no need to
use atomic operation to protect ptdev active flag in split of it's wrong used
to protect ptdev entry. And refine active flag data type to bool.
Tracked-On: #1842
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
errx() does not require an additional exit().
Tracked-On: #3252
Signed-off-by: Peter Fang <peter.fang@intel.com>
Reviewed-by: <yonghua.huang@intel.com>
Acked-by: Yin, Fengwei <fengwei.yin@intel.com>
Remove the use of assert() in vHPET.
Tracked-On: #3252
Signed-off-by: Peter Fang <peter.fang@intel.com>
Reviewed-by: <yonghua.huang@intel.com>
Acked-by: Yin, Fengwei <fengwei.yin@intel.com>
Remove the use of assert() in vPIT.
Tracked-On: #3252
Signed-off-by: Peter Fang <peter.fang@intel.com>
Reviewed-by: <yonghua.huang@intel.com>
Acked-by: Yin, Fengwei <fengwei.yin@intel.com>
This reverts commit c42b41fe2b.
Kernel will stay in xapic mode with this boot arg, lapic won't be passthru, so revert.
Tracked-On: #3227
Signed-off-by: Yan, Like <like.yan@intel.com>
handle the error if failed to create GVT device.
- remove assert
- clean up the allocated resource
V2: refine code and clean up the allocated resource
Tracked-On: #3349
Signed-off-by: Liu Xinyun <xinyun.liu@intel.com>
Reviewed-by: Yonghua Huang <yonghua.huang@intel.com>
According to SDM, bit N (physical address width) to bit 63 should be masked when calculate
host page frame number.
Currently, hypervisor doesn't set any of these bits, so gpa2hpa can work as expectd.
However, any of these bit set, gpa2hpa return wrong value.
Hypervisor never sets bit N to bit 51 (reserved bits), for simplicity, just mask bit 52 to bit 63.
Tracked-On: #3352
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
Add a check to acrnd and acrnctl to make sure we are running with root
privileges. If not, print out a message instructing the user to run with root
privileges and exit returning an error (-1).
Add notes to the documentation as well to make it more obvious.
Tracked-On: #3330
Signed-off-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
Reviewed-by: Binbin Wu <binbin.wu@intel.com>
In the current design guidlines, it is not clear about
how to check application constraints and how to record
them.
Add description about it is optional to do error checking
for application constraints during hypversisor boot time;
Add reference about how to record design assumptions.
Signed-off-by: Xiangyang Wu <xiangyang.wu@linux.intel.com>
Create 2 functions from code:
pci_base_from_size_mask
vdev_pt_remap_mem_vbar
Use vbar in place of vdev->bar[idx] by setting vbar to &vdev->bar[idx]
Change base to uint64_t to accommodate 64-bit MMIO bar size masking in
subsequent commits
Tracked-On: #3241
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
At this point, uint64_t base in struct pci_bar is not used by any code, so we
can remove it.
Tracked-On: #3241
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
Only do the EPT mapping if vbar base (gpa) is not mapped to the same pbar (hpa) before.
Need to unmap the existing mapping for a vbar base (gpa), otherwise, hv will
throw an error.
Tracked-On: #3241
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
Define/Use variable in place of code to improve readability:
Define new local variable struct pci_bar *vbar, and use vbar-> in place of vdev->bar[idx].
Define new local variable uint64_t vbar_base in init_vdev_pt
Rename uint64_t vbar[PCI_BAR_COUNT] of struct acrn_vm_pci_ptdev_config to uint64_t vbar_base[PCI_BAR_COUNT]
Tracked-On: #3241
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
Replace new_base with vbar_base in vdev_pt_remap_generic_mem_vbar().
We will call vdev_pt_remap_generic_mem_vbar() after a new vbar base
is set, no need to pass new_base to vdev_pt_remap_generic_mem_vbar(),
as this new vbar base (vbar_base) can be obtained by calling get_vbar_base().
The reason we call vdev_pt_remap_generic_mem_vbar() after a new vbar base
is set is for 64-bit mmio handling: when the lower 32-bit of 64-bit mmio vbar is
set, we will defer calling vdev_pt_remap_generic_mem_vbar until its upper 32-bit
vbar base is set.
Tracked-On: #3241
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
To remember the previously mapped/registered vbar base
For the following reasons:
register_mmio_emulation_handler() will throw an error if the the same addr_lo is
alreayd registered before
We are going to remove the base member from struct pci_bar, so we cannot use vdev->bar[idx].base
in the code any more
In subsequent commits, we will assume vdev_pt_remap_generic_mem_vbar() is called after a new
vbar base is set, mainly because of 64-bit mmio bar handling, so we need a
separate bar_base_mapped[] array to track the previously mapped vbar bases.
Tracked-On: #3241
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
vbar base can be built by using the base address fields stored in
struct pci_bar's reg member.
get_vbar_base: return vbar's base address in 64-bit. For 64-bit MMIO bar, its lower 32-bits
base address and upper 32-bits base are combined into one 64-bit base address
And changed related code to use get_vbar_base to get vbar base address in
64-bit.
Tracked-On: #3241
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
We added "union pci_bar_reg reg" to struct pci_bar in previous commit,
but only pci_pdev uses it and pci_vdev does not use it. Starting from
this commit, pci_vdev will use it:
In init_vdev_pt(), copy pbar's reg's flags portion to corresponding vbar's
reg.
When guest updates the vbar base address, the corresponding vbar reg's base
address will also be updated, so that in subsequent commits, we can eventually
remove the base member in struct pci_bar.
Rename local variable new_bar to base in vdev_pt_write_vbar
Tracked-On: #3241
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
pbar base can be built by using the base address fields stored in
struct pci_bar's reg member.
get_pbar_base: return pbar's base address in 64-bit. For 64-bit MMIO bar, its lower 32-bits
base address and upper 32-bits base are combined into one 64-bit base address
pci_bar_2_bar_base: helper function that is called by get_pbar_base
And changed related code to use get_pbar_base to get pbar base address in 64-bit
Tracked-On: #3241
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
There is no need to call get_bar_base(), as new_bar is set to val & mask,
where mask is the bar size mask, so new_base has already been set to be the
bar base address before get_bar_base() is called on it.
Tracked-On: #3241
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
ACRN coding guideline requires function shall have only one return entry.
Fix it.
Tracked-On: #861
Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
vcpu is never scan because of scan tool will be crashed!
After modulization, the vcpu can be scaned by the scan tool.
Clean up the violations in vcpu.c.
Fix the violations:
1.No brackets to then/else.
2.Function return value not checked.
3.Signed/unsigned coversion without cast.
V1->V2:
change the type of "vcpu->arch.irq_window_enabled" to bool.
V2->V3:
add "void *" prefix on the 1st parameter of memset.
Tracked-On: #861
Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
This commit adds "noapic" boot option to rt-linux, to skip IOAPIC probe.
Tracked-On: #3227
Signed-off-by: Yan, Like <like.yan@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
Update the /latest/ (master) version of the docs to provide the menu
choice for the v1.1 release.
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
Modify 'launch_UOS.sh' to 'launch_uos.sh' and provide an example for
the script which is support '-C' option.
Signed-off-by: ruix.li <ruix.li@intel.com>
Enhance and re-order the help messages for the `acrnd` tools (daemon for
ACRN VM management). Fix a few typos in the process.
Tracked-On: #3329
Signed-off-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
Bug fix for parsing options, as the vritio-console support multiple
virtio serial ports, and the parameters is split by ',':
virtio-console,[@]stdio|tty|pty|file:portname[=portpath]\
[,[@]stdio|tty|pty|file:portname[=portpath]]
But the previous patch "refine console options parse code" not
cover this case, can only parse one port config. Fix it in this patch.
Tracked-On: #3337
Signed-off-by: Conghui Chen <conghui.chen@intel.com>
Acked-by: Wang Yu <yu1.wang@intel.com>
The sbuf is allocated for each pcpu by hypercall from SOS. Before launch
Guest OS, the script will offline cpus, which will trigger vcpu reset and
then reset sbuf pointer. But sbuf only initiate once by SOS, so these
cpus for Guest OS has no sbuf to use. Thus, when run 'acrntrace' on SOS,
there is no trace data for Guest OS.
To fix the issue, only reset the sbuf for SOS.
Tracked-On: #3335
Signed-off-by: Conghui Chen <conghui.chen@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
Reviewed-by: Yan, Like <like.yan@intel.com>
Use nr_bars instead of PCI_BAR_COUNT to check bar access offset.
As while normal pci device has max 6 bars, pci bridge only has 2 bars,
so for pci normal pci device, pci cfg offsets 0x10-0x24 are for bar access,
but for pci bridge, only 0x10-0x14 are for bar access (0x18-0x24 are
for other accesses).
Rename function:
pci_bar_access --> is_bar_offset
Tracked-On: #3241
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
And put the checking in vdev_pt_write_cfg instead to have less nesting in
vdev_pt_write_vbar to improve code readability.
Rename function:
vdev_pt_remap_generic_bar --> vdev_pt_remap_generic_mem_vbar
vdev_pt_read_cfg's function declaration is merged into one line instead of 2
lines
Tracked-On: #3241
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
nr_bars in struct pci_pdev is used to store the actual # of bars (
6 for normal pci device and 2 for pci bridge), nr_bars will be used in subsequent
patches
Use uint32_t for bar related variables (bar index, etc) to unify the bar
related code (no casting between uint32_t and uint8_t)
Tracked-On: #3241
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
