Commit Graph

805 Commits

Author SHA1 Message Date
Li, Fei1
2b24b3780f hv: mmu: add some API for guest page mode check
add is_long_mode to check whether the processor is operating in IA-32e mode
add is_paging_enabled to check whether paging is enabled
add is_pae to check whether physical address extension is enabled.

Tracked-On: #1379
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2018-10-10 09:35:29 +08:00
Mingqiang Chi
eff2ac7a90 hv: Remove vm_list
Loop the global vm_array[] instead of the vm_list.

Tracked-On: #861
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-10-09 13:24:21 +08:00
Mingqiang Chi
b8e59e1638 hv:Replace dynamic memory with static for vm
-- Replace dynamic memory allocation with static memory
-- Remove the parameter check if the vm is NULL

Tracked-On: #861
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-10-09 13:24:21 +08:00
Mingqiang Chi
ff3f9bd1e6 hv: Remove const qualifier for struct vm
This patch is ready for next one,we will switch from
pointer to embedded structures such as structure vcpu,
some const qualifiers can be improper and raise compilation errors,
this patch remove const qualifier for struct vm.

Tracked-On: #861
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-10-09 13:24:04 +08:00
Sainath Grandhi
5b28b37842 hv: Fix for PARTITION_MODE compilation
This patch fixes compilation issue for PARTITION_MODE.

Tracked-On: #1404
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
2018-10-08 22:04:27 +08:00
Jason Chen CJ
099203c15a ptdev: assert/deassert interrupt according to polarity
add active_polarity to decide what signal to call: GSI_SET_LOW, GSI_SET_HIGH,
GSI_FALLING_PULSE or GSI_RAISING_PULSE.

Tracked-On: #1269
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
2018-09-30 15:24:59 +08:00
Jason Chen CJ
e49233ba9b ioapic: set default polarity setting as high active
high active should be default polarity setting for ioapic RTE

Tracked-On: #1269
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
2018-09-30 15:24:59 +08:00
Shiqing Gao
4544d28ee1 hv: fix 'User name starts with underscore'
There are chances that names with leading underscore declared by
developers are conflict with the ones reserved for the compiler.

What this patch does:
- rename these functions/variables/macros starting with
  underscore to avoid such unintentational mistakes.
- remove gpr.h without any contents

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-09-30 14:45:37 +08:00
Chaohong guo
39d54c8765 EFI: Disable RELOC by default temporary
Commit 6085781 replaced __emalloc() with a call to uefi allocate_page()
and allows UEFI FW to allocate memory for hypervisor from high to low
address below 4GB. However, this change triggers an issue (might be
memory corruption), in turn, PXE boot cannot work.

Since root cause the issue might take some time, the PXE boot issue
blocks auto-test, we disable hypervisor relocation by default for the
time being in config option, and users can enable it by themselves. In
the following weeks, if we root cause the issue, we can re-enable
relocation feature.`

Tracked-On: #1371
Signed-off-by: Chaohong guo <chaohong.guo@intel.com>
2018-09-30 13:15:26 +08:00
Wei Liu
c76114714e hv: modify static irq mappings into array of structure
The patch is replace irq_static_mappings type from 2 dimension array
into structure and one dimension array.

Tracked-On: #1375
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Reviewed-by: Jason Chen <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-09-29 15:54:22 +08:00
Yin Fengwei
1c0a3d9a02 hv: Add API to set vcpu register
set_vcpu_regs function is added to set vcpu registers.

Tracked-On: #1231
Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
2018-09-29 15:34:02 +08:00
Yin Fengwei
adc7913741 hv: efi_context refine
For SBL platform, struct acrn_vcpu_regs are used as boot context.
Now the boot_ctx is only for UEFI platform. Rename struct boot_ctx
to efi_context.

Tracked-On: #1231
Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
2018-09-29 09:24:00 +08:00
Yin Fengwei
ba1aa40707 hv: add struct acrn_vcpu_regs
Add struct acrn_vcpu_regs and make struct boot_ctx based on
struct acrn_vcpu_regs.

vm0_boot_context is also changed from struct boot_ctx to struct
acrn_vcpu_regs.

Tracked-On: #1231
Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
2018-09-29 09:24:00 +08:00
Yin Fengwei
843f7721f0 hv: Change the struct cpu_gp_regs name to acrn_gp_regs
We will define the hypercall to set acrn vcpu registers and
move this struct to acrn_commmon.h for reference from hypercall
parameter definition.

Tracked-On: #1231
Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
2018-09-29 09:24:00 +08:00
Yin Fengwei
b207f1b942 hv: struct seg_desc_vmcs name change
struct seg_desc_vmcs is actually for segment descriptor vmcs fields.
Change its name to vmcs_seg_field

Tracked-On: #1231
Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-09-29 09:24:00 +08:00
Junjun Shan
5c92329606 hv:clear up the usage of printf data struct
The printf related functions have been called by other various
functions, e.g. get_ptdev_info(), get_ioapic_info, etc. The patch
is used to clear up the usage.

Tracked-On: #861
Signed-off-by: Junjun Shan <junjun.shan@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-09-28 16:40:07 +08:00
Wei Liu
965f8d1033 hv: fix irq leak for MSI IRQ
Current free_irq sequence will release vector first, then use the
released vector to free irq number.It will cause irq leak for MSI IRQ.
At present, there is no one to free the irqs which in irq_static_mappings,
So this patch will only make sure free non-gsi irqs.

Tracked-On: #1359
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-09-28 16:39:36 +08:00
Wei Liu
67ff326e14 hv: retain the timer irq
Timer IRQ was static mapped IRQ.
It should not be cleaned up when one of the cpu dead.
The patch will retain the timer irq.

Tracked-On: #1359
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-09-28 16:39:36 +08:00
Shiqing Gao
ed06b8a7ca hv: fix 'Void procedure used in expression'
MISRA-C states that a void procedure used in expressions is dangerous.

This patch removes the improper 'return' when calling the void procedure
'send_dest_ipi'.

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-09-28 13:59:19 +08:00
Yonghua Huang
9a05fbea78 HV: remove IRQSTATE_ASSERT/IRQSTATE_DEASSERT/IRQSTATE_PULSE
- replace vpic/vioapic_xassert_irq() APIs
      with vpic/vioapic_set_irq()

   - unify the description of IRQ/PIN state in vpic. & vioapic.c

Tracked-On: #861
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-09-28 13:14:30 +08:00
Yin Fengwei
9df8790ffc hv: Fix two minor issues in instruction emulation code
1. The wrong operand size is assigned in instruction decode phase
   if the operand size is 1 byte.

   According to the SDM, the bit 0(w bit) of opcode should be checked
   first to detect whether the operand size is 1 byte. Then, check
   whether there is prefix to overwrite the default operand size.

   The original instruction decode doesn't care about the operand
   size. But do opsize fixup during instruction emulation phase.
   With ACRN we need operand size packed to ioreq and send to DM
   after instruction decode.

2. We should always touch the GPA by following opsize to avoid side
   effect (especially when GPA is for a MMIO).

Tracked-On: #1337
Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-09-28 13:10:54 +08:00
Yonghua Huang
dd6a5fbe95 HV: Add hypercall to set/clear IRQ line
- wraps ASSERT/DEASSERT IRQ line hypercalls.
    - remove 'intr_type' from set/clear IRQ line interface.
    - deprecate "IRQ_ASSERT", "IRQ_DEASSERT" & "IRQ_PULSE".
    - new adding hypercall will support "GSI_SET_HIGH"/
      "GSI_SET_LOW"/ "GSI_RAISING_PULSE"/ "GSI_FALLING_PULSE"
      operations

Tracked-On: #861
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-09-27 16:49:52 +08:00
Shiqing Gao
05ad6d6628 hv: drop the macro arguments acting as formal parameter names
This patch fixes the following issue pointed by Xiangyang and Junjie.
There are some macro arguments acting as formal parameter names.
Drop such arguments since they make no difference to the expanded
implementation and they might confuse some developers.

Here is an example.
'ptr' is dropped in this patch, which is acting as a formal parameter
name and make no difference to the expanded implementation.

-#define build_atomic_load(name, size, type, ptr)       \
+#define build_atomic_load(name, size, type)            \
 static inline type name(const volatile type *ptr)      \
{                                                       \
        type ret;                                       \
        asm volatile("mov" size " %1,%0"                \
                        : "=r" (ret)                    \
                        : "m" (*ptr)                    \
                        : "cc", "memory");              \
        return ret;                                     \
}

Some minor coding style fixes are also included in this patch.
- use TAB for the alignment rather than mixing TAB with space
- fix some typo in the comments

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-09-27 16:07:22 +08:00
Shiqing Gao
74622d7d29 hv: merge hv_lib.h and hypervisor.h
merge hv_lib.h and hypervisor.h into one file

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-09-27 15:55:41 +08:00
Yin Fengwei
3178ecea72 hv: Fix the warning for ACRN release build
Now, the warning is promoted to error. The warning break ACRN
release build.

Tracked-On: #1343
Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-09-27 15:46:47 +08:00
Yin Fengwei
6bcfa1520b hv: Enable the compiler warning as error for HV
Fix the compiler warning and turn on the flag to make
compiler warning as compiler error.

Tracked-On: #1343
Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-09-27 11:22:44 +08:00
Binbin Wu
2111fcffa5 hv: vtd: add config for bus limitation when init
Currently, hypervisor doesn't have the information of pci devices
on the platform when init. In order to reduce boot time and memory
usage, hypervisor set a bus limitation for pci devices when init vtd.
However, maximum bus number varies on different platforms.
This patch add a config for the bus limitation.
Set 0xF as the default value for the maximum bus number on sbl platform.
Set 0xFF as the default value for the maximum bus number on uefi platfrom.

Tracked-On: #1339
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-09-27 11:05:22 +08:00
Shiqing Gao
026ae83bd5 hv: include: fix 'Unused procedure parameter'
MISRA-C requires that there should be no unused parameters in
functions.

This patch removes the unused parameters that is not being used
unconditionally.

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-09-27 10:46:52 +08:00
Zhao Yakui
a189be26ff HV: Add one hcall to set the upcall vector passed from sos_kernel
Currently the acrn-hypervisor is using the PLATFORM_IPI vector to notify
the sos_kernel. And then sos_kernel will handle the notification from acrn
hypervisor in PLATFORM_IPI ISR. But as the PLATFORM_IPI ISR can be registered
by the other modules, it will have the conflict when trying to register
acrn intr ISR. So the HYPERVISOR_CALLBACK_VECTOR will be used instead.

In order to switch the notification vector from PLATFORM_IPI to
HYPERVISOR_CALLBACK_VECTOR, one API is added so that sos can configure
the up-notifier interrrupt vector.

Tracked-On: https://github.com/projectacrn/acrn-hypervisor/issues/1325
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-09-26 11:23:34 +08:00
Junjun Shan
89ca54cafa hv:Fix unused var value on all paths
MISRAC checks whether a variable is assigned a value not used in
all branches of a program. Var value which is unused on all paths
can be removed with a consequent improvement in the readability
and efficiency of the code. This patch is used to fix these
violations.

Tracked-On: #861
Signed-off-by: Junjun Shan <junjun.shan@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-09-26 11:10:21 +08:00
Shiqing Gao
8787c06d3b hv: arch: fix 'Unused procedure parameter'
MISRA-C requires that there should be no unused parameters in
functions.

In some cases, we will keep the unused parameters.
vmexit handler is one example. It is used as function pointer.
Some of the vmexit handlers use the input parameter 'vcpu', some of
them don't. We still need to keep the unused parameters 'vcpu' for
those handlers don't use 'vcpu'.

This patch removes the unused parameters that is not being used
unconditionally.

v1 -> v2:
 * remove the non-implemented API 'vlapic_id_write_handler'

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-09-26 10:48:55 +08:00
Shiqing Gao
71b047cb61 hv: fix 'Switch case not terminated with break'
MISRA-C requires that every switch case shall be terminated with break
to avoid the unintentional fall through.

The code will become redundant if we enforce this rule.
So, we will keep the current implementation for the following two cases.
1. The fall through is intentional.
2. The function is returned in the switch case.
    If we decide to eliminate the mutiple returns in one function later,
    this case would be handled properly at that time.

What this patch does:
- add the mssing break for the default case
- add the pre condition for some functions and remove the corresponding
  panic which will never happen since the function caller could guarantee
  the pre condition based on the code implementation

v1 -> v2:
 * remove the redundant cases above default in 'vlapic_get_lvtptr'
 * add the similar pre condition for 'lvt_off_to_idx' as
   'vlapic_get_lvtptr' since all the function callers could guarantee it
 * remove the assertion in 'lvt_off_to_idx' since the pre condition
   could guarantee that the assertion will never happen
 * add the similar pre condition for 'vpic_set_irqstate' as
   'vioapic_set_irqstate' since all the function callers could guarantee it
 * remove the assertion in 'vpic_set_irqstate' since the pre condition
   could guarantee that the assertion will never happen

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
2018-09-25 11:10:44 +08:00
Shiqing Gao
e0973e4883 hv: ioapic: convert some MACROs to inline functions
Convert GSI_MASK_IRQ and GSI_UNMASK_IRQ to inline functions.

v1 -> v2:
After changing GSI_MASK_IRQ and GSI_UNMASK_IRQ from MACROs to functions,
'gsi_(mask|unmask)_irq' are the exposed APIs and 'irq_gsi_mask_unmask'
becomes internal.
In order to reflect this change,
- change 'irq_gsi_mask_unmask' as internal function in ioapic.c
- declare 'gsi_(mask|unmask)_irq' in ioapic.h
- define 'gsi_(mask|unmask)_irq' in ioapic.c

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
2018-09-25 11:09:56 +08:00
Minggui Cao
d123083fa9 HV: add hypercall to monitor UOS PTdev intr status
The hypercall can be used by SOS/DM to monitor UOS
pass-thru devices' interrupt data; and if an "interrupt
storm" happens in UOS, it can be used to delay the UOS
PTdev interrupt's injection for sometime.

The two functions are implemented by one hypercall with
two sub-commands, and with the data/params in the buffer.

Tracked-On: #866
Signed-off-by: Minggui Cao <minggui.cao@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-09-25 11:09:35 +08:00
Minggui Cao
918403f925 HV: modify code for intr storm detect & handling
This patch is to enhance the feature of "interrupt storm
mitigation"; when interrupt storm happens on one UOS
it should keep as smaller effect to SOS as possible.

Add variables in PTdev entry & VM, used to record one
UOS's pass-thru devices' interrupt data; add a function
to collect the data.

Also add a timer used to delay UOS pass-thru devices'
interrupt injection if an "interrupt storm" detected
by SOS.

Tracked-On: #866
Signed-off-by: Minggui Cao <minggui.cao@intel.com>
Reviewed-by: Li Fei1 <fei1.li@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-09-25 11:09:35 +08:00
Sainath Grandhi
8c9e0d17db hv: init_iommu rework to enable IOMMU for partition mode ACRN
Current code enables IOMMU from init_iommu_vm0_domain which is called
from vm0/sos boot sequence. For partition mode VMs, this is not called as
VMs are numbered from 1.

This patch adds support to initialize root table pointer for each IOMMU
and enable all IOMMUs from init_iommu. Hence IOMMUs are enabled even
though ACRN does not boot vm0.

This patch also has changes to fix #1270.

Tracked-On: #1246 #1270
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
2018-09-20 11:14:07 +08:00
Yan, Like
ccf562402e hv:irq: avoid out-of-range access to irq_alloc_bitmap[]
Logically, out-of-range access won't happen at these places. However, it
depends on the behaviour of other codes.
This commit makes changes to explicitly eliminate the possibility in these
functions.

Tracked-On: #1235
Signed-off-by: Yan, Like <like.yan@intel.com>
2018-09-19 12:58:59 +08:00
Zhang, wenling
d4afddc0a7 Revert "hv: init_iommu rework to enable IOMMU for partition mode ACRN"
This reverts commit d8508e4229.
2018-09-19 09:24:02 +08:00
Yonghua Huang
994a375103 HV:fix potential buffer overflow issues
- use sizeof(struct lapic_regs),instead of arbitrary size
   to lear 'apic_page' memory region in vlapic.c
 - fix potential buffer overflow issues in vpic.c & ioapic.c

Tracked-On: #1252
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-09-18 16:14:27 +08:00
Victor Sun
a1e9fdc7f9 HV: add Kconfig of CONSTANT_ACPI
If CONFIG_CONSTANT_ACPI is true, then the value in host_acpi_info structure
is constant. Otherwise the host_acpi_info value could be overrided.

This is useful when platform ACPI table value is not fixed in Bootloader
before production.

In production release, this config should be set to yes.

Tracked-On: #1264

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-09-18 13:34:47 +08:00
Junjun Shan
eb8c4fb0d5 hv:Fix Implict conversion:actual to formal param
MISRAC has requirement about implict conversion: actual to formal
param. This patch is used to fix part of these violations.

1.Add a new structure seg_desc_vmcs to hold the VMCS field address of
segment selector to clean up seg_desc structure.

2.Add the definition of maximum MSI entry and the relevant judgement.

3.The violations in shell.c, logmsg.c will be fixed in other series of
patches with modification of function snprintf(), vsnprintf() and other
related usages.

v1->v2:
  *Move the definition of struct seg_desc_vmcs from instr_emul.h to
   instr_emul.c.
  *Modify the formal parameter type in function definition from uint8_t
   to char instead of using cast.
  *Drop the const declaration for char data in formal parameter.

v2->v3:
  *update the data missing conversion.
  *change type of internal parameter len to avoid casting in npklog.c.
  *change the conversion from signed char to unsigned int in
   uart16550_getc() to solve sign-extension.

Tracked-On: #861
Signed-off-by: Junjun Shan <junjun.shan@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-09-18 13:09:39 +08:00
Qi Yadong
8f0cb5630d HV: trusty: refine version checking when initializing trusty
Replace if--else logic with switch--case when checking interface
version.

Tracked-On: #1265
Signed-off-by: Qi Yadong <yadong.qi@intel.com>
Acked-by: Zhu Bing <bing.zhu@intel.com>
2018-09-18 13:09:01 +08:00
Shiqing Gao
9d602208e5 hv: remove unused MACROs
MISRA-C states that redundant macros reduce the maintainability of code.

In some cases, we would like to keep the current unused macros for code
completeness, such as cpu registers. These macros might be used later.

This patch removes some unused macros that is not critical for code
completeness.

v1 -> v2:
 * Keep TRUSTY_VERSION in trusty.c.
   Yadong will cook another patch which will utilize TRUSTY_VERSION.

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-09-18 09:43:43 +08:00
Xiangyang Wu
bb0a2bc2ab HV:Hypercall:Remove redundant error checking
In the current hypervisor hypercall, first all vcpu is
allocated to SOS, vcpu's vm field is initialized to vm0.
When the vcpu is offlined, vcpu will be paused and vcpu's
vm field is set as NULL by DM. When UOS is created, vcpu's
vm field is set as UOS's vm. So when vmcall_vmexit_handler
is invoked, vcpu's vm filed is always non-NULL.
error checking for vm pointer is done in the function
"vmcall_vmexit_handler", vmcall_vmexit_handler will
guarantee that vm is vm0.

So all hypercall functions (these functions is just for handler
hypercall, except vmcall_vmexit_handler) don't need to check
whether invoking vm is NULL and don't need to check whether
invoking vm is vm0 or not.

Remove related invoking vm error checking for hypercall handling.

V1 --> V2:
	Add pre-condition for hypercall in the head file.
V2 --> V3:
	Add pre-condition for copy_from_gpa and copy_to_gpa.
V3 --> V4:
	Add pre-condition both in the head file and source file.

Tracked-On:#1258

Signed-off-by: Xiangyang Wu <xiangyang.wu@linux.intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-09-18 09:43:24 +08:00
Sainath Grandhi
d8508e4229 hv: init_iommu rework to enable IOMMU for partition mode ACRN
Current code enables IOMMU from init_iommu_vm0_domain which is called
from vm0/sos boot sequence. For partition mode VMs, this is not called as
VMs are numbered from 1.

This patch adds support to initialize root table pointer for each IOMMU
and enable all IOMMUs from init_iommu. Hence IOMMUs are enabled even
though ACRN does not boot vm0.

Tracked-On: #1246
Signed-off-by: Sainath Grandhi sainath.grandhi@intel.com
2018-09-18 09:21:31 +08:00
Yonghua Huang
2af08d9619 HV: refine 'struct lapic_regs' definition.
- remove 'PAD3' & 'PAD4'
 - define local APIC registers by 'struct lapic_reg' type.

Tracked-On: #861
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-09-18 09:09:44 +08:00
Binbin Wu
5329ced1ea hv: vtd: fix potential buffer overflow in suspend/resume
In current code of suspend_iommu/resume_iommu, there is potential buffer overflow
according to the code.
This patch put the buffer to struct dmar_drhd_rt, so that no need to access the buffer
via index.

Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Tracked-On: #1252
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-09-18 09:09:18 +08:00
Qi Yadong
8858634493 HV: update opcode when decode_two_byte_opcode()
The vie->opcode should be updated when decode_two_byte_opcode(),
otherwise for two bytes opcode emulate(movzx/movsx) will fail.

Signed-off-by: Qi Yadong <yadong.qi@intel.com>
2018-09-14 09:26:48 +08:00
Yan, Like
5a996ce6a9 hv:irq: correct the size of irq_alloc_bitmap
This commit corrected the size of irq_alloc_bitmap[].

Tracked-On: #1229
Signed-off-by: Yan, Like <like.yan@intel.com>
2018-09-13 13:11:31 +08:00
Junjun Shan
4fd5102edc hv:treewide:fix multiple MISRAC violations
MISRAC has requirements about literal value requires a U suffix and
signed/unsigned conversion with cast. This patch is used to solve
these violations.

v1->v2
 *Drop the cast of sz from uint32_t to int32_t, the signed/unsigned
  violation of nchars will be solved by other patch together with
  printf/sprintf/console/vuart/uart code.

 *Delete the unnecessary L suffix of shifting operand.

Tracked-On: #861
Signed-off-by: Junjun Shan <junjun.shan@intel.com>
Reviewed by: Junjie Mao <junjie.mao@intel.com>
2018-09-13 11:12:29 +08:00