when CONFIG_MAX_MSIX_TABLE_NUM was set to 64, it will trigger timeout ASSERT
on WHL-I5 board.
Tracked-On: #5178
Signed-off-by: lirui34 <ruix.li@intel.com>
This patch will move the VM configuration check to pre-build stage,
a test program will do the check for pre-defined VM configuration
data before making hypervisor binary. If test failed, the make
process will be aborted. So once the hypervisor binary is built
successfully or start to run, it means the VM configuration has
been sanitized.
The patch did not add any new VM configuration check function,
it just port the original sanitize_vm_config() function from cpu.c
to static_checks.c with below change:
1. remove runtime rdt detection for clos check;
2. replace pr_err() from logmsg.h with printf() from stdio.h;
3. replace runtime call get_pcpu_nums() in ALL_CPUS_MASK macro
with static defined MAX_PCPU_NUM;
4. remove cpu_affinity check since pre-launched VM might share
pcpu with SOS VM;
The BOARD/SCENARIO parameter check and configuration folder check is
also moved to prebuild Makefile.
Tracked-On: #5077
Signed-off-by: Victor Sun <victor.sun@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
Add cpu_affinity setup for SOS VM. Cpu affinity must be set in
scenario XML, except if no pre-launched VM on the scenario and
all pCPUs will be assigned to SOS VM in that case;
Tracked-On: #5077
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Previously the CPU affinity of SOS VM is initialized at runtime during
sanitize_vm_config() stage, follow the policy that all physical CPUs
except ocuppied by Pre-launched VMs are all belong to SOS_VM. Now change
the process that SOS CPU affinity should be initialized at build time
and has the assumption that its validity is guarenteed before runtime.
Tracked-On: #5077
Signed-off-by: Victor Sun <victor.sun@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
Set guest flag value for logical partition.
Tracked-On: #5119
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
Remove RT guest flags from logical partition
configuration.
Tracked-On: #5119
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
The folders for config xmls and scenario setting source code are moved
to misc/vm_configs/xmls and misc/vm_configs/board, misc/vm_configs/scenario,
so this patch is to update config path for these folders.
Tracked-On: #5077
Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Add xmls/samples folders under misc/vm_configs, and make soft link for
them.
Tracked-On: #5077
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
Add hybrid_rt source code for whl-ipc-i5/i7.
Tracked-On: #5081
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
1.Refine cpu affinity in hybrid rt xmls for whl-ipc-i5/7
2.Refine guest flag for hybrid rt xmls for whl-ipc-i5/7
Tracked-On: #5081
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
Add support to generate passthru TPM information for whl-ipc-i5/i7.
Tracked-On: #5077
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
There is some macro defined in misc_cfg.h while CAT/MBA enabled.
include the missing header to solve build issue.
Tracked-On: #5092
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
Now the hypervisor configuration source code layout is changed, so acrn-config
need to change accordingly to make sure XML based configuration build success;
Tracked-On: #5077
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
Add acrn-config tool formated nuc7i7dnb configurations code in misc/vm_configs/
folder with new layout;
Tracked-On: #5077
Signed-off-by: Victor Sun <victor.sun@intel.com>
The make command is same as old configs layout:
under acrn-hypervisor folder:
make hypervisor BOARD=xxx SCENARIO=xxx [TARGET_DIR]=xxx [RELEASE=x]
under hypervisor folder:
make BOARD=xxx SCENARIO=xxx [TARGET_DIR]=xxx [RELEASE=x]
if BOARD/SCENARIO parameter is not specified, the default will be:
BOARD=nuc7i7dnb SCENARIO=industry
Tracked-On: #5077
Signed-off-by: Victor Sun <victor.sun@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
There are 3 kinds of configurations in ACRN hypervisor source code: hypervisor
overall setting, per-board setting and scenario specific per-VM setting.
Currently Kconfig act as hypervisor overall setting and its souce is located at
"hypervisor/arch/x86/configs/$(BOARD).config"; Per-board configs are located at
"hypervisor/arch/x86/configs/$(BOARD)" folder; scenario specific per-VM configs
are located at "hypervisor/scenarios/$(SCENARIO)" folder.
This layout brings issues that board configs and VM configs are coupled tightly.
The board specific Kconfig file and misc_cfg.h are shared by all scenarios, and
scenario specific pci_dev.c is shared by all boards. So the user have no way to
build hypervisor binary for different scenario on different board with one
source code repo.
The patch will setup a new VM configurations layout as below:
misc/vm_configs
├── boards --> folder of supported boards
│ ├── <board_1> --> scenario-irrelevant board configs
│ │ ├── board.c --> C file of board configs
│ │ ├── board_info.h --> H file of board info
│ │ ├── pci_devices.h --> pBDF of PCI devices
│ │ └── platform_acpi_info.h --> native ACPI info
│ ├── <board_2>
│ ├── <board_3>
│ └── <board...>
└── scenarios --> folder of supported scenarios
├── <scenario_1> --> scenario specific VM configs
│ ├── <board_1> --> board specific VM configs for <scenario_1>
│ │ ├── <board_1>.config --> Kconfig for specific scenario on specific board
│ │ ├── misc_cfg.h --> H file of board specific VM configs
│ │ ├── pci_dev.c --> board specific VM pci devices list
│ │ └── vbar_base.h --> vBAR base info of VM PT pci devices
│ ├── <board_2>
│ ├── <board_3>
│ ├── <board...>
│ ├── vm_configurations.c --> C file of scenario specific VM configs
│ └── vm_configurations.h --> H file of scenario specific VM configs
├── <scenario_2>
├── <scenario_3>
└── <scenario...>
The new layout would decouple board configs and VM configs completely:
The boards folder stores kinds of supported boards info, each board folder
stores scenario-irrelevant board configs only, which could be totally got from
a physical platform and works for all scenarios;
The scenarios folder stores VM configs of kinds of working scenario. In each
scenario folder, besides the generic scenario specific VM configs, the board
specific VM configs would be put in a embedded board folder.
In new layout, all configs files will be removed out of hypervisor folder and
moved to a separate folder. This would make hypervisor LoC calculation more
precisely with below fomula:
typical LoC = Loc(hypervisor) + Loc(one vm_configs)
which
Loc(one vm_configs) = Loc(misc/vm_configs/boards/<board>)
+ LoC(misc/vm_configs/scenarios/<scenario>/<board>)
+ Loc(misc/vm_configs/scenarios/<scenario>/vm_configurations.c
+ Loc(misc/vm_configs/scenarios/<scenario>/vm_configurations.h
Tracked-On: #5077
Signed-off-by: Victor Sun <victor.sun@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
Update the draft content about Debian packaging with something more user
friendly and complete.
I removed the version of the release.json included in the doc and
instead just include the release.json file directly.
I added comments about the configuration parameters directly in the
release.json file, using the convention already being used there.
(If we updated the json python package being used to json5, the
release.json file could include comments using // convention and things
would look a bit cleaner.)
Tracked-On: #5022
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
1.Add UUID for Pre-launched RT VM.
2.Add hybrid_rt.xml for whl-ipc-i7/i5 and also add template Pre-Launched
RT sample xml.
3.Refine sanity check for load_kern_addr/entry.
Tracked-On: #5081
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
add tsn devices and the NVME device in the board xml
Tracked-On: #4831
Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Reviewed-by: Binbin Wu <binbin.wu@intel.com>
Config tool should keep aligning with Kconfig default value for
MAX_MSIX_TABLE_NUM.
Note: Remain the same configuration for the board which does not have
PCIe slot or NVME slot.
Tracked-On: #4994
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
1.add max MSI-X table number in board xmls.
2.leave MAX_MSIX_TABLE_NUM item to blank.
Tracked-On: #4994
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
Detect and get MSI-X table number in board xmls.
Parse and generate the number for board config while 'MAX_MSIX_TABLE_NUM'
item is blank.
Tracked-On: #4994
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
1.Update passtrough device config for ehl-crb-b launch xmls.
Tracked-On: #5016
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
Add support 6 VMs for ehl-crb-b industry xml.
Tracked-On: #5015
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
MBA_DELAY/CLOS_MASK show be exposed only if "MBA"/"L2" or "L3" existed
in rdt resource supoorted in board xml;
The default value of MBA_DELAY is 0;
The numbers of MAB_DELAY/CLOS_MASK entries is determined by:
If CDP is not enabled, the number of entries for CLOS_MASK and MBA_DELAY
is the min of CLOS_MAX of all RDT resources;
If CDP is enabled, divide the CLOS_MAX values for L3 and L2 resources
by 2 and then find the min of all RDT resources to get common_clos_max,
the number of entries for CLOS_MASK is common_clos_max*2,
the number of entries for MBA_DELAY is comm_clos_max.
Tracked-On: #4943
Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Reviewed-by: Vijay Dhanraj <vijay.dhanraj@intel.com>
Refine sanity check for RDT CLOS and MBA Delay.
Tracked-On: #4943
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Reviewed-by: Vijay Dhanraj <vijay.dhanraj@intel.com>
Update the LICENSE year for hv files which generate by config tool.
Tracked-On: #5004
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
The pci.ids database should be already prepared while tools of 'lspci'
were correctly installed and this check for pci.ids should be removed.
Tracked-On: #4989
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
For the base of vuart 1 is not an invalid com base, the tools will check
the target vuart id and it's VM id if matches the other VM's. If they do
not match the error message will report to re-configuration.
Tracked-On: #4991
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
1. add life-mngr as a target in misc/Makefile, so it is
convenient to build and used in Yocto system.
2. add install target in life-mngr/Makefile to be packaged
into device file-system.
Tracked-On: #4870
Signed-off-by: Minggui Cao <minggui.cao@intel.com>
Reviewed-by: Binbin Wu <binbin.wu@intel.com>
This patch adds support to configure MBA delay values from
scenario xml files just as it is done for CAT mask. This will
improve user experience when configuring RDT resource mask
values.
Tracked-On: #4943
Signed-off-by: Vijay Dhanraj <vijay.dhanraj@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
There are three TSN devices on EHL CRB, and each of them need 32
vectors.
In order to support TSN devices, increase msix table size and irte
size.
Tracked-On: #4831
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
generate msix emulation information from known exist PCI devices for
board config.
Tracked-On: #4831
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Reviewed-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
Don't hardcode install paths. Instead of hardcoding where binaries are
installed, add variables that installer can override.
Tracked-On: #4864
Signed-off-by: Chee Yang Lee <chee.yang.lee@intel.com>
Signed-off-by: Naveen Saini <naveen.kumar.saini@intel.com>
refine sanity check for MASK_CLOS number by max clos in board xml.
Tracked-On: #4876
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
1.Refinement GVT args for SOS kernel cmdline in scenario config xmls.
2.Refinement GVT args for launch UOS script in launch config xmls.
Tracked-On: #4869
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
1.Update efi bootloader image file path for Yocto rootfs.
2.Remove empty check for UEFI OS loader name.
Tracked-On: #4868
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
Update mrb ttys, up2 iomem and ehl-crb-b information.
Tracked-On: #4862
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
Currently, MMIO PCI BDF of ttyS was indexed by IRQ, but it may found
the wrong BDF when the IRQ was shared and it is not expected. So, the
patch uses the MMIO base to query /proc/iomem to find BDF, the waring
will get if BDF is not present in iomem.
Tracked-On: #4862
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
RDT config item is located in the 5rd layer of scenario config;
the number of CLOS_MASK config is dynamically obtained by the rdt
resource clos max in the board config;
the vcpu_clos config is dynamically added or removed when the
pcpu_id config is added or removed;
the drop-down list of vcpu_clos config is reduced by half when
CDP_ENABLED=y.
Tracked-On: #4860
Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Reviewed-by: Victor Sun <victor.sun@intel.com>
1.Add parser and sanity check for RDT_ENABLED/CDP_ENABLED/CLOS_MASK.
2.Skip to generate RDT inforamtion when HW not support RDT or usr
select 'n' to disable RDT feature.
3.Add contiguous bit 1 check for CLOS_MASK.
Tracked-On: #4860
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
1.Add RDT feature in scenario xmls, add set RDT_ENABLED=y, CDP_ENABLED=n
by default for industry scenario if HW support RDT.
2.Add CLOS_MASK in xmls to configurable and set them to '0xff' by
default if HW support RDT.
3.Remove configurable="0" of clos for PRE launched VM and POST VM, currently,
remain configurable="0" for SOS VM.
4.Add vcpu_clos to match the pcpu_id number, and set vcpu_clos to 0.
Tracked-On: #4860
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
This patch adds xml file, both board as well scenario files
that are need to run ACRN on top of QEMU as a nested hypervisor.
Currently support is only for SDC scenario.
Tracked-On: #3198
Signed-off-by: Vijay Dhanraj <vijay.dhanraj@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
This patch sets defaults similar to generic platform configuration
when leaf features like PM_INFO, S3_INFO, S5_INFO, DRHD_INFO, CPU_BRAND,
CX_INFO, PX_INFO, MMCFG_BASE_INFO are not generated via either target
offline tool or user supplies empty field in case of emulation.
Tracked-On: #3198
Signed-off-by: Vijay Dhanraj <vijay.dhanraj@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
1. not need 'clean' when building ACRN-HV/DM each time
2. correct efi-stub wrong dependency
Tracked-On: #2412
Signed-off-by: Minggui Cao <minggui.cao@intel.com>
Reviewed-by: Binbin Wu <binbin.wu@intel.com>
Remove pre-launched VM console setting in scenario xml and leave it
configured in bootargs directly.
Tracked-On: #4808
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
The bootarg of rootfs for pre-launched VM is for Linux only and it
should not limited to physical block device which is selectable from
native rootfs list, it might be a USB or RAM device that "X" is variable
in root=/dev/sdX or /dev/ramX. So remove the rootfs setting in XML and
leave it configured in kernel bootargs directly.
Given the SOS must be Linux and its rootfs must be a physical block
device, rootfs item tag is still reserved in xml for SOS VM section.
Tracked-On: #4808
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
remove configurable="0" for hybrid scenario pci_devs of Pre Launched VM.
Tracked-On: #4808
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
With current acrn-config code, there would be no pci_dev.c generated
if no PCI devices were selected. This would cause a bug for logical_partition
scenario because of an old pci_dev.c is already in the folder and involved
for compiling. The configure tool should override the pci_dev.c, in this case,
to avoid building error.
Tracked-On: #4813
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
As VUART is not supported PCI VUART, use native PCI ttySn's IRQ for
VUART1 would cause communication failed, allocate a free IRQ for it.
Tracked-On: #4798
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
Use post_vm_id$(relative id) to identify each post-launched VM to
make sure simultaneous launching successfully.
Tracked-On: #4797
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
add board xml and default scenario config xmls and launch config
xmls for ElkhartLake boards.
Tracked-On: #4798
Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
Acked-by: Terry Zou <terry.zou@intel.com>
Assign the right acrn-dm arguments for "Soft RT/Hard RT" VMs by
'uos_type' in webUI item tag.
Tracked-On: #4799
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
Remove "idle=halt" from SOS boot args since the param could be handled
automatically by acrn-config according to CPU scheduler setting.
Tracked-On: #3854
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
Tools: cleanup acrn_mngr pause/continue message
The 'pause/continue' acrnctl cmd is never used and their action are not
defined for ACRN VMs. Remove them from README.
Tracked-On: #4790
Signed-off-by: Tao Yuhong <yuhong.tao@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Reviewed-by: Yan, Like <like.yan@intel.com>
The 'pause/continue' acrnctl cmd is never used and their action are not
defined for ACRN VMs. should be removed. Remove them from acrn_mngr.
Tracked-On: #4790
Signed-off-by: Tao Yuhong <yuhong.tao@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Reviewed-by: Yan, Like <like.yan@intel.com>
The 'pause/continue' acrnctl cmd is never used and their action are not
defined for ACRN VMs. should be removed.
Tracked-On: #4790
Signed-off-by: Tao Yuhong <yuhong.tao@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Reviewed-by: Yan, Like <like.yan@intel.com>
If HV relocation is enabled, either ACRN efi-stub or GRUB relocates
hypervisor image above HPA 256MB, thus we put hvlog and ramoops buffer
under 256MB to avoid conflict with hypervisor owned address.
This patch hardcodes these addresses:
0xa00000 - 0xdfffff: 4MiB for ramoops buffer
0xe00000 - 0xffffff: 2MiB for hvlog buffer
However, user can customize them to other addresses as long as it's under
256MB, available in host e820, and SOS bootarg "nokaslr" is not specified.
If HV relocation is disabled, need to make sure that these buffer
addresses are not between HV_RAM_START and HV_RAM_START + HV_RAM_SIZE.
Tracked-On: #4760
Signed-off-by: Zide Chen <zide.chen@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
With this patch, we relocate hypervisor image to HPA 256MB and above,
thus the hardcoded hvlog and ramoops buffer for SOS can safely reside at
addresses under HPA 256MB, given that 1:1 mapping between SOS GPA and HPA.
Tracked-On: #4760
Signed-off-by: Zide Chen <zide.chen@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
enable gvtd for waag of nuc7/nuc6 board by default.
Tracked-On: #4641
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
For nuc7/nuc6/whl-ipci5/whl-ipc-i7 board, add 4 POST_STD_VM and 1
KATA_VM in their industry config xmls, and assign PCPU0-1 to these
PRE_LAUNCHED_VM.
Tracked-On: #4641
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
Parse KATA VM count number from scenario config with vm_type 'KATA_VM'
and Remove MAX_KATA_VM_NUM from scenario config xmls.
Tracked-On: #4641
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
When passthrough device for VM, if there is no fun0 of the slot was passed
in, PCI expansion card can not respond as a device, it must implement at
least function number 0.
Tracked-On: #4641
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
Refine CPU affinity sanity check for both scenario and launch config
xmls.
Tracked-On: #4641
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
Refinement for VM type sanity check relays on VM UUID number.
Tracked-On: #4641
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
Acked-by: Terry Zou <terry.zou@intel.com>
remove configurable="0" for pci_devs of pre-launched VM so that the
passthru devices could be configurable on webUI.
Tracked-On: #4641
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
Acked-by: Terry Zou <terry.zou@intel.com>
Parse cpu_affinity from launch config xmls and generate '--cpu_affinity' as
acrn-dm args.
Tracked-On: #4641
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
Acked-by: Terry Zou <terry.zou@intel.com>
1.Remove cpu_sharing item from launch config xml.
2.Add cpu_affinity for launch config xmls to configurable POST VM cpu
affinity from webUI.
Tracked-On: #4641
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
Acked-by: Terry Zou <terry.zou@intel.com>
Change the tag name from "vcpu_affinity" to 'cpu_affinity" in all the per
board scenario xml files, and change the descritpions.
Tracked-On: #4641
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
hypervisor is replacing vm_configs[].vcpu_affinity[] array with
cpu_affinity_bitmap, the meaning of which has some changes as well.
This patch changes the names in generated vm_configuration.c:
-.vcpu_affinity = VMx_CONFIG_VCPU_AFFINITY,
+.cpu_affinity_bitmap = VMx_CONFIG_CPU_AFFINITY,
Changes in vm_configuration.h:
-#define VMx_CONFIG_VCPU_AFFINITY {AFFINITY_CPU(xU), AFFINITY_CPU(xU)}
+#define VMx_CONFIG_CPU_AFFINITY (AFFINITY_CPU(xU) | AFFINITY_CPU(xU))
Also don't generate default assignment of vcpu_num in vm_configuration.c,
because now hypervisor can easily calculate it from cpu_affinity_bitmap.
Accordingly, in the scenario xml files, tag "vcpu_affinity" is changed
to "cpu_affinity".
Tracked-On: #4641
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
When dynamically creating or adding or deleting VMs, acrn config app
will assign VM IDs for the VMs with the orders of prelaunched VMs and SOS
VM and postlaunched VMs to be consistent with the VM order of vm_configs
in vm configuration. When dynamically creating launch scripts, acrn
config app will let users to specify the VM ID before launch setting.
Tracked-On: #4641
Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Acked-by: Terry Zou <terry.zou@intel.com>
There are no board/scenario/uos_launcher attributes for created
scenario and launch settings, which causes xml mismatch error
when generating configuration files or launch scripts.
This patch is to add the attributes for scearnio and launch
settings.
Tracked-On: #4641
Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Acked-by: Terry Zou <terry.zou@intel.com>
Add max VM count check when generating scenario XML file.
Tracked-On: #4641
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
Acked-by: Terry Zou <terry.zou@intel.com>
Refine some items for configuarable="0"
Tracked-On: #4641
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
Acked-by: Terry Zou <terry.zou@intel.com>
