Commit Graph

42 Commits

Author SHA1 Message Date
Li, Fei1
e3fc6c3c79 hv: use int32_t replace int
Since it's typedef in "include/lib/types.h"

Tracked-On: #861
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2018-12-12 13:08:10 +08:00
Shiqing Gao
2f15d3569c hv: replace CPU_PAGE_SIZE with PAGE_SIZE
replace CPU_PAGE_SIZE with PAGE_SIZE
These two MACROs are duplicated and PAGE_SIZE is a more reasonable name.

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-03 15:14:57 +08:00
Junjie Mao
584f6b7255 doc: replace return with retval
`@return` is dedicated for brief description of return values, not for comments
stating actual return values. In addition, sphinx + breathe does not join
multiple adjacent `@return`. This results in multiple `Return` sections in the
generated document, which is confusing.

This patch replaces `@return` with `@retval` for the lists of return
values. Adjacent `@retval` can be joined into one list by breathe.

v1 -> v2:

* Replace return value descriptions like `negative` and `positive` with
  expressions like `<0` and `>0` in `@retval`.
* Keep the list of `@retval` comprehensive, even when there is a `@return` to
  generally describe what the return value means.
* Drop duplicated `@return` when it does not give more information than the
  `@retval` list.

Tracked-On: #1595
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
2018-11-30 14:55:17 +08:00
Junjie Mao
97eb72a4a0 doc: always use 'None' for functions not returning a value
It is preferred to state the absence of a return value explicitly in the
doxygen-stile comments. Currently there are different styles of doing this,
including:

  @return None
  @return NULL
  @return void
  @return N/A

This patch unifies the above with `@return None`.

Tracked-On: #1595
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
2018-11-30 14:55:17 +08:00
Huihuang Shi
2afa7173ef hv: vlapic: fix "Procedure has more than one exit point"
IEC 61508,ISO 26262 standards highly recommend single-exit rule.

Reduce the count of the "return entries".
Fix the violations which is comply with the cases list below:
1.Function has 2 return entries.
2.The first return entry is used to return the error code of
checking variable whether is valid.

Fix the violations in "if else" format.

Tracked-On: #861
Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-27 14:43:16 +08:00
Shiqing Gao
3731b4c0ac hv: fix '(void) missing for discarded return value'
MISRA-C requires that the function call in which the returned
value is discarded shall be clearly indicated using (void).

This patch fixes the violations related to the following
function calls.
- vlapic_set_intr
- vlapic_intr_edge

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
2018-11-13 19:24:54 +08:00
Xiangyang Wu
99586e32cc HV:treewide:rename vm data structure
For data structure types "struct vm", its name is identical
with variable name in the same scope. This is a MISRA C  violation.

Naming convention rule:If the data structure type is used by multi
modules, its corresponding logic resource is exposed to external
components (such as SOS, UOS), and its name meaning is simplistic
(such as vcpu, vm), its name needs prefix "acrn_".

The following udpates are made:
struct vm *vm-->struct acrn_vm *vm

Tracked-On: #861

Signed-off-by: Xiangyang Wu <xiangyang.wu@linux.intel.com>
2018-11-05 15:35:49 +08:00
Xiangyang Wu
fa26a16645 HV:treewide:rename vcpu data structure
For data structure types "struct vcpu", its name is identical
with variable name in the same scope. This is a MISRA C  violation.

Naming convention rule:If the data structure type is used by multi
modules, its corresponding logic resource is exposed to external
components (such as SOS, UOS), and its name meaning is simplistic
(such as vcpu, vm), its name needs prefix "acrn_".

The following udpates are made:
struct vcpu *vcpu-->struct acrn_vcpu *vcpu

Tracked-On: #861

Signed-off-by: Xiangyang Wu <xiangyang.wu@linux.intel.com>
2018-11-05 15:35:49 +08:00
Yonghua Huang
c41f286085 hv: revise interfaces description in vlapic
Add comments for APIs:
 - vlapic_pending_intr();
 - vlapic_pending_accepted();
 - vlapic_post_intr();
 - lapicv_get_pir_desc_paddr();
 - vlapic_intr_level();
 - vlapic_intr_edge();
 - vlapic_set_local_intr();
 - vlapic_intr_msi();

Tracked-On: #1595
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
2018-11-03 08:40:14 -07:00
Sainath Grandhi
cf4d191272 hv: Modify vlapic_get_apicid for x2APIC mode of vLAPIC
This patch adds support to return APIC ID if guest uses vLAPIC
in x2APIC mode.

Tracked-On: #1626
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
Reviewed-by: Xu Anthony <anthony.xu@intel.com>
2018-11-02 13:48:43 +08:00
Mingqiang Chi
1568a4c095 hv:Remove deadcode 'vm_lapic_from_pcpuid'
This api is not used, remove it.

Tracked-On: #861
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
2018-10-25 13:45:40 +08:00
Huihuang Shi
ea32c34ae1 HV:fix "Pointer param should be declared pointer to const"
Fix violations for function whose parameter can be read-only.

Tracked-On: #861
Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-10-25 13:45:14 +08:00
Yonghua Huang
38d5df723d hv:enable APICv-Posted Interrupt
to enable APICv Posted interrupt supported, following the
 specifications defined in Intel SDM Section #29.6, Volume3.

 Posted-interrupt processing is a feature by which a processor
 processes the virtual interrupts by recording them as pending
 on the virtual-APIC page.

 Injecting interrupts to VCPU from remote CPU without causing
 VM exit on the destination, following steps in SDM Section 29.6,volume3:

Tracked-On: #1447
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-10-15 22:18:24 +08:00
Mingqiang Chi
1d725c89c0 hv:Replace dynamic memory with static for vcpu
-- Replace dynamic memory allocation with static memory
-- Remove parameter check if vcpu is NULL

Tracked-On: #861
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-10-15 13:44:25 +08:00
Shiqing Gao
4544d28ee1 hv: fix 'User name starts with underscore'
There are chances that names with leading underscore declared by
developers are conflict with the ones reserved for the compiler.

What this patch does:
- rename these functions/variables/macros starting with
  underscore to avoid such unintentational mistakes.
- remove gpr.h without any contents

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-09-30 14:45:37 +08:00
Shiqing Gao
8787c06d3b hv: arch: fix 'Unused procedure parameter'
MISRA-C requires that there should be no unused parameters in
functions.

In some cases, we will keep the unused parameters.
vmexit handler is one example. It is used as function pointer.
Some of the vmexit handlers use the input parameter 'vcpu', some of
them don't. We still need to keep the unused parameters 'vcpu' for
those handlers don't use 'vcpu'.

This patch removes the unused parameters that is not being used
unconditionally.

v1 -> v2:
 * remove the non-implemented API 'vlapic_id_write_handler'

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-09-26 10:48:55 +08:00
Mingqiang Chi
aae5018bec hv:Move vlapic structure to vlapic.h
move structure vlapic_pir_desc/vlapic_timer/
acrn_vlapic from vlapic_priv.h to vlapic.h

Tracked-On: #861
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-09-12 09:20:07 +08:00
Yonghua Huang
7bc1a3f925 HV: Refine APICv capabilities detection
- by default, ACRN will not support platform without
   below APICv features:
    -- Use TPR shadow
    -- APIC-register virtualization

 - remove mmio emualtion of local APIC for guest

Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-08-24 09:58:58 +08:00
Yu Wang
a0c625b85a hv: apicv: change the apicv related API with vlapic_apicv prefix
The apicv is one hardware acceleration feature of vlapic. All vlapic
APIs should keep vlapic_ as the prefix.

Signed-off-by: Yu Wang <yu1.wang@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-08-23 08:55:30 +08:00
Shiqing Gao
3e598ebb28 hv: fix 'No definition in system for prototyped procedure'
Remove the functions without definition.

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
2018-08-22 13:11:25 +08:00
Shiqing Gao
7a4dcfcc1a hv: treewide: fix 'Function prototype/defn param type mismatch'
Fix the parameter type mismatch between API declaration and definition.

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-08-21 09:55:12 +08:00
Shiqing Gao
b4a2ff5022 hv: treewide: fix 'Prototype and definition name mismatch'
Fix the parameter name mismatch between API declaration and definition.

v2 -> v3:
 * Fix two more violations which are missed in previous report.
   shell_puts and console_write

v1 -> v2:
 * Replace 'ret_desc' with 'desc'

Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
2018-08-06 16:04:40 +08:00
Shiqing Gao
51c75e9e3c hv: treewide: fix 'Function prototype/defn param type mismatch'
Fix the parameter type mismatch between API declaration and definition.

Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-08-01 15:53:29 +08:00
Xiangyang Wu
33fdfd05f1 HV:treewide:rename struct vlapic as struct acrn_vlapic
There are many naming violations detected by static analysis
tool. Data structure type name is the same as variable name.
According to naming convention rules, If the data structure
type is used by multi modules and its name meaning is
simplistic (such as vcpu, vm), its name needs prefix "acrn_".

Rename struct vlapic as struct acrn_vlapic
Replace regular expression:s/struct vlapic\([ ),;\t\*]\+\)/struct acrn_vlapic\1

Signed-off-by: Xiangyang Wu <xiangyang.wu@linux.intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-27 11:27:12 +08:00
Junjie Mao
88f74b5dbb HV: io: unify vhm_request req and mem_io in vcpu
The current struct vcpu has two members, namely 'struct vhm_request req' and
'struct mem_io mmio', that hold similar info, including the address, direction, size,
value and status of mmio reqeusts.

As a step towards a unified framework for both MMIO/PIO, this patch unifies
these two members by a tailored version of vhm_reqeust, mostly with the reserved
fields dropped. The definitions to request types, directions and process status
are reused.

Handling errors during emulations will be revisited after the I/O emulation
paths are unified. Thus for this patch the mmio.mmio_status in inherited by
io_req.processed which is not yet properly processed.

Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-27 10:50:19 +08:00
Huihuang Shi
5189bcd272 HV:treewide:fix "Attempt to change parameter passed by value"
In the function scope,the parameter should not be
changed as Misra required.
V1->V2 recover some violations because of ldra's false positive.
V2->V3 sync local variable' type to parameter's type with the prefix of const.

Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-26 09:35:52 +08:00
Shiqing Gao
0252ae9e11 hv: treewide: fix 'No definition in system for prototyped procedure'
- Remove those APIs without definition

- Minor changes to make sure the line length is less than 80

Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-20 10:38:32 +08:00
Zheng, Gen
20c80ea72a HV: bug fix on emulating msi message from guest
Current code has a mistake associating destination with
redirectionhint. So just use the destination mode to work out
destination mode.

When injecting the msi interrupt to vcpu in hypervisor layer,
current code ingnores the redirection hint(RH) bit of msi address
message from guest, and just use the destination mode and
destination ID. So correctly before injecting, check the RH bit,
if set, choose the vcpu that has lowest priority to inject msi.

Signed-off-by: Zheng, Gen <gen.zheng@intel.com>
Reviewed-by: Zhao, Yakui <yakui.zhao@intel.com>
Reviewed-by: Yin, Fengwei <fengwei.yin@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-19 11:09:09 +08:00
Junjie Mao
e3452cf804 HV: vlapic: minimize explicit casts by adjusting types
To minimize explicit casts, this patch adjusts the types of function parameters
and structure fields related to vlapic and update the types in the internal
implementation accordingly.

Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Dong Eddie <eddie.dong@intel.com>
2018-07-13 10:02:44 +08:00
Mingqiang Chi
9d8893e499 hv:rename several APIs in vlapic.c
rename 4 APIs:
  x2apic_msr -> is_ x2apic_msr
  vlapic_msr -> is_vlapic_msr
  vlapic_mmio_write -> vlapic_write_mmio_reg
  vlapic_mmio_read -> vlapic_read_mmio_reg

Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
2018-07-05 10:00:43 +08:00
Xiangyang Wu
188210ab03 HV:Treewide:Update the type of vcpu id as uint16_t
In the hypervisor, virtual cpu id is defined as "int" or "uint32_t"
type in the hypervisor. So there are some sign conversion issues
about virtual cpu id (vcpu_id) reported by static analysis tool.
Sign conversion violates the rules of MISRA C:2012.

BTW, virtual cpu id has different names (vcpu_id, cpu_id, logical_id)
 for different modules of HV, its type is defined as "int" or "uint32_t"
in the HV. cpu_id type and logical_id type clean up will be done in
other patchs.

V1-->V2:
         More clean up the type of vcpu id;
         "%hu" is for vcpu id in the print function.

Signed-off-by: Xiangyang Wu <xiangyang.wu@intel.com>
2018-07-04 14:28:52 +08:00
Xiangyang Wu
a97593e7db HV:treewide:Update return type of function ffs64 and ffz64
To reduce type conversion in HV:
Update return type of function ffs64 and ffz64 as uint16;
For ffs64, when the input is zero, INVALID_BIT_INDEX is returned;
Update temporary variable type and return value check of caller
when it call ffs64 or ffz64;

Note: In the allocate_mem, there is no return value checking for
calling ffz64, this will be updated latter.

V1-->V2:
        INVALID_BIT_INDEX instead of INVALID_NUMBER
        Coding style fixing;
        INVALID_CPU_ID instead of INVALID_PCPU_ID or INVALID_VCPU_ID;
        "%hu" is used to print vcpu id (uint16_t);
        Add "U/UL" for constant value as needed.
V2-->V3:
        ffs64 return INVALID_BIT_INDEX directly when
        the input value is zero;
        Remove excess "%hu" updates.
V3-->V4:
        Clean up the comments of ffs64;
        Add "U" for constant value as needed.

Signed-off-by: Xiangyang Wu <xiangyang.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-02 15:11:22 +08:00
Xiangyang Wu
3027bfab10 HV: treewide: enforce unsignedness of pcpu_id
In the hypervisor, physical cpu id is defined as "int" or "uint32_t"
type in the hypervisor. So there are some sign conversion issues
about  physical cpu id (pcpu_id) reported by static analysis tool.
Sign conversion violates the rules of MISRA C:2012.

In this patch, define physical cpu id as "uint16_t" type for all
modules in the hypervisor and change related codes. The valid
range of pcpu_id is 0~65534, INVALID_PCPU_ID is defined to the
invalid pcpu_id for error detection, BROADCAST_PCPU_ID is
broadcast pcpu_id used to notify all valid pcpu.

The type of pcpu_id in the struct vcpu and vcpu_id is "int" type,
this will be fixed in another patch.

V1-->V2:
    *  Change the type of pcpu_id from uint32_t to uint16_t;
    *  Define INVALID_PCPU_ID for error detection;
    *  Define BROADCAST_PCPU_ID to notify all valid pcpu.

V2-->V3:
    *  Update comments for INVALID_PCPU_ID and BROADCAST_PCPU_ID;
    *  Update addtional pcpu_id;
    *  Convert hexadecimals to unsigned to meet the type of pcpu_id;
    *  Clean up for MIN_PCPU_ID and MAX_PCPU_ID, they will be
       defined by configuration.
Note: fix bug in the init_lapic(), the pcpu_id shall be less than 8,
this is constraint by implement in the init_lapic().
Signed-off-by: Xiangyang Wu <xiangyang.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-21 16:59:21 +08:00
Yonghua Huang
32fccb2f43 HV: 'vlapic_set_local_intr()' code cleanup
change the argument 'cpu_id' to 'vcpu_id'

Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
2018-06-20 15:06:49 +08:00
Yan, Like
d8c8403561 hv: replace vlapic_init by vlapic_reset in vcpu_reset
This change is to fix a guest vm hang issue at vm reset, especially easy to
be seen when it's a watchdog timeout reset.
vlapic_init create and init vlapic.vlapic_timer without deleting the
timer from cpu_times list, which breaks the list, results in a timer remains
with callback points to an invalid location.

Acked-by: Eddie Dong <eddie.dong@intel.com>
Signed-off-by: Yan, Like <like.yan@intel.com>
2018-06-14 15:44:09 +08:00
Junjie Mao
8c4a5987e3 irq: convert irq/vector numbers to unsigned
Currently irq and vector numbers are used inconsistently.

    * Sometimes vector or irq ids is used in bit operations, indicating
      that they should be unsigned (which is required by MISRA C).

    * At the same time we use -1 to indicate an unknown irq (in
      common_register_handler()) or unavailable irq (in
      alloc_irq()). Also (irq < 0) or (vector < 0) are used for error
      checking. These indicate that irq or vector ids should be signed.

This patch converts irq and vector numbers to unsigned 32-bit integers, and
replace the previous -1 with IRQ_INVALID or VECTOR_INVALID. The branch
conditions are updated accordingly.

Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-12 10:21:58 +08:00
Li, Fei1
5a47c267e3 hv: vlapic: simple vlapic_rd/wr input
Remove unnecessary input parameters

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2018-05-15 17:19:38 +08:00
Yonghua Huang
d6904b412c hv: rename VM exit handlers in vlapic
to keep aligned with the vmexit reasons' name defined in
SPEC.

Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
2018-05-15 17:19:37 +08:00
Yonghua Huang
7d8803f5ea hv:enable APICv features based on CPU capability
this patch is to detect and enable only APICv features which
are actually supported by the processor, instead fo tuning on
all features by default.

Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
2018-05-15 17:19:37 +08:00
Yonghua Huang
f01a8eef58 Add APIC ACCESS VMexit handler
Update 'apic_access_exit_handler()' function to emulate
guest instruments to read/write guest's lapic registers page

Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
2018-05-15 17:19:37 +08:00
Jason Chen CJ
fcb95d02d6 uefi: init vlapic according to native lapic
this patch save native lapic configuration and restore it to vm0's vlapic
before its running, then doing hpet timer interrupt injection through vlapic
interface -- this will not mess up vlapic and we can see hpet
timer interrupt coming continuously.

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
2018-05-15 17:19:37 +08:00
Eddie Dong
7a3a539b17 initial import
internal commit: 14ac2bc2299032fa6714d1fefa7cf0987b3e3085

Signed-off-by: Eddie Dong <eddie.dong@intel.com>
2018-05-11 14:44:28 +08:00