Commit Graph

149 Commits

Author SHA1 Message Date
David B. Kinder
69af3a901b doc: fix API documentation misspellings
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2018-05-30 13:11:22 -07:00
Binbin Wu
ebea5e5ae4 hv: remove unused API init_cpu
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
2018-05-30 14:55:57 +08:00
Binbin Wu
fb1248e5d9 hv: remove cr3 handling from cr_access_vmexit_handler
Guest CR3 read/write operations are not trapped.
Remove CR3 handling in cr_access_vmexit_handler.
Also remove unused API vmx_read_cr3.

Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
2018-05-30 14:55:57 +08:00
Binbin Wu
2df7b96a23 hv: make control register handling functions to public
Move from vmexit.c to vmx.c
Declare the functions in vmx.h
Rename the functions' name with prefix vmx_.

Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
2018-05-30 14:55:57 +08:00
Kaige Fu
80a79fed39 HV: Replace printf with pr_acrnlog after logmsg init
There are some massages which is not fatal error but should to print
to serial and sbuf(hvlog) at the same time. pr_fatal is for fatal error
massages and it is not good choice for the situation above.

Introduce a new API pr_acrnlog to deal with the situation. And replace the
following printf with pr_acrnlog for massages should be print to sbuf and
serial. Then developers can get those massages on serial and BTM(Boot Time
Measurement) can use acrnlog to get those massages from sbuf.

BTM refers to Boot Time Measurement which will read acrnlog file to get
timestamps of steps we want.

Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
2018-05-30 14:49:09 +08:00
Li, Fei1
6c8fc0a4df hv: remove vm_description_array
When we create an UOS, we didn't indicate the vmid.
Thus we can't get the vm description for the vm
description array.

Instead we use a temporary vm description to save data to
fill the vm structure when crate an UOS. It's uselesss once
UOS has created. So we don't need to maintain vm description
array here for UOS.

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
2018-05-30 14:01:56 +08:00
Li, Fei1
574bdc3aef hv: panic will print function name and line number
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
2018-05-30 14:01:56 +08:00
huihuang.shi
1a5370a253 fix "warning:redefinition of typedef 'uint32_t'"
uint32_t occures two times in hypervisor/include/lib/types.h,
remove one of them.
Signed-off-by: huihuang.shi <huihuang.shi@intel.com>
2018-05-30 13:52:52 +08:00
Junjie Mao
2266e133fb lapic: continuous LVT registers as an array
Pointer arithmetic is currently used to calculate the address of a specific
Local Vector Table (LVT) register (except LVT_CMCI) in lapic, since the
registers are continuously placed with fixed padding in between. However each of
these registers are declared as a single uint32_t in struct lapic, resulting
pointer arithmetic on a non-array pointer which violates MISRA C requirements.

This patch refactors struct lapic by converting the LVT registers fields (again
except LVT_CMCI) to an array named lvt. The LVT indices are reordered to reflect
the order of the LVT registers on hardware, and reused to index this lvt array.

The code before and after the changes is semantically equivalent.

Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
2018-05-30 13:52:11 +08:00
Jason Chen CJ
7718338008 exception: add vcpu_inject_pf support
add page fault exception injection support

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Tian, Kevin <kevin.tian@intel.com>
2018-05-30 13:51:49 +08:00
Jason Chen CJ
75a03bf0f7 exception: use func vcpu_queue_exception to inject exception
use func vcpu_queue_exception for vcpu_inject_gp and exception_vmexit_handler.

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Tian, Kevin <kevin.tian@intel.com>
2018-05-30 13:51:49 +08:00
Jason Chen CJ
277830aba8 exception: add vcpu_queue_exception function
add func vcpu_queue_exception to queue exception based on SDM Vol3 Table 6-5,
which may cause #DF or triple fault

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Tian, Kevin <kevin.tian@intel.com>
2018-05-30 13:51:49 +08:00
Jason Chen CJ
44af2690f6 add triple fault request support
if vcpu meet triple fault, the vcpu should exit.

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Tian, Kevin <kevin.tian@intel.com>
2018-05-30 13:51:49 +08:00
Jason Chen CJ
4607177383 replace pending_intr with pending_req
the pending_intr is not only serving for interrupt but also for different
request including TLB & TMR updating, so change the function & variants
name accordingly.

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-30 13:51:49 +08:00
Junjie Mao
16152fad79 HV: debug: stop using ## __VA_ARGS__
It is an extension of GCC CPP to:

* allow omitting a variable macro argument entirely, and
* use ## __VA_ARGS__ to remove the the comma before ## __VA_ARGS__ when
  __VA_ARGS__ is empty.

The only use of ## _VA_ARGS__ is to define the pr_xxx() macros, with the first
argument being the format string and the rest the to-be-formatted arguments. The
format string is explicitly spelled out because another macro pr_fmt() is used
to add to the format string a prefix which is customizable by defining what
pr_fmt() expands to.

For C99 compliance, this patch changes the pr_xxx() macros in the following
pattern.

    - #define pr_fatal(fmt, ...)				\
    -     do_logmsg(LOG_FATAL, pr_fmt(fmt), ## __VA_ARGS__);	\
    + #define pr_fatal(...)					\
    +     do_logmsg(LOG_FATAL, pr_prefix __VA_ARGS__);		\

Reference:

* https://gcc.gnu.org/onlinedocs/gcc/Variadic-Macros.html#Variadic-Macros

Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
2018-05-29 14:13:44 +08:00
Junjie Mao
004d2e2696 HV: treewide: give names to unnamed structs/unions
According to the syntax defined in C99, each struct/union field must have an
identifier. This patch adds names to the previously unnamed fields for C99
compatibility.

Here is a summary of the names (marked with a pair of *stars*) added.

struct trusty_mem:

    union {
        struct {
            struct key_info key_info;
            struct trusty_startup_param startup_param;
        } *data*;
        uint8_t page[CPU_PAGE_SIZE];
    } first_page;

struct ptdev_remapping_info:

    union {
        struct ptdev_msi_info msi;
        struct ptdev_intx_info intx;
    } *ptdev_intr_info*;

union code_segment_descriptor:

    uint64_t value;
    struct {
        union {
            ...
        } low32;
        union {
            ...
        } high32;
    } *fields*;

    similar changes are made to the following structures.
    * union data_segment_descriptor,
    * union system_segment_descriptor,
    * union tss_64_descriptor, and
    * union idt_64_descriptor

struct trace_entry:

    union {
        struct {
            uint32_t a, b, c, d;
        } *fields_32*;
        struct {
            uint8_t a1, a2, a3, a4;
            uint8_t b1, b2, b3, b4;
            uint8_t c1, c2, c3, c4;
            uint8_t d1, d2, d3, d4;
        } *fields_8*;
        struct {
            uint64_t e;
            uint64_t f;
        } *fields_64*;
        char str[16];
    } *payload*;

Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
2018-05-29 14:12:15 +08:00
Junjie Mao
ef3cb5ba1c treewide: remove unnecessary unnamed structs/unions
According to the syntax defined in C99, each struct/union field must have an
identifier. This patch removes unnamed struct/union fields that can be easily
expressed in a C99-compatible way.

Here is a summary of structs/unions removed.

struct vhm_request:

    union {
        uint32_t type;                  uint32_t type;
        int32_t reserved0[16];    =>    int32_t reserved0[15];
    };

struct vhm_request_buffer:

    struct vhm_request_buffer {
        union {                         union vhm_request_buffer {
            struct vhm_request ...; =>        struct vhm_request ...;
            int8_t reserved[4096];            int8_t reserved[4096];
        }                               }
    }

Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
2018-05-29 14:12:15 +08:00
Zide Chen
8f16faab04 HV: further cleanup of header inclusions
According to the comments in hypervisor:
 " This file includes config header file "bsp_cfg.h" and other
	hypervisor used header files.
	It should be included in all the source files."

this patch includes all common header files in hypervisor.h
then removes other redundant inclusions

Signed-off-by: Zide Chen <zide.chen@intel.com>
2018-05-25 10:45:56 +08:00
Li, Fei1
34445008c2 hv: add non-lock bitmap operation
Add __bitmap_set/clear,
__bitmap_test_and_set/clear.

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-25 09:42:03 +08:00
Li, Fei1
efb60e2726 hv: refine bit scan API
Rename
bsrl to bsr
bsrq to bsr64
bitmap_ffs to fls64
get_first_zero_bit to ffz64

Remove
ffsl

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2018-05-25 09:42:03 +08:00
Li, Fei1
57d0bf3b7c hv: refine bitops
Rename bitmap_clr to bitmap_clear
Rename bitmap_isset to bitmap_test
Remove bitmap_setof

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-25 09:42:03 +08:00
Jason Chen CJ
67dfec8799 vmexit: refine vmexit loop
- move vmexit handling into vmexit_handler
- add error handling, failure will inject #GP

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-24 13:42:19 +08:00
Jason Chen CJ
2ff7bf826e page walk during copy_from_vm/copy_to_vm
there are data transfer between guest(GPA) & hv(HPA), especially for
hypercall from guest.

guest should make sure these GPAs are address continous, but hv cannot
assure HPAs which mapped to these GPAs are address continous, for example,
after enable hugetlb, a contious GPA range could come from two different
2M pages.

this patch is handling such case by doing gpa page walking during
copy_from_vm & copy_to_vm.

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-24 13:42:19 +08:00
Binbin Wu
744e09bc7e hv: define 4 vcpu modes
move enum vm_cpu_mode to guest.h
move enum vm_paging_mode to guest.h
replace REAL_MODE with CPU_MODE_REAL
replace PAGE_PROTECTED_MODE with CPU_MODE_64BIT

Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-24 10:16:48 +08:00
Mingqiang Chi
7c9cc6bcd4 hv:Merge dump_interrupt and dump_exception to a commond API
merge these two APIs to 'dump_intr_excp_frame'

Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-23 13:38:52 +08:00
Mingqiang Chi
8384ed2564 hv:rename data structure intr_ctx
rename intr_ctx to intr_excp_ctx

Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-23 13:38:52 +08:00
Mingqiang Chi
88b8ce8362 hv: move structure(intr_ctx) to irq.h
move intr_ctx to irq.h, delete intr_ctx.h

Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-23 13:38:52 +08:00
David B. Kinder
04572a76a8 doc: add missing param documentation hypercall.h
Add missing documentation for hcall_get_cpu_pm_state vm parameter

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2018-05-23 11:11:26 +08:00
Jason Chen CJ
fcd79325e1 doxygen: fix wrong description in hypercall.h
fix wrong description for hcall_get_cpu_pm_state/hcall_world_switch

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
2018-05-22 16:39:24 +08:00
Kaige Fu
d2191401c8 HV: Trace: Remove macro GEN_CASE
Macro GEN_CASE in hypervisor is not used. It's just for userspcace tool
acrntrace and we get one copy of it in ./tools/acrntrace/trace_event.h.
So, remove it.

Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
Reviewed-by: Yan, Like <like.yan@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-22 11:11:09 +08:00
Mingqiang Chi
2175bcafa1 hv: replace _EC with _ERROR_CODE in VMCS field
EC is not clear, replace it with ERROR_CODE.

Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
2018-05-21 15:11:23 +08:00
Yin Fengwei
6ef48fa30e hv: Add reboot shell command
To trigger warm reboot for debugging.

Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Eddie Dong <Eddie.dong@intel.com>
2018-05-18 16:38:40 +08:00
Victor Sun
99189b4e48 HV: cleanup for io request related functions
Changes:
  1. Move io request related functions from hypercall.c to io_request.c
     since they are not hypercalls;
  2. Remove acrn_insert_request_nowait() as it is never used;

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-18 16:36:33 +08:00
Li, Fei1
edb26a7e17 hv: refine the left atomic operation
rename atomic_cmpxchg_int to atomic_cmpxchg
replace atomic_cmpset_long with atomic_cmpxchg64
rename atomic_readandclear_long to atomic_readandclear64

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@Intel.com>
2018-05-18 10:52:31 +08:00
Li, Fei1
1f3da93e74 hv: refine atomic_load/store_xxx name
rename atomic_load/store_xxx32 to atomic_load/store
rename atomic_load/store_xxx64 to atomic_load64/store64

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-18 10:52:31 +08:00
Li, Fei1
336a8883db hv: remove atomic_add/subtract API
add atomic_inc(64)/dec(64) API.

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-18 10:52:31 +08:00
Li, Fei1
fadaf14a94 hv: refine atomic_xadd
1. rename atomic_xadd_int to atomic_xadd, add atomic_xadd64.
2. add atomic_add/sbu64_return, atomic_inc/dec64_return.

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2018-05-18 10:52:31 +08:00
Li, Fei1
0a83cf462d hv: remove support atomic operation for char/short
From now on, only plan to support atomic operation for int/long.

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-18 10:52:31 +08:00
Li, Fei1
5e427f340e hv: lib: split atomic operation to atomic.h
split atomic related operation to file atomic.h

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-18 10:52:31 +08:00
Jason Chen CJ
71e1ae17ce hypercall: add set_memmaps hypercall support
Add set_memmaps hypercall to support multi regions memmap.

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-17 15:34:18 +08:00
Jason Chen CJ
a6ff3a9bdc vm: allocated all pcpus to vm0 at the beginning
allocated all pcpus to vm0 to handle possible AP wakeup flow for all cpus,
as we pass org ACPI table to VM0 - that means VM0 can see all CPUs.

SOS(VM0) start expected CPUs through "maxcpus=" kernel cmdline option.

During first hypercall from SOS, calling vm_fixup to free un-expect-enabled
vcpus from VM0.

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Xu, Anthony <anthony.xu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-17 10:23:27 +08:00
Jason Chen CJ
d2a7a9c91d uefi: remove warkaround for AP wakeup
remove sipi_from_efi_boot_service_exit & efi_deferred_wakeup_pcpu workaround
for uefi boot flow

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Xu, Anthony <anthony.xu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-17 10:23:27 +08:00
Qi Yadong
2ea3b49858 HV: refine copy_from_vm/copy_to_vm
If the target is an array, then only the first element
will be copied.
So replace structure assignment with memcpy_s().

Signed-off-by: Qi Yadong <yadong.qi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-17 10:21:38 +08:00
Edwin Zhai
e1bb372763 HV: increase UOS VIOAPIC pin count
To avoid UOS virtual GSI sharing

Signed-off-by: Edwin Zhai <edwin.zhai@intel.com>
2018-05-16 15:09:48 +08:00
Kaige Fu
497eadcb9a lib: Move all str ops functions to one src file
Move all string operations functions into a single
source code file, instead of the various source
code files that just implement a single or few
function.

No functional change.

Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-16 11:57:11 +08:00
Zhao Yakui
698b53adc4 HV: Add one correct Descriptor_table struct to configure VMCS
Now one uint64_t type is used to obtain the corresponding descriptor_table
for GDT/IDT. This will cause the stack protect corruption under -O2.
So the descriptor_table struct is added to configure the GDT/IDT of VMCS.

V1->V2: Move the descriptor_table into vmx.h header file
And its type is renamed from dt_addr_t to descriptor_table.

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Signed-off-by: Zheng Gen <gen.zheng@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-15 18:03:33 +08:00
Zhao Yakui
b2cadfecdf HV: Fix the incorrect operand-constraints for inline assembly
The RFLAGS will be touched in some inline assembly.(exec_vmxon/
RFLAGS_RESTORE). The "cc" constraint should be added. Otherwise
it won't be handled under -O2 option.
And "%%XXX" register should also be added into constraints.
Otherwise it will be optimized incorrectly.

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Signed-off-by: Zheng Gen <gen.zheng@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-15 18:03:33 +08:00
Li, Fei1
9dd7d27737 hv: vlapic_timer: refine vlapic tscdeadline timer
Add vlapic_create_timer/vlapic_reset_timer to setup/reset a timer.
Add vlapic_update_lvtt to disarm timer when mode changes.

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-15 18:03:33 +08:00
Li, Fei1
5df2efad4a hv: timer: make the timer list be ordered
make the timer list be ordered to speed up expried timer
process and next timer event finding.

Add timer would not schedule timer unless it's the next
timer event.

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-15 18:03:33 +08:00
Victor Sun
c53a04f56c HV: rename acrn_register to acpi_generic_address
The name of acrn_register is too generic, rename to acpi_generic_address
which is more common.

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Kevin Tian <kevin.tian@intel.com>
2018-05-15 17:25:59 +08:00