Commit Graph

1945 Commits

Author SHA1 Message Date
Li, Fei1
709cd5749e hv: lib: add ffz64_ex
Add ffz64_ex to find the first zero bit in a uint64_t array.
Note: the API is lockless.

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2018-08-17 14:27:12 +08:00
Yan, Like
538173838d hv: pirq: change the order of functions within irq.c
This commit changes the order of functions in arch/x86/irq.c, and internal
function names to make it looks cleaner, with no change within any function.

Signed-off-by: Yan, Like <like.yan@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-08-17 14:25:52 +08:00
Yan, Like
a8cd6925fc hv: pirq: clean up irq handlers
There are several similar irq handlers with confusing function names and it's
not friendly to call update_irq_handler() to update a proper handler after
request_irq().

With this commit, a single generic irq handler is being used, in which, no lock
need to be acquired because our design could guarantee there is no concurrent
irq handling and irq handler request/free.
A flags field is added to irq_desc struct to select the proper processing flow
for an irq. Irqflags is defined as follows:
 IRQF_NONE       (0U)
 IRQF_LEVEL      (1U << 1U)       /* 1: level trigger; 0: edge trigger */
 IRQF_PT         (1U << 2U)       /* 1: for passthrough dev */

Because we have only one irq handler, update_irq_handler() should be replace by
set_irq_trigger_mode(), whichs set trigger mode flag of a certian irq.
Accordingly, the code where called update_irq_handler() need to be updated.

Signed-off-by: Yan, Like <like.yan@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-08-17 14:25:52 +08:00
Yan, Like
2c044e0c4e hv: pirq: refactor vector allocation/free
This commit refactors vector allocation/free codes, two functions are
defined to help alloc/free vectors for an irq:
- uint32_t alloc_irq_vector(uint32_t irq)
  - alloc a free vector (0x20 ~ 0xDF), and bind it to irq, for legacy irqs
    and static mapped irqs, vector has been allocated and bind, so just
    check the mapping correctness;
  - return: valid vector on success, VECTOR_INVALID on failure.

- void free_irq_vector(uint32_t irq)
  - free vector allocated via alloc_irq_vector(), for legacy irqs and static
    mapped irqs, nothing need to do.

Signed-off-by: Yan, Like <like.yan@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-08-17 14:25:52 +08:00
Yan, Like
1bf2fc342a hv: pirq: refactor irq num alloc/free
This commit refactors the alloc/free irq num, two functions are defined:
- uint32_t alloc_irq_num(uint32_t irq)
  - if irq is valid, mark the irq_desc as used; if it's IRQ_INVALID,
    alloc a free irq, or else do nothing;
  - return: irq num on success, or IRQ_INVALID on failure.

- void free_irq_num(uint32_t irq)
  - free the irq num allocated via alloc_irq_num();

And a global spinlock to protect it from concurrent allocation/free.

Signed-off-by: Yan, Like <like.yan@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-08-17 14:25:52 +08:00
Yan, Like
f77d885d7e hv: pirq: clean up unnecessary fields of irq_desc
This commit cleans up fiels of struct irq_desc:
- remove name, irq_desc_state, irq_cnt and irq_lost_cnt which are not used.
- remove irq_ prefix of irq_lock field of struct irq_desc;
- change enum irq_state to enum irq_use_state;

Signed-off-by: Yan, Like <like.yan@intel.com>
Reviewed-by: Li, Fei <fei1.li@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-08-17 14:25:52 +08:00
Mingqiang Chi
bdcc3aef22 hv: fixed compiling warning
removed some unnecessary variables and functions.

v1-->v2:
   Replace div-by-zero with an inline ASM code

Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-08-17 12:36:53 +08:00
Shiqing Gao
40745d90c5 hv: vuart: fix the data type violations
- Fix the data type violations based on MISRA-C requirements
- Add '-fsigned-char' in Makefile to let the compiler treats 'char' be
   signed, like 'signed char'.
  Otherwise, the static checker treats 'char', 'signed char' and 'unsigned
   char' as three different types.
- Fix some minor coding style issues, such as TAB issues, line over 80
   characters issues and comments style

v1 -> v2:
 * fix the violation regarding to 'fifo_getchar'

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
2018-08-17 11:19:45 +08:00
Liang Yang
d82a86e648 DM USB: xHCI: enable USB xHCI emulation in LaaG and AaaG.
Change launch_uos.sh to enable USB xHCI full emulation support.

Signed-off-by: Liang Yang <liang3.yang@intel.com>
Signed-off-by: Xiaoguang Wu <xiaoguang.wu@intel.com>
Reviewed-by: Yu Wang <yu1.wang@intel.com>
Reviewed-by: Binbin Wu<binbin.wu@intel.com>
2018-08-17 11:18:23 +08:00
Sainath Grandhi
150b389120 hv: fix size issue in mptable guest copy - ACRN partition mode
1)Fix to take into account the size of proc entries in MPtable.
2)Change APIC ids to virtual APIC IDs

Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
2018-08-17 10:06:38 +08:00
Sainath Grandhi
0c93a1388c hv: sw_loader for VMs in ACRN partition mode
ACRN in partition mode needs to boot VMs from HV. This patch make ACRN
treat all VMs in the same way (as vm0)  w.r.t. setting up the guest memory
for kernel, bootargs and zeropage

Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
2018-08-17 10:04:51 +08:00
Sainath Grandhi
fce586220f hv: vm_description fix for partition ACRN
1) Changed VM memory size from 2 GB to 512 MB
	Some platforms might not have a total of 4 GB above 4 GB in host e820
	With this change, we need a total of only 1 GB above 4 GB in host e820
2) Update e820 entries for the above change
3) type fix for VM1_CPUS and VM2_CPUS

Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
2018-08-17 10:03:59 +08:00
Sainath Grandhi
38a1898542 hv: Fix comments referring to wrong hypervisor name
Fix comments referring to wrong hypervisor name

Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
2018-08-17 10:03:32 +08:00
Arindam Roy
d3db5a6705 HV: Add const qualifiers where required
V1:
In order to better comply with MISRA C,
add const qualifiers whereeven required.
In the patch, these are being added to pointers
which are normally used in "get" functions.

V2: Corrected the issues in the patch
pointed by Junjie in his review comments.
Moved the const qualifiers to the correct
places. Removed some changes which are not
needed.

V3: Updated patch comment.
This modifies a subset of all the functions
which might need constant qualifiers
for the their parameters.
This is not and exhaustive patch. This only
targets obvious places where we can use
the const qualifier. More changes will be
submitted in future patches, if required.

Signed-off-by: Arindam Roy <arindam.roy@intel.com>
2018-08-17 10:02:12 +08:00
Yu Wang
e280d9569a hv: vmx_vapic: fix two build warnings
vlapic_vmx_vapic_set_tmr is nobody use now, remove it first to avoid
build warning.

Signed-off-by: Yu Wang <yu1.wang@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-08-17 08:57:31 +08:00
Yu Wang
39b4fecab9 hv: apicv: explicit log for SMI IPI unsupported
ACRN currently do not support SMM and SMI. Print one explicit warning
for it.

Signed-off-by: Yu Wang <yu1.wang@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-08-17 08:57:31 +08:00
Yu Wang
604b5a454b hv: apicv: remove APIC_OFFSET_SELF_IPI(0x3F0) register
From SDM Vol3 Table 10-1 Local APIC Register Address Map. The 0x3F0 is
reserved.

Signed-off-by: Yu Wang <yu1.wang@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-08-17 08:57:31 +08:00
Yu Wang
93f91268c9 hv: apicv: remove x2apic related code
Currently, ACRN hasn't expose x2apic capability through cpuid.
And x2apic related code in vlapic.c has no real functionality. This
patch clear related code.

Signed-off-by: Yu Wang <yu1.wang@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-08-17 08:57:31 +08:00
Yu Wang
8d383185ec hv: virq: disable interrupt-window exiting in vmexit handler
In interrupt-window exiting handler, disable it directly even there has
pending interrupts. The later acrn_handle_pending_request will
re-evaluation and re-enable it if needed.

Signed-off-by: Yu Wang <yu1.wang@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-08-17 08:57:31 +08:00
ailin,yang
f4513f903d update to fix format issue of ReST
accept the feedback from David
align the content to meet the ReST
2018-08-16 09:02:15 -07:00
ailin,yang
5a6ee3f3b3 update doc -Using Ubuntu as the Service OS
1, update contents to align latest acrn and clear Linux release
2, change /etc/grub.d/40_custom file to specify 'insmod ext2', not 'insmod ext4' and github issue- https://github.com/projectacrn/acrn-hypervisor/issues/707
3, add tap device and network sharing enabling script as the example for ubuntu SOS
4, add several tips for new user to use ubuntu as the SOS

Signed-off-by: ailun258 ailin.yang@intel.com
2018-08-16 09:02:15 -07:00
CHEN Gang
4ecbdf06fb tools: acrn-crashlog: update core_pattern content conditionally
This patch is to improve the way of updating the core_pattern content
in the shell script, since the previous configuration in core_pattern
will block coredumpctl.
This patch adds an inspection before changing the content of
core_pattern.

Signed-off-by: CHEN Gang <gang.c.chen@intel.com>
Reviewed-by: Zhi Jin <zhi.jin@intel.com>
Reviewed-by: xiaojin2 <xiaojing.liu@intel.com>
Reviewed-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
Acked-by: Zhang Di <di.zhang@intel.com>
2018-08-16 08:26:05 -07:00
ailin,yang
8ff0efc5da update user name cl_sos
verified again, with user name cl-sos. it doesn't work to fix #663 
but cl_sos is working, so update the user name to cl_sos.  that means 
clear has naming rules for user name
2018-08-16 08:22:23 -07:00
Zhao Yakui
99e8997504 DM: Add boot option of "i915.enable_guc=0" to disable Guc on UOS new kernel
The guc boot option is refined on the new linux kernel. The boot option of
"i915.enable_guc=0" should be added in order to disable Guc instead of using
"enable_guc_loading/submission". But in order to use the same boot option on
multi kernel, both of them are kept.

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Reviewed-by: Binbin Wu<binbin.wu@intel.com>
2018-08-16 16:28:17 +08:00
Zhao Yakui
36d5fdbf04 DM/Samples: Add the boot option of "i915.enable_guc=0" to disable guc on SOS new kernel
The guc boot option is refined on the new linux kernel. The boot option of
"i915.enable_guc=0" should be added in order to disable Guc instead of using
"enable_guc_loading/submission". But in order to use the same boot option on
multi kernel, both of them are kept.

V1->V2: Add the option on APL-NUC platform

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Reviewed-by: Binbin Wu<binbin.wu@intel.com>
2018-08-16 16:28:17 +08:00
Sainath Grandhi
5b8c7a5b23 hv: VM BSP vcpu mode for ACRN partition mode
BSPs for VMs booted in ACRN partition mode start in protected mode.

Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
2018-08-16 16:27:07 +08:00
Jason Chen CJ
c234acb338 fix spec_ctrl msr save/restore
the CPU_CONTEXT_OFFSET_IA32_SPEC_CTRL is 168U which should be 0xa8
instead of 0xa0

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
2018-08-16 16:24:13 +08:00
Sainath Grandhi
022ef92b62 hv: Add vrtc emulation support for ACRN partition mode
This patch adds code to support read-only RTC support for guests
run by partition mode ACRN. It supports RW for CMOS address port 0x70
and RO for CMOS data port 0x71. Reads to CMOS RAM offsets are fetched
by reading CMOS h/w directly and writes to CMOS offsets are discarded.

Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
2018-08-16 16:23:11 +08:00
Jian Jun Chen
f63c7a7355 dm: virtio: set VBS-K status to VIRTIO_DEV_INIT_SUCCESS after reset
When reset VBS-K status should be set to VIRTIO_DEV_INIT_SUCCESS
because at the time the char dev of VBS-K is still opened and
when set_status callback is called later, it depends on
VIRTIO_DEV_INIT_SUCCESS to resume.

Signed-off-by: Jian Jun Chen <jian.jun.chen@intel.com>
Reviewed-by: Shuo Liu <shuo.a.liu@intel.com>
Acked-by: Yu Wang <yu1.wang@intel.com>
2018-08-16 16:22:43 +08:00
Jian Jun Chen
1378a8440a dm: virtio: add support for VBS-K device reset
A new ioctl is introduced in VBS-K to issue reset command to kernel
VBS-K driver. This is used to support VBS-K S3. When FE enters S3
reset command is sent to device model. Backend driver in device model
should use this ioctl to inform the VBS-K drvier in kernel.

Signed-off-by: Jian Jun Chen <jian.jun.chen@intel.com>
Reviewed-by: Shuo Liu <shuo.a.liu@intel.com>
Acked-by: Yu Wang <yu1.wang@intel.com>
2018-08-16 16:22:43 +08:00
Li, Fei1
16a817489a hv: vioapic: bug fix update PTDEV RTE
Now the guest may change "Destination Field", "Trigger Mode",
"Interrupt Input Pin Polarity" even "Interrupt Vector" when
"Interrupt Mask" not masked. So we should update the pass through
device interrupt pin rte in this situation. The old logic would
update it only when "Interrupt Mask" or "Trigger Mode" or
"Interrupt Input Pin Polarity" was changed.

update ptdev native ioapic rte when (a) something changed and
(b) the old rte interrupt mask is not masked or the new rte interrupt
mask is not masked.

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2018-08-16 10:05:08 +08:00
Sainath Grandhi
101ab60627 hv: Build fix for Partition mode
struct io_request gets rid of "processed" element. Modified io exit handler
for partition mode to accomodate the change.

Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
2018-08-16 09:43:34 +08:00
Yonghua Huang
d030595194 HV: remove 'spinlock_rfags' declaration
- remove the global declaration of 'cpu_int_value'

Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-08-16 09:43:04 +08:00
Deng Wei
932bc32dcc DM: virtio rpmb backend driver updates
RPMB frontend driver in UOS kernel has fixed unstable issue,
which requires BE for update as well. E.g. structure adjustment,
definition modification and so on.

Signed-off-by: Deng Wei <wei.a.deng@intel.com>
Signed-off-by: Huang Yang <yang.huang@intel.com>
Acked-by: Zhu Bing <bing.zhu@intel.com>
2018-08-16 09:42:20 +08:00
Shiqing Gao
3df3c9f6a1 hv: vuart: fix 'Shifting value too far'
MISRA-C requires that shift operation cannot exceed the word length.

What this patch does:
- Fix the bug in 'vuart_init'
  The register 'dll' and 'dlh' should be uint8_t rather than char.
  'dll' is the lower 8-bit of divisor.
  'dlh' is the higher 8-bit of divisor.
  So, the shift value should be 8U rather than 16U.
- Fix other data type issues regarding to the registers in 'struct
  vuart'
  The registers should be unsigned variables.

v1 -> v2:
 * Use a local variable 'uint8_t value_u8 = (uint8_t)value' to avoid
   mutiple times type conversion
 * Use '(uint8_t)divisor' rather than '(uint8_t)(divisor & 0xFFU)' to
   get the lower 8 bit of 'divisor'
   Direct type conversion is safe and simple per Xiangyang's suggestion.

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
2018-08-16 09:01:53 +08:00
Mingqiang Chi
de487fff2b hv:fix return value violations for vpic/vioapic
-- Change these APIs to void type, add pre-conditions,
   and move parameter-check to upper-layer functions.
   handle_vpic_irqline
   vpic_set_irqstate
   vpic_assert_irq
   vpic_deassert_irq
   vpic_pulse_irq
   vpic_get_irq_trigger
   handle_vioapic_irqline
   vioapic_assert_irq
   vioapic_deassert_irq
   vioapic_pulse_irq
-- Remove dead code
   vpic_set_irq_trigger

v1-->v2:
   add cleanup vpic
   change some APIs to void type, add pre-conditions,
   and move the parameter-check to upper-layer functions.

Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-08-16 09:01:08 +08:00
ailin,yang
cad8492a12 enable weston to fix: #663
add user and enable weston service to fix issue: #663
2018-08-15 05:08:29 -07:00
Jason Chen CJ
f2a3e1fb76 quick fix: fix build failure for release version
conflicting types for ‘vcpu_dumpreg’

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
2018-08-15 13:47:01 +08:00
Victor Sun
bb5377b354 HV: change wake vector info to accommodate ww32 sbl
The wake vector address in SBL ACPI table was changed since ww30,
so change platform acpi info accordingly to support system S3.

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-08-15 12:20:28 +08:00
Jason Chen CJ
f8f49d410f dump vcpu registers on correct vcpu
after updated cpu context get/set method, the vcpu_dumreg cmd is not
correct anymore as the registers may read from VMCS but meantime hv
shell may not be running on target vcpu.

this patch take use of smp_call_function for vcpu dumpreg and make the
dump always come from correct vcpu.

v2:
- use str pointer to get vcpu_dumpreg context instead of print out directly
  in notify handler.

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-08-15 12:05:18 +08:00
Jason Chen CJ
4b03c97a5e add smp_call_function support
take use of VCPU_NOTIFY vector, add smp_call_function support.
added a per_cpu field smp_call_info, and make each smp_call_function
is not re-entered, and the caller CPU is returned when all the target
CPUs complete the call.

v4:
- remove global lock
- take use of wait_sync_change function to do the sequence sync

v3:
- remove per_cpu lock in smp_call_info
- use a global lock to ensure smp_call_function sequence
- use pcpu_sync_sleep to wait IPI complete

v2:
- after new smp function come, if old one exist, changed from overwirte
  with the new one to ignore the new one.

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
2018-08-15 12:05:18 +08:00
Jason Chen CJ
8ef072165f idle: enable IRQ in default idle
we should let cpu handle IRQ during idle

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
2018-08-15 12:05:18 +08:00
Jason Chen CJ
e19d36fa6c change pcpu_sync_sleep to wait_sync_change
pcpu_sync_sleep monitor "uint64_t sync" change to "1UL << mask_bit",
which is not very clear to take use of it.
change it to wait_sync_change, means monitor "uint64_t sync" change to
"wake_sync", make the function clear to use.
And expose it for the usage of the following patches.

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
2018-08-15 12:05:18 +08:00
Jason Chen CJ
49d3446861 lapic: add send_dest_ipi function
send_dest_ipi is trying to send ipi to dest with a group.

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
2018-08-15 12:05:18 +08:00
Junjie Mao
6e96243b01 HV: io: drop REQ_STATE_FAILED
Now the DM has adopted the new VHM request state transitions and
REQ_STATE_FAILED is obsolete since neither VHM nor kernel mediators will set the
state to FAILED.

This patch drops the definition to REQ_STATE_FAILED in the hypervisor, makes
''processed'' unsigned to make the compiler happy about typing and simplifies
error handling in the following ways.

* (dm_)emulate_(pio|mmio)_post no longer returns an error code, by introducing a
  constraint that these functions must be called after an I/O request
  completes (which is the case in the current design) and assuming
  handlers/VHM/DM will always give a value for reads (typically all 1's if the
  requested address is invalid).

* emulate_io() now returns a positive value IOREQ_PENDING to indicate that the
  request is sent to VHM. This mitigates a potential race between
  dm_emulate_pio() and pio_instr_vmexit_handler() which can cause
  emulate_pio_post() being called twice for the same request.

* Remove the ''processed'' member in io_request. Previously this mirrors the
  state of the VHM request which terminates at either COMPLETE or FAILED. After
  the FAILED state is removed, the terminal state will always be constantly
  COMPLETE. Thus the mirrored ''processed'' member is no longer useful.

Note that emulate_instruction() will always succeed after a reshuffle, and this
patch takes that assumption in advance. This does not hurt as that returned
value is not currently handled.

This patch makes it explicit that I/O emulation is not expected to fail. One
issue remains, though, which occurs when a non-aligned cross-boundary access
happens. Currently the hypervisor, VHM and DM adopts different policy:

* Hypervisor: inject #GP if it detects that the access crossed boundary

* VHM: deliver to DM if the access does not complete falls in the range of a
  client

* DM: a handler covering part of the to-be-accessed region is picked and
  assertion failure can be triggered.

A high-level design covering all these components (in addition to instruction
emulation) is needed for this. Thus this patch does not yet cover the issue.

Tracked-On: #875
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-08-15 12:04:12 +08:00
Junjun Shan
ca83c09b9f hv: treewide: fix multiple MISRAC violations
MISARC has requirements about  Marco redefinition, usage of ++ or -- and
assignment operator in boolean expression. This patch is used to solve
these violations.

The modifications are summarized as following:
1.The HC_VM_SET_MEMORY_REGION, HC_VM_GPA2HPA, HC_VM_SET_MEMORY_REGIONS are
redefined twice in acrn_hv_des.h, so delete them to solve the macro
redefinition violations.

2.The macro BUS_LOCK are redefined in bits.h and atomic.h, then delete
the declaration in both two files, add a new declaration in cpu.h and
include the header file.

3.modify the code to solve the improper usage of -- operators in string.c.

4.modify the while loop to for loop to avoid assignment operator in
boolean expression in vlapic.c.

v1 -> v2:
 *Modify the format of commit logs and signed-off name.

 *Modify the code format from 'd = d-1;' to 'd--;' to be better.

Signed-off-by: Junjun Shan <junjun.shan@intel.com>
2018-08-15 11:21:09 +08:00
Xiaoguang Wu
0292e14ff9 DM USB: xHCI: enable xHCI SOS S3 support
This patch enable the support for SOS S3 from the perspective
of USB xHCI.

Signed-off-by: Xiaoguang Wu <xiaoguang.wu@intel.com>
Reviewed-by: Liang Yang <liang3.yang@intel.com>
Acked-by: Yu Wang <yu1.wang@intel.com>
2018-08-15 11:18:33 +08:00
Xiaoguang Wu
0b405ee780 DM USB: xHCI: change flow of creation of virtual USB device
The xHCI emulation greatly depends on the user space library libusb
which is based on the usbfs module in Linux kernel. The libusb will
bind usbfs to physical USB device which makes hardware control over
libusb in user space possible.

The pci_xhci_dev_create is called in pci_xhci_native_usb_dev_conn_cb
which is a callback function triggered by physical USB device plugging.
This function will bind the physical USB device to usbfs in SOS, which
we depend to create the communication between UOS xHCI driver with
physical USB device.

This design will fail if the reconnection happened in the SOS, which
will bind class driver to the physical USB device instead of usbfs,
hence the libusb device handle in DM is invalid.

Currently, the native S3 will disable the vbus for all xHCI ports and
re-drive during S3 resume. This behavior cause native USB driver unbind
the usbfs and bind to related class driver, then made the DM lost
control and failed to continue emulation.

To fix this issue, place the pci_xhci_dev_create in the function
pci_xhci_cmd_enable_slot. According to the xHCI spec 4.5.3 Figure 10,
the UOS always send Enable Slot command when a device is attached or
recovered from errors (by Disable Slot command). So every time the SOS
can't resuming normally or some unexpected disconnection happens, this
desigen will always survive by Disable Slot and Enable Slot command
series from UOS xHCI driver.

Signed-off-by: Xiaoguang Wu <xiaoguang.wu@intel.com>
Reviewed-by: Liang Yang <liang3.yang@intel.com>
Acked-by: Yu Wang <yu1.wang@intel.com>
2018-08-15 11:18:33 +08:00
Xiaoguang Wu
b359dc361a DM USB: xHCI: code cleanup: change variable name
Replace 'native_assign_ports' with 'port_map_tbl' to be more accurate
for the role of this variable plays.

Signed-off-by: Xiaoguang Wu <xiaoguang.wu@intel.com>
Reviewed-by: Liang Yang <liang3.yang@intel.com>
Acked-by: Yu Wang <yu1.wang@intel.com>
2018-08-15 11:18:33 +08:00
Xiaoguang Wu
27eeea4cd3 DM USB: xHCI: refine port assignment logic
The variable native_assign_ports in struct pci_xhci_vdev is used
to record wether certain root hub port in SOS is assigned to UOS.
The logic uses zero to express 'not assigned' and nonzero to express
'assigned'. In this patch, use macro to replace number to express
better.

Signed-off-by: Xiaoguang Wu <xiaoguang.wu@intel.com>
Reviewed-by: Liang Yang <liang3.yang@intel.com>
Acked-by: Yu Wang <yu1.wang@intel.com>
2018-08-15 11:18:33 +08:00