Commit Graph

408 Commits

Author SHA1 Message Date
Yin Fengwei
f3831cdc80 hv: don't combine the trampline code with AP start
Cleanup "cpu_secondary_xx" in the symbols/section/functions/variables
name in trampline code.

There is item left: the default C entry is Ap start c entry. Before
ACRN enter S3, the c entry will be updated to high level S3 C entry.
So s3 resume will go s3 resume path instead of AP startup path.

Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Signed-off-by: Zheng Gen <gen.zheng@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
Acked-by: Eddie Dong <Eddie.dong@intel.com>
2018-06-08 13:45:02 +08:00
Yin Fengwei
11df803da3 hv: rename cpu_secondary.S to trampline.S
We will reuse this part of code for:
   - AP bootup
   - BSP wakeup from S3

Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
Acked-by: Eddie Dong <Eddie.dong@intel.com>
2018-06-08 13:45:02 +08:00
Zide Chen
4bb5e60de5 hv: enable MTRR virtualization
- unmask MTRR from guest CPUID to enable MTRR
- MTRR virtualization can be disabled by commenting out CONFIG_MTRR_ENABLED

Signed-off-by: bliu11 <baohong.liu@intel.com>
Signed-off-by: Zide Chen <zide.chen@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-08 12:06:15 +08:00
Zide Chen
a41267e184 hv: change rdmsr/wrmsr policy for MTRR registers
-rdmsr: emulate all MTRR registers besides variable range MTRRs
-wrmsr: emulate all MTRR registers besides variable range MTRRs and MTRRCAP

Signed-off-by: bliu11 <baohong.liu@intel.com>
Signed-off-by: Zide Chen <zide.chen@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-08 12:06:15 +08:00
Zide Chen
eed7309472 hv: update EPT when guests change MTRRs
MTRRs have no effect on the memory type used for an access to GPA.
This patch updates the EPT MT field according to the memory type
selected by MTRRs, which combines with the PAT, PCD and PWT bits
from the guest paging structures to determine the effective memory type

Signed-off-by: bliu11 <baohong.liu@intel.com>
Signed-off-by: Zide Chen <zide.chen@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-08 12:06:15 +08:00
Zide Chen
c2283743f0 hv: basic MTRR virtualization
Linux commit edfe63ec97ed ("x86/mtrr: Fix Xorg crashes in Qemu sessions")
disables PAT feature if MTRR is not enabled. This patch does partial
emulation of MTRR to prevent this from happening: enable fixed-range
MTRRs and disable virable range MTRRs

By default IA32_PAT MSR (SDM Vol3 11.12.4, Table 11-12) doesn't include
'WC' type. If MTRR is disabled from the guests, Linux doesn't allow
writing IA32_PAT MSR so WC type can't be enabled. This creates some
performance issues for certian applications that rely on WC memory type.

Implementation summary:
- Enable MTRR feature: MTRRdefType.E=1
- Enable fixed range MTRRs: MTRRCAP.fix=1, MTRRdefType.FE=1
- For simplicity, disable variable range MTRRs: MTRRCAP.vcnt=0.
  It's expected that this bit is honored by the guests and they won't
  change the guest memory type through variable MTRRs.

Signed-off-by: bliu11 <baohong.liu@intel.com>
Signed-off-by: Zide Chen <zide.chen@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-08 12:06:15 +08:00
Zide Chen
5d2ab4d9ef hv: add APIs to allow updating EPT mem type
- Add PAGING_REQUEST_TYPE_MODIFY_MT memory map request type
- Update map_mem_region() to allow modifying the memory type related
  fields in a page table entry
- Add ept_update_mt()
- add modify_mem_mt() for both EPT and MMU

Signed-off-by: Zide Chen <zide.chen@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-08 12:06:15 +08:00
Binbin Wu
13dc9617e5 hv: use vmx_write_cr<#> to init control register of uefi platform
In current code, on uefi platform, vmcs will be overwritten according to
uefi context, using the exec_vmwrite directly.

This patch use vmx_write_cr<#> interface to init control registers.

Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-08 12:05:02 +08:00
Binbin Wu
66c74c6df1 hv: adjust control register init order
- Ajust the order of control registers just for more clear in logic.
  Will not change the guest init state after the ajustment.
- Add a comment to point out the CR4 should be inited before CR0.
  The value of CR4 will be used during CR0 set.

Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-08 12:05:02 +08:00
Yin Fegnwei
f741b014f8 hv: prepare for down/up APs dynamically.
- export start_cpus to start/online APs.
- Add stop_cpus to offline APs.
- Update cpu_dead to decrement running cpus number and do cleanup
  for AP down

Signed-off-by: Yin Fegnwei <fengwei.yin@intel.com>
Acked-by: Eddie Dong <Eddie.dong@intel.com>
2018-06-07 15:36:46 +08:00
Yin Fegnwei
7a71422a6d hv: handle cpu offline request in idle thread
Change need_scheduled fileds of schedule context to flags because
it's not only used for need_schedule check.

Add two functions to request/handle cpu offline.

The reason we only handle cpu offline request in idle thread is
that we should pause the vcpu running on target pcpu. Then it's
only possible that target pcpu get cpu offline request in idle
thread.

Signed-off-by: Yin Fegnwei <fengwei.yin@intel.com>
Acked-by: Eddie Dong <Eddie.dong@intel.com>
2018-06-07 15:36:46 +08:00
Yin Fegnwei
08139c34f7 hv: add vmx_off and update exec_vmxon_instr
To handle cpu down/up dynamically, arcn needs to support vmx off/on
dynamically. Following changes is introduced:
  vmx_off will be used when down AP. It does:
    - vmclear the mapped vcpu
    - off vmx.

  exec_vmxon_instr is updated to handle start and up AP both. It does
    - if vmx was on on AP, load the vmxon_region saved. Otherwise,
      allocate vmxon_region.
    - if there is mapped vcpu, vmptrld mapped vcpu.

Signed-off-by: Zheng Gen <gen.zheng@intel.com>
Signed-off-by: Yin Fegnwei <fengwei.yin@intel.com>
Acked-by: Eddie Dong <Eddie.dong@intel.com>
2018-06-07 15:36:46 +08:00
Yin Fegnwei
fbeafd500a hv: add API to get the vcpu mapped to specific pcpu.
Per performance consideration, we don't flush vcpu context when doing
vcpu swithing (because it's only swithing between vcpu and idle).

But when enter S3, we need to call vmclear against all vcpus attached
to APs. We need to know which vcpu is attached with which pcpu.

This patch introduced API to get vcpu mapped to specific pcpu.

Signed-off-by: Yin Fegnwei <fengwei.yin@intel.com>
Acked-by: Eddie Dong <Eddie.dong@intel.com>
2018-06-07 15:36:46 +08:00
Jason Chen CJ
a9ee6da0d9 vm: remove current_vcpu from vm structure
current_vcpu is not correct when there are multi vcpus in one VM,
using it is in-correct, so remove it.

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
2018-06-07 12:28:18 +08:00
Jason Chen CJ
8e255da829 trusty: invept should go through all vcpus
make invept request for all vcpus in vms.

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
2018-06-07 12:28:18 +08:00
Qi Yadong
03f5cbdd7a HV: Parse SeedList HOB
Retrieve dseed from SeedList HOB(Hand-Off-Block).
SBL passes SeedList HOB to ACRN by MBI modules.

Signed-off-by: Qi Yadong <yadong.qi@intel.com>
Reviewed-by: Zhu Bing <bing.zhu@intel.com>
Reviewed-by: Wang Kai <kai.z.wang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-07 09:55:29 +08:00
Minggui Cao
5de6bf3d34 fix a bug: UOS could hung after running some time.
soft-lock or CPUs stalls can happen during UOS running; after debugging,
find CPUs for UOS is in idle thread, and will not be scheduled back.

root cause: PIO/MMIO from UOS will trigger SOS/DM to handle them. Usually,
it should make sure UOS-vcpu pause first then resume, but for SOS/UOS in
parallel,in former code, the UOS-vcpu resume could be called first by SOS
before pause.

Signed-off-by: Minggui Cao <minggui.cao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-05 17:28:10 +08:00
Minggui Cao
66d283d0c4 add lock for vcpu state access
keep the global variables access exclusive in vcpu pause & resume.

Signed-]off-by: Minggui Cao <minggui.cao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-05 17:28:10 +08:00
Huihuang Shi
e591315a65 HV:treewide:C99-friendly per_cpu implementation change the per_cpu method
The current implementation of per_cpu relies on several non-c99 features,
and in additional involves arbitrary pointer arithmetic which is not MIS-
RA C friendly.

This patch introduces struct per_cpu_region which holds all the per_cpu
variables. Allocation of per_cpu data regions and access to per_cpu vari-
ables are greatly simplified, at the cost of making all per_cpu varaibl-
es accessible in files.

Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
2018-06-05 17:09:00 +08:00
Li, Fei1
84f4cf3c1d hv: vmx: add vpid support
Enable VMX vpid ctrl and assign an unique vpid to each vcpu
so that VMX transitions are not required to invalidate any
linear mappings or combined mappings.

SDM Vol 3 - 28.3.3.3
If EPT is in use, the logical processor associates all mappings
it creates with the value of bits 51:12 of current EPTP.
If a VMM uses different EPTP values for different guests, it may
use the same VPID for those guests. Doing so cannot result in one
guest using translations that pertain to the other.

In our UOS, the trusty world and normal world are using different
EPTP. So we can use the same VPID for it.

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-04 17:11:15 +08:00
Li, Fei1
c34f72a0bc hv: monir modify for flush ept tlb to compatible with vpid
We need know which tlb to flush: ept or vpid.
1. error handle for invept.
  it's the same with invvpid error handle.
  change its name to compatible with vpid.
2. the macro name for flush ept tlb request.

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-04 17:11:15 +08:00
Binbin Wu
b55b808bfc hv: copy cr0/4 value when init secure world
Copy CR0 / CR4 value from normal world context to secure world context
when init secure world.

Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Wang Kai <kai.z.wang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-01 19:14:13 +08:00
Binbin Wu
417cff5049 hv: check vmx unrestricted guest capability
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
Acked-by: Xu, Anthony <anthony.xu@intel.com>
2018-06-01 19:14:13 +08:00
Binbin Wu
bed6f0b99e hv: set start mode of vcpu
In current code, sos/uos bsp can only start from 64bit mode.

For sbl platform:
This patch start sos bsp from protected mode by default.
CONFIG_START_VM0_BSP_64BIT is defined to allow start sos bsp
from 64bit mode. If a config CONFIG_START_VM0_BSP_64BIT
defined in config file, then sos bsp will start from 64bit mode.
This patch start uos bsp from real mode, which needs the integration
of virtual bootloader (vsbl).

For uefi platform:
This patch sets sos bsp vcpu mode according to the uefi context.
This patch starts uos bsp from protected mode, because vsbl is not ready
to publish for uefi platform yet. After vsbl is ready, can change to
start uos bsp from real mode.

Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
Acked-by: Xu, Anthony <anthony.xu@intel.com>
2018-06-01 19:14:13 +08:00
Binbin Wu
0d309e2dee hv: add support to start a vcpu from protected mode
In current implementation, a vcpu can only start from real mode
or 64bit mode.
This patch adds support to start a vcpu from protected mode.

Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
Acked-by: Xu, Anthony <anthony.xu@intel.com>
2018-06-01 19:14:13 +08:00
Binbin Wu
881eaa6104 hv: create gdt for guest to start from protected mode
In current implementation, on sbl platform, vm0 bsp
starts from 64bit mode. And hv need to prepare init
page table for it.

In this patch series, on sbl platform, vm0 bsp starts
from non-paging protected mode.
This patch prepares an init gdt for vm0 bsp on sbl
platform.

Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
Acked-by: Xu, Anthony <anthony.xu@intel.com>
2018-06-01 19:14:13 +08:00
Binbin Wu
9e7179c950 hv: support gva2gpa in different paging modes
Translate gva2gpa in different paging modes.
Change the definition of gva2gpa.
- return value for error status
- Add a parameter for error code when paging fault.
Change the definition of vm_gva2gpa.
- return value for error status
- Add a parameter for error code when paing fault.

Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Xu, Anthony <anthony.xu@intel.com>
2018-06-01 19:14:13 +08:00
Binbin Wu
dd14d8e1b0 hv: add API to get vcpu paging mode
Use # of paging level to identify paging mode

Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
Acked-by: Xu, Anthony <anthony.xu@intel.com>
2018-06-01 19:14:13 +08:00
Binbin Wu
fb09f9daca hv: update vcpu mode when vmexit
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
Acked-by: Xu, Anthony <anthony.xu@intel.com>
2018-06-01 19:14:13 +08:00
Binbin Wu
5c7f120d96 hv: refine guest control register handling
In current implemenation, cr0/cr4 host mask value are set
according to the value from fixed0/fixed1 values of cr0/cr4.
In fact, host mask can be set to the bits, which need to be trapped.

This patch, add code to support exiting long mode in CR0 write handling.
Add some check when modify CR0/CR4.

- CR0_PG, CR0_PE, CR0_WP, CR0_NE are trapped for CR0.
  PG, PE are trapped to track vcpu mode switch.
  WP is trapped for info of protection when paing walk.
  NE is always on bit.
- CR4_PSE, CR4_PAE, CR4_VMXE are trapped for CR4.
  PSE, PAE are trapped to track paging mode.
  VMXE is always on bit.
- Reserved bits and always off bits are not allow to be set by guest.
  If guest try to set these bits when vmexit, a #GP will be injected.

Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Xu, Anthony <anthony.xu@intel.com>
2018-06-01 19:14:13 +08:00
huihuang shi
14b2e1d395 fix "ISO C99 does not support '_Static_assert'"
_Static_assert is supported in C11 standard.
Please see N1570(C11 mannual) 6.4.1.
replace _Static_assert with ASSERT.

Signed-off-by: huihuang shi <huihuang.shi@intel.com>
2018-06-01 16:39:28 +08:00
Minggui Cao
cd5d8c8da7 check UART valid or not when setup console timer
if no valid UART in hypervisor, not need setup console timer.

Signed-off-by: Minggui Cao <minggui.cao@intel.com>
2018-06-01 14:22:27 +08:00
Geoffroy Van Cutsem
c396c5361c Update Travis CI files to account for new build dependencies
* Add Fedora 28 and Ubuntu 18.04 Dockerfile
* Add new build dependencies (for the ACRN tools)
* Change default Fedora version to 28

Signed-off-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
2018-06-01 13:16:06 +08:00
David B. Kinder
f4122d99c5 license: Replace license text with SPDX tag
Replace the BSD-3-Clause boiler plate license text with an SPDX tag.

Fixes: #189

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2018-06-01 10:43:06 +08:00
Yonghua Huang
2b69329ec7 HV: fix potential NULL function pointer reference
- 'dispatch' will be null and be referenced if
   'basic_exit_reason < ARRAY_SIZE(dispatch_table)'
   if false.

Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
2018-06-01 10:24:26 +08:00
Kaige Fu
7491b83394 HV: Remove dead code wrapped by #if 0
Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
2018-05-31 15:27:10 +08:00
Kaige Fu
37e664db0a HV: Replace misused pr_fatal with pr_acrnlog
The following massages is not fatal error but should be print to serial and
sbuf at the same time. pr_fatal is not a good choice. pr_acrnlog is designed
to deal with the situation. So replace the following misused pr_fatal with
pr_acrnlog.

Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
2018-05-31 15:27:10 +08:00
Li, Fei1
b6c5e0efdd hv: move panic out of hypercall
Just return the errno to the caller.

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
2018-05-31 11:27:22 +08:00
Li, Fei1
da662fae62 hv: vmcall_vmexit_handler should always return success
Hypervisor shouldn't deal with errno return by hypercall.
The SOS should do this. Here just return the errno to SOS.

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
2018-05-31 11:27:22 +08:00
Li, Fei1
c2ee561c02 hv: define errno more general
Hypercall will return errno to SOS (Now is linux kernel).
Let's define this more general.

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
2018-05-31 11:27:22 +08:00
Jason Chen CJ
987c7b7511 remove unused parameters in vm_description
vm_attr_name, vm_state_info_privilege & vm_created are not used

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Xu, Anthony <anthony.xu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-31 11:27:01 +08:00
Jason Chen CJ
0cf5142895 remove unused vm_state_info
vm_state_info in struct vm_arch is not used, remove it

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Xu, Anthony <anthony.xu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-31 11:27:01 +08:00
huihuang.shi
ba1b034e1e fix MISRA-C 243S
Included file not protected with #define, this
feature is required.

Signed-off-by: huihuang.shi <huihuang.shi@intel.com>
2018-05-31 11:26:13 +08:00
Jack Ren
f2b524385a version: v0.1-rc5
Signed-off-by: Jack Ren <jack.ren@intel.com>
2018-05-31 07:30:24 +08:00
David B. Kinder
69af3a901b doc: fix API documentation misspellings
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2018-05-30 13:11:22 -07:00
Binbin Wu
ebea5e5ae4 hv: remove unused API init_cpu
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
2018-05-30 14:55:57 +08:00
Binbin Wu
fb1248e5d9 hv: remove cr3 handling from cr_access_vmexit_handler
Guest CR3 read/write operations are not trapped.
Remove CR3 handling in cr_access_vmexit_handler.
Also remove unused API vmx_read_cr3.

Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
2018-05-30 14:55:57 +08:00
Binbin Wu
2df7b96a23 hv: make control register handling functions to public
Move from vmexit.c to vmx.c
Declare the functions in vmx.h
Rename the functions' name with prefix vmx_.

Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
2018-05-30 14:55:57 +08:00
Kaige Fu
80a79fed39 HV: Replace printf with pr_acrnlog after logmsg init
There are some massages which is not fatal error but should to print
to serial and sbuf(hvlog) at the same time. pr_fatal is for fatal error
massages and it is not good choice for the situation above.

Introduce a new API pr_acrnlog to deal with the situation. And replace the
following printf with pr_acrnlog for massages should be print to sbuf and
serial. Then developers can get those massages on serial and BTM(Boot Time
Measurement) can use acrnlog to get those massages from sbuf.

BTM refers to Boot Time Measurement which will read acrnlog file to get
timestamps of steps we want.

Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
2018-05-30 14:49:09 +08:00
Kaige Fu
9af38e16e5 HV: Add log info when setup hvlog share buf
We have two sbuf for hvlog: one is allocated by hv for "early hvlog" and
the other one is allocated by SOS. Once SOS allocate the later one, the
hv allocated sbufs would be released after the contents being copied, we
call it sbuf switch.

And there is a trick here to guarantee that the switch of a certain per_cpu
sbuf is being done on exactly the certain physical CPU, that is doing the
switch at the first print after SOS allocated and setup its sbuf.

Because there are few logmsg within our current code, so will wait a bit long
for the next print. For ordinary case, it should be ok. However, for the
BTM(Boot Time Measurement) case, we need the content of "early hvlog" for
boot time calculation and it is not ok. So, we print those prints to force
the sbuf switch.

Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
2018-05-30 14:49:09 +08:00
Li, Fei1
e0c329e4e9 hv: create vm failed don't panic system
Just return error number to the caller.

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
2018-05-30 14:01:56 +08:00
Li, Fei1
6c8fc0a4df hv: remove vm_description_array
When we create an UOS, we didn't indicate the vmid.
Thus we can't get the vm description for the vm
description array.

Instead we use a temporary vm description to save data to
fill the vm structure when crate an UOS. It's uselesss once
UOS has created. So we don't need to maintain vm description
array here for UOS.

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
2018-05-30 14:01:56 +08:00
Li, Fei1
3fb7b75eda hv: execute vmxon instruction fail don't panic system
Don't panic system when execute vmxon instruction failed.
And let's follow that only print error info when error return
from library function.

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
2018-05-30 14:01:56 +08:00
Li, Fei1
fe4484f5a9 hv: move panic out of hv_main
We cleanup ASSERT. This serial try to only panic when create
SOS failed.

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
2018-05-30 14:01:56 +08:00
Li, Fei1
574bdc3aef hv: panic will print function name and line number
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
2018-05-30 14:01:56 +08:00
huihuang.shi
1a5370a253 fix "warning:redefinition of typedef 'uint32_t'"
uint32_t occures two times in hypervisor/include/lib/types.h,
remove one of them.
Signed-off-by: huihuang.shi <huihuang.shi@intel.com>
2018-05-30 13:52:52 +08:00
Junjie Mao
2266e133fb lapic: continuous LVT registers as an array
Pointer arithmetic is currently used to calculate the address of a specific
Local Vector Table (LVT) register (except LVT_CMCI) in lapic, since the
registers are continuously placed with fixed padding in between. However each of
these registers are declared as a single uint32_t in struct lapic, resulting
pointer arithmetic on a non-array pointer which violates MISRA C requirements.

This patch refactors struct lapic by converting the LVT registers fields (again
except LVT_CMCI) to an array named lvt. The LVT indices are reordered to reflect
the order of the LVT registers on hardware, and reused to index this lvt array.

The code before and after the changes is semantically equivalent.

Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
2018-05-30 13:52:11 +08:00
Jason Chen CJ
9a604ed00e correct idt_vectoring_info handling
filter out HW exception and NMI from idt_vectoring_info first:
- queue HW exception through vcpu_queue_exception
- make NMI request through vcpu_make_request
this is a complement patch for previous commit "exception: refine exception
injection path", here take care un-injected vectors for types HW exception &
NMI, the previous commit take care SW exception & external interrupt.

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Tian, Kevin <kevin.tian@intel.com>
2018-05-30 13:51:49 +08:00
Jason Chen CJ
7718338008 exception: add vcpu_inject_pf support
add page fault exception injection support

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Tian, Kevin <kevin.tian@intel.com>
2018-05-30 13:51:49 +08:00
Jason Chen CJ
75a03bf0f7 exception: use func vcpu_queue_exception to inject exception
use func vcpu_queue_exception for vcpu_inject_gp and exception_vmexit_handler.

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Tian, Kevin <kevin.tian@intel.com>
2018-05-30 13:51:49 +08:00
Jason Chen CJ
ebc7ee2e18 exception: refine exception injection path
- inject exception based on exception_info
- inject exception according to priority
- for previous not injected vector - idt_vectoring_info, here only take
  care about types for SW exception & external interrupt, the HW exception
  & NMI will be taken care by vmexit_handler in the following commit "correct
  idt_vectoring_info handling"

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Tian, Kevin <kevin.tian@intel.com>
2018-05-30 13:51:49 +08:00
Jason Chen CJ
277830aba8 exception: add vcpu_queue_exception function
add func vcpu_queue_exception to queue exception based on SDM Vol3 Table 6-5,
which may cause #DF or triple fault

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Tian, Kevin <kevin.tian@intel.com>
2018-05-30 13:51:49 +08:00
Jason Chen CJ
44af2690f6 add triple fault request support
if vcpu meet triple fault, the vcpu should exit.

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Tian, Kevin <kevin.tian@intel.com>
2018-05-30 13:51:49 +08:00
Jason Chen CJ
4607177383 replace pending_intr with pending_req
the pending_intr is not only serving for interrupt but also for different
request including TLB & TMR updating, so change the function & variants
name accordingly.

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-30 13:51:49 +08:00
Junjie Mao
16152fad79 HV: debug: stop using ## __VA_ARGS__
It is an extension of GCC CPP to:

* allow omitting a variable macro argument entirely, and
* use ## __VA_ARGS__ to remove the the comma before ## __VA_ARGS__ when
  __VA_ARGS__ is empty.

The only use of ## _VA_ARGS__ is to define the pr_xxx() macros, with the first
argument being the format string and the rest the to-be-formatted arguments. The
format string is explicitly spelled out because another macro pr_fmt() is used
to add to the format string a prefix which is customizable by defining what
pr_fmt() expands to.

For C99 compliance, this patch changes the pr_xxx() macros in the following
pattern.

    - #define pr_fatal(fmt, ...)				\
    -     do_logmsg(LOG_FATAL, pr_fmt(fmt), ## __VA_ARGS__);	\
    + #define pr_fatal(...)					\
    +     do_logmsg(LOG_FATAL, pr_prefix __VA_ARGS__);		\

Reference:

* https://gcc.gnu.org/onlinedocs/gcc/Variadic-Macros.html#Variadic-Macros

Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
2018-05-29 14:13:44 +08:00
Junjie Mao
004d2e2696 HV: treewide: give names to unnamed structs/unions
According to the syntax defined in C99, each struct/union field must have an
identifier. This patch adds names to the previously unnamed fields for C99
compatibility.

Here is a summary of the names (marked with a pair of *stars*) added.

struct trusty_mem:

    union {
        struct {
            struct key_info key_info;
            struct trusty_startup_param startup_param;
        } *data*;
        uint8_t page[CPU_PAGE_SIZE];
    } first_page;

struct ptdev_remapping_info:

    union {
        struct ptdev_msi_info msi;
        struct ptdev_intx_info intx;
    } *ptdev_intr_info*;

union code_segment_descriptor:

    uint64_t value;
    struct {
        union {
            ...
        } low32;
        union {
            ...
        } high32;
    } *fields*;

    similar changes are made to the following structures.
    * union data_segment_descriptor,
    * union system_segment_descriptor,
    * union tss_64_descriptor, and
    * union idt_64_descriptor

struct trace_entry:

    union {
        struct {
            uint32_t a, b, c, d;
        } *fields_32*;
        struct {
            uint8_t a1, a2, a3, a4;
            uint8_t b1, b2, b3, b4;
            uint8_t c1, c2, c3, c4;
            uint8_t d1, d2, d3, d4;
        } *fields_8*;
        struct {
            uint64_t e;
            uint64_t f;
        } *fields_64*;
        char str[16];
    } *payload*;

Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
2018-05-29 14:12:15 +08:00
Junjie Mao
ef3cb5ba1c treewide: remove unnecessary unnamed structs/unions
According to the syntax defined in C99, each struct/union field must have an
identifier. This patch removes unnamed struct/union fields that can be easily
expressed in a C99-compatible way.

Here is a summary of structs/unions removed.

struct vhm_request:

    union {
        uint32_t type;                  uint32_t type;
        int32_t reserved0[16];    =>    int32_t reserved0[15];
    };

struct vhm_request_buffer:

    struct vhm_request_buffer {
        union {                         union vhm_request_buffer {
            struct vhm_request ...; =>        struct vhm_request ...;
            int8_t reserved[4096];            int8_t reserved[4096];
        }                               }
    }

Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
2018-05-29 14:12:15 +08:00
huihuang.shi
b9660eb9d6 refomatted GET_DATA_SIZE macro
The macro GET_DATA_SIZE's code style is not correct,
it is merged by accident,the Pull Request
<fix "obsolete use of designated initializer without '='">
have two commid id,the second commit changed the ucode.c
by mistake.

Now fixed.
Signed-off-by: huihuang.shi <huihuang.shi@intel.com>
2018-05-29 14:11:29 +08:00
Jack Ren
3b616010e0 hv: handle the case of empty hypervisor cmdline
Fix a bug:
When the hypervisor cmdline is empty, the hypervisor will be
unable to boot up.

Signed-off-by: Jack Ren <jack.ren@intel.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
2018-05-28 17:36:54 +08:00
huihuang.shi
784eb6f189 fix "warning:range expression in switch statements are not standard"
Range expression in switch statement is in gcc extension standard(gcc
manual 6.28),not in c99 standard.
GCC manual 6.28 reference link below:
(https://gcc.gnu.org/onlinedocs/gcc-8.1.0/gcc/Case-Ranges.html#Case-Ranges)

Signed-off-by: huihuang.shi <huihuang.shi@intel.com>
2018-05-25 17:18:34 +08:00
huihuang.shi
2f3953a99a fix "warning:ISO C forbids 'return' with expression,in function returning void"
returning void function must return void.

Signed-off-by: huihuang.shi <huihuang.shi@intel.com>
2018-05-25 15:35:50 +08:00
Zide Chen
8f16faab04 HV: further cleanup of header inclusions
According to the comments in hypervisor:
 " This file includes config header file "bsp_cfg.h" and other
	hypervisor used header files.
	It should be included in all the source files."

this patch includes all common header files in hypervisor.h
then removes other redundant inclusions

Signed-off-by: Zide Chen <zide.chen@intel.com>
2018-05-25 10:45:56 +08:00
Zide Chen
d594878e31 HV: cleanup for header inclusions.
used https://gitlab.com/esr/deheader to detect and remove unnecessary
header file inclusions

Signed-off-by: Zide Chen <zide.chen@intel.com>
2018-05-25 10:45:56 +08:00
Jason Chen CJ
1b34870824 guest: quick fix for copy_from/to_vm
h_ptr need update from second page walk

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
2018-05-25 09:43:08 +08:00
Li, Fei1
34445008c2 hv: add non-lock bitmap operation
Add __bitmap_set/clear,
__bitmap_test_and_set/clear.

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-25 09:42:03 +08:00
Li, Fei1
efb60e2726 hv: refine bit scan API
Rename
bsrl to bsr
bsrq to bsr64
bitmap_ffs to fls64
get_first_zero_bit to ffz64

Remove
ffsl

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2018-05-25 09:42:03 +08:00
Li, Fei1
57d0bf3b7c hv: refine bitops
Rename bitmap_clr to bitmap_clear
Rename bitmap_isset to bitmap_test
Remove bitmap_setof

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-25 09:42:03 +08:00
Miguel Bernal Marin
364b24224a hypervisor: install acrn.32.out to /usr/lib/acrn/acrn.sbl
Add a target in the make file to install the 32bit ELF acrn binary
and rename to acrn.sbl

Suggested-by: Arzhan Kinzhalin <arzhan.i.kinzhalin@intel.com>
Signed-off-by: Miguel Bernal Marin <miguel.bernal.marin@linux.intel.com>
2018-05-24 19:34:49 +08:00
Miguel Bernal Marin
977d48d550 hypervisor: install acrn.efi to /usr/lib
acrn.efi is a binary and need to be installed to /usr/lib instead of
/usr/share.

Suggested-by: Arzhan Kinzhalin <arzhan.i.kinzhalin@intel.com>
Signed-off-by: Miguel Bernal Marin <miguel.bernal.marin@linux.intel.com>
2018-05-24 19:34:49 +08:00
Miguel Bernal Marin
9563e248b7 samples: move samples to specifi platform diretory
Move the platform apl-mrb samples to devicemodel samples directory.
Add the install target to the missing samples files and re-organize the
samples directory structure to have nuc and apl-mrb samples.

Suggested-by: Arzhan Kinzhalin <arzhan.i.kinzhalin@intel.com>
Signed-off-by: Miguel Bernal Marin <miguel.bernal.marin@linux.intel.com>
2018-05-24 19:34:49 +08:00
huihuang.shi
d3ef8ae5cb fix "warning ISO C forbids omitting the middle term of a?:expression"
According to the C99 manual 6.5.15
syntax conditional-expression
  logical-OR-expression
  logical-OR-expression ? expression :conditional-expression

above bnf rules requires expression not be none

Signed-off-by: huihuang.shi <huihuang.shi@intel.com>
2018-05-24 13:43:53 +08:00
huihuang.shi
64d2efcfaf fix "obsolete use of designated initializer without '='"
According in C99 manual 6.7.8,'=' is required.

Signed-off-by: huihuang.shi <huihuang.shi@intel.com>
2018-05-24 13:43:53 +08:00
Jason Chen CJ
67dfec8799 vmexit: refine vmexit loop
- move vmexit handling into vmexit_handler
- add error handling, failure will inject #GP

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-24 13:42:19 +08:00
Jason Chen CJ
2ff7bf826e page walk during copy_from_vm/copy_to_vm
there are data transfer between guest(GPA) & hv(HPA), especially for
hypercall from guest.

guest should make sure these GPAs are address continous, but hv cannot
assure HPAs which mapped to these GPAs are address continous, for example,
after enable hugetlb, a contious GPA range could come from two different
2M pages.

this patch is handling such case by doing gpa page walking during
copy_from_vm & copy_to_vm.

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-24 13:42:19 +08:00
Binbin Wu
744e09bc7e hv: define 4 vcpu modes
move enum vm_cpu_mode to guest.h
move enum vm_paging_mode to guest.h
replace REAL_MODE with CPU_MODE_REAL
replace PAGE_PROTECTED_MODE with CPU_MODE_64BIT

Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-24 10:16:48 +08:00
Yonghua Huang
cb262286c6 HV: add NULL pointer check in 'vm_fixup()' function.
- to clear security warning.

Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
2018-05-24 10:16:15 +08:00
Mingqiang Chi
7c9cc6bcd4 hv:Merge dump_interrupt and dump_exception to a commond API
merge these two APIs to 'dump_intr_excp_frame'

Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-23 13:38:52 +08:00
Mingqiang Chi
d88b968305 hv: Remove nested check when dump exception
removed unnecessary nested check when dump exception

Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-23 13:38:52 +08:00
Mingqiang Chi
8384ed2564 hv:rename data structure intr_ctx
rename intr_ctx to intr_excp_ctx

Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-23 13:38:52 +08:00
Mingqiang Chi
88b8ce8362 hv: move structure(intr_ctx) to irq.h
move intr_ctx to irq.h, delete intr_ctx.h

Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-23 13:38:52 +08:00
Yonghua Huang
fbaff2aa35 HV:remove redundant field 'mmio' from 'struct emul_cnx'
Acked-by: Eddie Dong <eddie.dong@intel.com>
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
2018-05-23 11:43:56 +08:00
Yin Fengwei
b2c2ca2ecd hv: not necessary to deal with '\n' of cmdline in ACRN.
We removed '\n' in bootargs file so there is no '\n' attached
to cmdline when stitching ACRN. Then we don't need to deal with
it in ACRN.

Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Eddie Dong <Eddie.dong@intel.com>
2018-05-23 11:43:19 +08:00
Yin Fengwei
198f2003c2 hv: pass kernel cmdline from SBL to vm0 kernel
The SBL could pass cmdline to vm0 kernel by using mbi->mi_cmdline
which should be passed to vm0 kernel as well.

Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Eddie Dong <Eddie.dong@intel.com>
2018-05-23 11:43:19 +08:00
Yin Fengwei
b22cc43f81 hv: move boot/multiboot.c to boot/sbl/multiboot.c
boot/multiboot.c is only used by SBL. So move it to boot/sbl.

Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Eddie Dong <Eddie.dong@intel.com>
2018-05-23 11:43:19 +08:00
David B. Kinder
04572a76a8 doc: add missing param documentation hypercall.h
Add missing documentation for hcall_get_cpu_pm_state vm parameter

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2018-05-23 11:11:26 +08:00
Jack Ren
d04bce2dd0 hv: don't use the EDK Shell API to get the cmdline
EDK Shell API is not standard API defined by UEFI spec.
The gnu-efi below v3.0 doesn't support EDK Shell API
(for example, GetShellArgcArgv), that leads to the hypervisor
unable to boot up when the host machine is installed with
old gnu-efi.

Signed-off-by: Jack Ren <jack.ren@intel.com>
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-23 11:10:47 +08:00
Jack Ren
6d3ceaef98 hv: pass the cmdline to hypervisor
That can allow the user to pass the cmdline to hypervisor
from UEFI Shell or BIOS. For example:

Shell> EFI\acrn\acrn.efi bootloader=\EFI\org.clearlinux\bootloaderx64.efi uart=mmio@0x91230000

$ sudo efibootmgr -c -l "\EFI\acrn\acrn.efi" -d /dev/sda -p 1 -L \
"ACRN Hypervisor" -u "bootloader=\EFI\org.clearlinux\bootloaderx64.efi uart=mmio@0x91230000"

Signed-off-by: Jack Ren <jack.ren@intel.com>
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-23 11:10:47 +08:00
Yonghua Huang
03ae242eb7 HV:initialize variables before reference in vmx.c
- to avoid complains from code static scan tool

Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
2018-05-22 17:16:07 +08:00
Mingqiang Chi
ccc1c25e88 hv:Use exception vector MACRO instead of hardcode
Now use hardcode when inject GP/NMI to guest,
replace it with MACRO.

Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
2018-05-22 16:42:38 +08:00
Yonghua Huang
aee1931ee6 HV: refine 'decode_instruction() function
update:
   1. remove 'struct mem_io *'from input arguments
   2. return 'opsize' instead of status.
   3. rename 'vmm_decode_instruction()'

Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
2018-05-22 16:41:19 +08:00