Commit Graph

4018 Commits

Author SHA1 Message Date
Deb Taylor
add89b51ec Remove "or newer" reference to ensure that users know ACRN 1.2 requires ONLY Clear Linux OS version 30690.
Signed-off-by: Deb Taylor <deb.taylor@intel.com>
2019-09-06 18:44:17 -04:00
Mingqiang Chi
cd40980d5f hv:change function parameter for invept
change the input parameter from vcpu to eptp in order to let this api
more generic, no need to care normal world or secure world.

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
2019-09-05 16:32:30 +08:00
Tw
1547a4cb27 efi-stub: fix stack memory free issue
Because of this commit:

    commit 63e258bd01
    Author: Tianhua Sun <tianhuax.s.sun@intel.com>
    Date:   Wed Jul 17 14:33:47 2019 +0800

	efi-stub: update string operation in efi-stub

	Remove unsafe API in efi-stub
	1, use Strnlen instead of StrLen except the parameter
	   is a static string.
	2, strlen() only work on static strings.

	Tracked-On: #3276
	Signed-off-by: Tianhua Sun <tianhuax.s.sun@intel.com>
	Reviewed-by: Yonghua Huang <yonghua.huang@intel.com>

In the default case, bootloader_name will be point to a separate ro
section which hold the constant string, free this memory later will
cause undefined behavior (memory corruption, exception and so on).

Tracked-On: #3644
Signed-off-by: Tw <wei.tan@intel.com>
Reviewed-by: Jack Ren <jack.ren@intel.com>
2019-09-05 16:32:06 +08:00
Binbin Wu
cd1ae7a89e hv: cat: isolate hypervisor from rtvm
Currently, the clos id of the cpu cores in vmx root mode is the same as non-root mode.
For RTVM, if hypervisor share the same clos id with non-root mode, the cacheline may
be polluted due to the hypervisor code execution when vmexit.

The patch adds hv_clos in vm_configurations.c
Hypervisor initializes clos setting according to hv_clos during physical cpu cores initialization.
For RTVM,  MSR auto load/store areas are used to switch different settings for VMX root/non-root
mode for RTVM.

Tracked-On: #2462
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
2019-09-05 09:59:13 +08:00
Mingqiang Chi
38ca8db19f hv:tiny cleanup
-- remove some unnecessary includes
-- fix a typo
-- remove unnecessary void before launch_vms

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
2019-09-05 09:58:47 +08:00
Yan, Like
f15a3600ec hv: fix tsc_deadline correctness issue
Fix tsc_deadline issue by trapping TSC_DEADLINE msr write if VMX_TSC_OFFSET is not 0.
Because there is an assupmtion in the ACRN vART design that pTSC_Adjust and vTSC_Adjust are
both 0.
We can leave the TSC_DEADLINE write pass-through without correctness issue becuase there is
no offset between the pTSC and vTSC, and there is no write to vTSC or vTSC_Adjust write observed
in the RTOS so far.
This commit fix the potential correctness issue, but the RT performance will be badly affected
if vTSC or vTSC_Adjust was not zero, which we will address if such case happened.

Tracked-On: #3636
Signed-off-by: Yan, Like <like.yan@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-09-05 09:58:16 +08:00
Yan, Like
3f84acda09 hv: add "invariant TSC" cap detection
ACRN HV is designed/implemented with "invariant TSC" capability, which wasn't checked at boot time.
This commit adds the "invairant TSC" detection, ACRN fails to boot if there wasn't "invariant TSC" capability.

Tracked-On: #3636
Signed-off-by: Yan, Like <like.yan@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-09-05 09:58:16 +08:00
Xiaoguang Wu
be0a4b692b DM USB: fix enumeration related issues
The patch fixes enumeration related issues introduced by commit 'fc3d19'.

Tracked-On: #3612
Signed-off-by: Xiaoguang Wu <xiaoguang.wu@intel.com>
Acked-by: Yu Wang <yu1.wang@intel.com>
2019-09-03 12:22:46 +08:00
Shuo A Liu
e7179aa7a0 dm: support VM running with more than 4 vcpus
Change hardcode of vcpu number to the real value when process VM's IO
request in DM, so we can handle all requests from different vcpus.

Tracked-On: #3425
Signed-off-by: Shuo A Liu <shuo.a.liu@intel.com>
Acked-by: Yu Wang <yu1.wang@intel.com>
2019-09-03 08:50:40 +08:00
Yin Fengwei
adf3a59302 Makefile: Refine Makefile to generate both industry and sdc images
We are trying to add both industry and sdc images to CL build. To
maintain the build interface unchanged (no change from CL side), we
extend the build command to generate the different target images.

To identity different images, we use rule:
   $(HV_FILE).$(BOARD).$(FIRMWARE).$(SCENARIO)
as target image file name.

Tracked-On: #3593
Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
2019-09-02 19:25:31 +08:00
Shiqing Gao
f9945484a7 hv: vtd: fix MACRO typos
ROOT_ENTRY_LOWER_CTP_MASK shall be (0xFFFFFFFFFFFFFUL << ROOT_ENTRY_LOWER_CTP_POS)
rather than (0xFFFFFFFFFFFFFUL).
Rationale:
CTP is bits 63:12 in a root entry according to Chapter 9.1 Root Entry in
VT-d spec.

Similarly, update ROOT_ENTRY_LOWER_PRESENT_MASK to keep the coding style
consistent.

CTX_ENTRY_UPPER_DID_MASK shall be (0xFFFFUL << CTX_ENTRY_UPPER_DID_POS)
rather than (0x3FUL << CTX_ENTRY_UPPER_DID_POS).
Rationale:
DID is bits 87:72 in a context entry according to Chapter 9.3 Context
Entry in VT-d spec. It takes 16 bits rather than 6 bits.

Tracked-On: #3626
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-08-29 12:41:53 +08:00
dongshen
295701cc55 hv: remove mptable code for pre-launched VMs
Now that ACPI is enabled for pre-launched VMs, we can remove all mptable code.

Tracked-On: #3601
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
2019-08-29 10:12:25 +08:00
dongshen
b447ce3d86 hv: add ACPI support for pre-launched VMs
Statically define the per vm RSDP/XSDT/MADT ACPI template tables in vacpi.c,
RSDP/XSDT tables are copied to guest physical memory after checksum is
calculated. For MADT table, first fix up process id/lapic id in its lapic
subtable, then the MADT table's checksum is calculated before it is copies to
guest physical memory.

Add 8-bit checksum function in util.h

Tracked-On: #3601
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
2019-08-29 10:12:25 +08:00
dongshen
96b422ce9d hv: create 8-bit sum function
Move 8-bit sum code to a separate new function calculate_sum8() in
util.h and replace the old code with a call to calculate_sum8()

Minor code cleanup in found_rsdp() to make it more readable. Both break and
continue statements are used in a single for loop, changed to only use break
statement to make the logic simpler.

Fixed some coding style issues reported by checkpatch.pl for file
hypervisor/boot/acpi_base.c

Tracked-On: #3601
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
2019-08-29 10:12:25 +08:00
dongshen
81e2152af8 hv: cosmetic fixes in acpi.h
Minor cosmetic fixes in acpi.h:
 Move and group similar defines together
 Rename RSDP_CHECKSUM_LENGTH to ACPI_RSDP_CHECKSUM_LENGTH
 Add post fix 'U' to define as unsinged int and change code accordingly

Tracked-On: #3601
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
2019-08-29 10:12:25 +08:00
dongshen
216c19f4a0 hv: use __packed for all ACPI related structs
All tables and structs must be byte packed to match ACPI
specification, also use __packed in place of __attribute__((packed))

Tracked-On: #3601
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
2019-08-29 10:12:25 +08:00
dongshen
a1ef0ab9d9 hv: move ACPI related defines/structs to acpi.h
Currently ACPI related defines/structs are scattered across multiple C
source files, move them into acpi.h so that they can be shared and used by
vacpi code (to be added in subsequent commits).

Tracked-On: #3601
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
2019-08-29 10:12:25 +08:00
Deb Taylor
6ca4095d9c Update pages with missing links
Signed-off-by: Deb Taylor <deb.taylor@intel.com>
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2019-08-28 09:37:15 -07:00
Conghui Chen
2d57c5feb7 dm: virtio-console: add subclass
Add subclass for virtio-console pci device. Without the subclass, the
device may be probed by 8250_pci serial driver,  and lead to segment
fault in acrn-dm. This issue appears when running debian as Guest OS.

But there is a potential issue, if a new serial driver, which use class
and subclass same as virtio-console, the problem may still trigger. Need
to fix it case by case.

Tracked-On: #3615
Signed-off-by: Conghui Chen <conghui.chen@intel.com>
Acked-by: Yin Fengwei <fengwei.yin@intel.com>
2019-08-27 09:47:00 +08:00
Yin Fengwei
66056c1acb dm: bzimage loader: get linux bzimage setup_sects from header
According to $(LINUX_SRC)/Documentation/x86/boot.txt, the header
of bzimage has setup sector number in offset 0x1f1. We don't
need to scan the SETUP_SIG and detect the setup sector number
actually which is not documented in x86 boot protocol.

Tracked-On: #3619
Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Yu Wang <yu1.wang@intel.com>
2019-08-27 09:46:23 +08:00
Xiaoguang Wu
fc3d19bee4 DM USB: fix potential crash risk due to null pointer
Fix potential risk to crash due to null pointer.

Tracked-On: #3612
Signed-off-by: Xiaoguang Wu <xiaoguang.wu@intel.com>
Acked-by: Yu Wang <yu1.wang@intel.com>
2019-08-26 14:17:49 +08:00
Binbin Wu
4a71a16a13 hv: vtd: remove global cache invalidation per vm
Cacheline is flushed on EPT entry change, no need to invalidate cache globally
when VM created per VM.

Tracked-On: #3607
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Reviewed-by: Anthony Xu <anthony.xu@intel.com>
2019-08-26 10:47:17 +08:00
Binbin Wu
5c81659713 hv: ept: flush cache for modified ept entries
EPT tables are shared by MMU and IOMMU.
Some IOMMUs don't support page-walk coherency, the cpu cache of EPT entires
should be flushed to memory after modifications, so that the modifications
are visible to the IOMMUs.

This patch adds a new interface to flush the cache of modified EPT entires.
There are different implementations for EPT/PPT entries:
- For PPT, there is no need to flush the cpu cache after update.
- For EPT, need to call iommu_flush_cache to make the modifications visible
to IOMMUs.

Tracked-On: #3607
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Reviewed-by: Anthony Xu <anthony.xu@intel.com>
2019-08-26 10:47:17 +08:00
Binbin Wu
2abd8b34ef hv: vtd: export iommu_flush_cache
VT-d shares the EPT tables as the second level translation tables.
For the IOMMUs that don't support page-walk coherecy, cpu cache should
be flushed for the IOMMU EPT entries that are modified.

For the current implementation, EPT tables for translating from GPA to HPA
for EPT/IOMMU are not modified after VM is created, so cpu cache invlidation is
done once per VM before starting execution of VM.
However, this may be changed, runtime EPT modification is possible.

When cpu cache of EPT entries is invalidated when modification, there is no need
invalidate cpu cache globally per VM.

This patch exports iommu_flush_cache for EPT entry cache invlidation operations.
- IOMMUs share the same copy of EPT table, cpu cache should be flushed if any of
  the IOMMU active doesn't support page-walk coherency.
- In the context of ACRN, GPA to HPA mapping relationship is not changed after
  VM created, skip flushing iotlb to avoid potential performance penalty.

Tracked-On: #3607
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Reviewed-by: Anthony Xu <anthony.xu@intel.com>
2019-08-26 10:47:17 +08:00
Jack Ren
826aaf7bab version: 1.3-unstable
Signed-off-by: Jack Ren <jack.ren@intel.com>
2019-08-24 09:35:51 +08:00
lirui34
48d06da743 doc: Add three known issues to the v1.2 release notes
Add three known issues to the v1.2 release notes.

Signed-off-by: lirui34 <ruix.li@intel.com>
2019-08-23 19:50:42 +08:00
Mingqiang Chi
2310d99ebf hv: cleanup vmcs.h
-- move 'RFLAGS_AC' to cpu.h
-- move 'VMX_SUPPORT_UNRESTRICTED_GUEST' to msr.h
   and rename it to 'MSR_IA32_MISC_UNRESTRICTED_GUEST'
-- move 'get_vcpu_mode' to vcpu.h
-- remove deadcode 'vmx_eoi_exit()'

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-08-22 14:13:15 +08:00
Mingqiang Chi
bd09f471a6 hv:move some APIs related host reset to pm.c
move some data structures and APIs related host reset
from vm_reset.c to pm.c, these are not related with guest.

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
2019-08-22 14:09:18 +08:00
Victor Sun
2736b6c4cd HV: add vCOM2 setting for hybrid and industry scenario
The vCOM2 of each VM is designed for VM communication, one VM could send
command or request to another VM through this channel. The feature will
be used for system S3/S5 implementation.

On Hybird scenario, vCOM2 of pre-launched VM will connect to vCOM2 of SOS_VM;
On Industry scenario, vCOM2 of post-launched RTVM will connect to vCOM2 of
SOS_VM.

Tracked-On: #3602

Signed-off-by: Victor Sun <victor.sun@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
2019-08-22 13:12:54 +08:00
Victor Sun
c8cdc7e807 HV: move vCOM setting from Kconfig to board configs
The settings of SOS VM COM1 which is used for console is board specific,
and this result in SOS VM COM2 which used for VM communication is also
board specific, so move the configure method from Kconfig to board configs
folder. The MACRO definition will be handled by acrn-config tool in future.

Tracked-On: #3602

Signed-off-by: Victor Sun <victor.sun@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
2019-08-22 13:12:54 +08:00
Yan, Like
5dd07f7113 doc: remove "pincpu" option description
Update the document becase the "pincpu" option is removed.

Tracked-On: #3600
Signed-off-by: Yan, Like <like.yan@intel.com>
2019-08-22 13:06:28 +08:00
Yan, Like
2fab3c5198 dm: remove unsupported "pincpu" option
ACRN-DM does not support "pincpu" option to pin 'vcpu' to 'hostcpu', ACRN support vcpu to pcpu static mapping
via vm_config.
This commit removes the "pincpu" option.

Tracked-On: #3600
Signed-off-by: Yan, Like <like.yan@intel.com>
Acked-by: Yin Fengwei <fengwei.yin@intel.com>
2019-08-22 13:06:28 +08:00
Victor Sun
1399f47987 doc: update partition desc for up2 board
modify partition desc table of up2 board to make it consistent with
launch uos script.

Signed-off-by: Lei Lu <leix.lu@intel.com>
Signed-off-by: Victor Sun <victor.sun@intel.com>
2019-08-22 09:10:38 +08:00
Victor Sun
4709554af9 DM: set data partition of apl-up2 to mmcblk0p1
mmcblk0p3 will be reserved for sos rootfs, so use mmcblk0p1 for data partion.

Tracked-On: #3214

Signed-off-by: Victor Sun <victor.sun@intel.com>
2019-08-22 09:10:38 +08:00
Victor Sun
5a1842afb8 HV: set sos root dev of apl-up2 to mmcblk0p3
Set sos root device of apl-up2 to mmcblk0p3 and let UP2 uefi variant
and sbl variant share one config for now.

Tracked-On: #3214

Signed-off-by: Victor Sun <victor.sun@intel.com>
2019-08-22 09:10:38 +08:00
Victor Sun
6c99f76404 HV: prepare ve820 for apl up2
We need ve820 table to enable prelaunched VM for apl-up2 board;

Tracked-On: #3214

Signed-off-by: Victor Sun <victor.sun@intel.com>
2019-08-22 09:10:38 +08:00
Yuan Liu
3cc0eabac6 dm: pm: support control method power button
ACPI supports two ways for power button device, one of them is control
method, and its _HID object is PNP0C0C.

If power button mediator doesn't scan power button from LNXPWRBN node
try to scan PNP0C0C node instead.

v2): Move the functions of openning fixed/control method power button to open_native_power_button

Tracked-On: #3594
Signed-off-by: Yuan Liu <yuan1.liu@intel.com>
Acked-by: Yu Wang <yu1.wang@intel.com>
2019-08-20 09:27:32 +08:00
Yin Fengwei
6beb34c3cb vm_load: update init gdt preparation
Now, we use native gdt saved in boot context for guest and assume
it could be put to same address of guest. But it may not be true
after the pre-launched VM is introduced. The gdt for guest could
be overwritten by guest images.

This patch make 32bit protect mode boot not use saved boot context.
Insteadly, we use predefined vcpu_regs value for protect guest to
initialize the guest bsp registers and copy pre-defined gdt table
to a safe place of guest memory to avoid gdt table overwritten by
guest images.

Tracked-On: #3532

Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-08-20 09:22:20 +08:00
Yonghua Huang
700a37856f hv: remove 'flags' field in struct vm_io_range
Currently, 'flags' is defined and set but never be used
  in the flow of handling i/o request after then.

Tracked-On: #861
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-08-19 10:19:54 +08:00
Conghui Chen
eab4e42e7b hv: enable console vuart in industry scenario
Enable console vuart for the reset of VMs in industry scenario.

Tracked-On: #3370
Signed-off-by: Conghui Chen <conghui.chen@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
2019-08-19 08:54:25 +08:00
fuzhongl
c7f569da30 HV: switch launch LaaG with OVMF by default
OVMF will open source for V1.2, so enable launch LaaG with OVMF.

Tracked-On: #3506
Reviewed-by: Binbin Wu <binbin.wu@intel.com>
Signed-off-by: fuzhongl <fuzhong.liu@intel.com>
2019-08-19 08:53:39 +08:00
David B. Kinder
4d4c4e7b68 doc: remove modernizr.min.js
modernizr.min.js is no longer used by Sphinx's rtd theme and is causing
some browsers to have a noticable flash when pages are loaded. While we
can't easily remove it from the RTD theme, we can replace the script
with an empty file instead.

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2019-08-16 15:36:46 -07:00
Yonghua Huang
f791574f0e hv: refine the function pointer type of port I/O request handlers
In the definition of port i/o handler, struct acrn_vm * pointer
 is redundant as input, as context of acrn_vm is aleady linked
 in struct acrn_vcpu * by vcpu->vm, 'vm' is not required as input.

 this patch removes argument '*vm' from 'io_read_fn_t' &
 'io_write_fn_t', use '*vcpu' for them instead.

Tracked-On: #861
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
2019-08-16 11:44:27 +08:00
Jie Deng
866935a53f hv: vcr: check guest cr3 before loading pdptrs
Check whether the address area pointed by the guest
cr3 is valid or not before loading pdptrs. Inject #GP(0)
to guest if there are any invalid cases.

Tracked-On: #3572
Signed-off-by: Jie Deng <jie.deng@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-08-16 11:43:17 +08:00
David B. Kinder
5b5efe7193 doc: add v1.2 to the release navigation picker
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2019-08-15 09:50:33 -07:00
David B. Kinder
7131b19f4a doc: remove references to 2.0 in intro
While we internally call the "new" ACRN architecture 2.0, it could be
confusing to users since we also are calling the upcoming release v1.2
and there is no 2.0 release yet.  Remove references to 2.0 in the
introduction.

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2019-08-15 09:41:23 -07:00
lirui34
27b7cc23ea doc: Release Notes v1.2
Add release notes v1.2

Signed-off-by: lirui34 <ruix.li@intel.com>
2019-08-15 09:23:40 -07:00
David B. Kinder
e77d1d7343 doc: add new scenario-based intro
Add the scenario configurations to the ACRN introduction.

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2019-08-15 09:16:24 -07:00
Deb Taylor
a5647e9edf Content edits
Signed-off-by: Deb Taylor <deb.taylor@intel.com>
2019-08-14 21:09:49 -07:00
huihuang.shi
f147c388a5 hv: fix Violations touched ACRN Coding Guidelines
fix violations touched below:
1.Cast operation on a constant value
2.signed/unsigned implicity conversion
3.return value unused.

V1->V2:
1.bitmap api will return boolean type, not need to check "!= 0", deleted.
2.The behaves ~(uint32_t)X and (uint32_t)~X are not defined in ACRN hypervisor Coding Guidelines,
removed the change of it.
Tracked-On: #861
Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
2019-08-15 09:47:11 +08:00