Commit Graph

873 Commits

Author SHA1 Message Date
Edwin Zhai
b4aa981bc0 DM: make removing vGSI capability option as local
Current option of removing vGSI capability is global, which exposes
vIOAPIC link for all ptdev even only one need this. This patch makes
it as ptdev local option to lower the system level impact. To keep
vGSI for MSI capable ptdev, just explicitly append ",keep_gsi" in
option list, like "-s 14,passthru,0/e/0,keep_gsi"

Signed-off-by: Edwin Zhai <edwin.zhai@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-06-29 09:50:15 +08:00
Edwin Zhai
dafca1743d DM: reset each ptdev before assignment
This helps achieving valid dev state after UOS restart

Signed-off-by: Edwin Zhai <edwin.zhai@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-06-29 09:50:15 +08:00
Huihuang Shi
b8384ea0dd HV:common:transfer local variable type
The local variable type should be transfer to non-basic type,
chaned it to length-prefix(uint32_t,int32_t ...) type.

Char *type or char array type which used to pointer a string
will be keeped.

V1->V2 add extra comments.

Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-29 09:49:29 +08:00
Shuo Liu
4ec690fde3 DM/samples: remove clocksource assignment
HPET reading is much slower than TSC. Using it will hurt SOS performance
a lot, and then the whole system performance.

Remove the strict assignment from cmdline. Then SOS kernel will pickup
TSC as default clocksource.

Signed-off-by: Shuo Liu <shuo.a.liu@intel.com>
Reviewed-by: Yu Wang <yu1.wang@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-06-29 00:50:01 +08:00
Yin Fengwei
5b43521461 hv: trap vm0 write/read pm1a/pm1b registers
ACRN needs to trap the pm1a/pm1b written/read from VM0. So we
could know when should we put the system to S3.

We will have two path back to VM0:
 - S3 enter/exit sucess. Will reset VM0 and jump to VM0 wakeup vec
   with real mode
 - S3 enter/exit failed. Will return to the next instruction of
   pm1a/pm1b register writing. VM0 will read the pm1a/pm1b evt
   register to check whether it's waked up or not.

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-29 00:50:01 +08:00
Yin Fengwei
baacfdbce9 hv: Make bsp could start from real mode
S3 resume path for VM0 is put bsp of VM0 to real mode and jump
to the wakeup vec of VM0. So we need to extend the init_guest_state
to support start from real mode.

We apply different CS:IP setting for BSP:
 - if entry_addr of BSP is larger than 0x100000, it's not wakeup
   from S3. We assume it's guest start and set CS:IP by hardcode.
 - if entry_addr of BSP is smaller than 0x100000, it's wakeup
   from S3. We setup CS:IP according to ACPI spec.

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-29 00:50:01 +08:00
Yin Fengwei
0f9d9641d4 hv: add function to return to VM0
Emulate VM0 resume from S3 state:
 - reset BSP of VM0
 - set the BSP entry to saved VM0 wakeup vec and set BSP to real mode
 - start BSP

To match trampoline_spinlock release on ACRN Sx resume path, acquire
trampoline_spinlock if ACRN Sx enter fails.

Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-29 00:50:01 +08:00
Yin Fengwei
02d819144e hv: add enter_s3
enter_s3 is main function for ACRN to enter S3 state with following
process:
 - pause vm0
 - save the wakeup vec of vm0 and set wakeup vec of ACRN. So
   resume from S3 will jump to ACRN wakeup
 - offline APs
 - update the main entry of trampoline to resume entry. After BSP
   is resume from S3, it will jump to resume entry instead of AP
   startup routine
 - turn off vmx
 - suspend devices
 - enter S3.

exit S3 with following process:
 - release trampoline_spinlock which is hold in trampoline code
 - resume devices
 - enable vmx
 - update the main entry of trampoline to AP startup routine.
 - online APs.

The following operations will be resume vm0 which will be added
in next patch.

Signed-off-by: Zheng Gen <gen.zheng@intel.com>
Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-29 00:50:01 +08:00
Yin Fengwei
d34700a1ae hv: prepare for Sx(S3/S5) support in ACRN.
Couple of small changes merged in this change:
 - export main_entry, trampoline_spinlock and stop_cpus.
 - change vm_resume() name to resume_vm()
 - change resume_console_enable() name to resume_console()
 - extend reset_vcpu to reset more fields of vcpu

Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-29 00:50:01 +08:00
Yin Fengwei
a06a2f28cd hv: implement lowlevel S3 enter/wakeup
The S3 enter lowlevel routine saves the cpu context to memory
and enter S3 state

The S3 wakeup lowlevel routine restore cpu context and return.

Signed-off-by: Zheng Gen <gen.zheng@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-29 00:50:01 +08:00
Yin Fengwei
443491009e hv: rename the pm.h to guest_pm.h
We will add host_pm.h for ACRN power manager header file.

Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-29 00:50:01 +08:00
Yonghua Huang
a27bfcefed HV: Remove 'register' prefix for data type
- it is unnecessary.

Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
2018-06-29 00:50:01 +08:00
Yan, Like
f74675ce21 hv: pirq: add a header for common data struct and APIs
- add a commont head file include/common/irq.h, to include the common data
  structure and APIs;
- move the common data struct and APIs from arch/x86/irq.h to the common header.

Signed-off-by: Yan, Like <like.yan@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-29 00:50:01 +08:00
Yan, Like
d5912a4d16 hv: pirq: rename related source files
To make the file structure clearer, change the file names:
 - rename arch/x86/interrupt.c to virq.c, for the virtual irq relavant code,
   such as irq injection etc;
 - merge arch/x86/intr_main.c into arch/x86/irq.c;
 - rename arch/x86/intr_lapic.c to lapic.c

Signed-off-by: Yan, Like <like.yan@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-29 00:50:01 +08:00
Li Zhijian
fcbc56439c DM: virtio_rnd: fix rnd->fd and vbs_k->fd leak
Previously, either rnd->fd or vbs_k->fd isn't be closed in some cases.
this patch will close them in time.

V2: fix vbs_k->fd leak as well

Signed-off-by: Li Zhijian <lizhijian@cn.fujitsu.com>
2018-06-29 00:50:01 +08:00
Shiqing Gao
789899d05f dm: deal with physical GSI sharing
- hardcode the devices' GSI info based on the platform
- reject the passthrough if the following requirement is not met
  all the PCI devices that are sharing the same GSI should be assigned
  to same VM to avoid physical GSI sharing between multiple VMs.

v4 -> v5
 * Move the gsi_dev_mapping_tables definition in a separate file
 * Add the GSI info that might be used by GPIO
 * Update the HW name

v3 - > v4
 * Refine the format of raw data to improve the readability
 * Remove the redundant code when adding the new dev into the gsi
    sharing group

v2 -> v3
 * Add the MSI/MSI-x capability check
   Do not add the device which supports MSI/MSI-x to the GSI sharing
   group.

v1 -> v2
 * Update the GSI raw data based on SBL
 * Free the resources when gsi sharing violation occurs
 * Move the MACRO PCI_BDF(b, d, f) to pci_core.h since passthrough.c
    and gsi_sharing.c are both using it

Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Reviewed-by: Edwin Zhai <edwin.zhai@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-29 00:50:01 +08:00
Huihuang Shi
9600dfa07d fix "function return type inconsistent"
MISRA C required function return type should be consistented.

Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-29 00:50:01 +08:00
Kaige Fu
1a607b669d HV: Fix wrong comment of trace_entry size
sizeof trace_entry is 4 * 64bit

No functional change.

Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-29 00:50:01 +08:00
Xiangyang Wu
6192773a86 DM: Update the vcpu id type as uint16_t for vm_create_vcpu
Update the vcpu id type as uint16_t for vm_create_vcpu, this
keeps alignment with the updates for the structure acrn_create_vcpu
used by hcall_create_vcpu in the hypervisor.

In the device model, the caller is responsible for vcpu id type
conversion; vcpu id type is uint16_t for external interface in the
current implement.

Signed-off-by: Xiangyang Wu <xiangyang.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-29 00:50:01 +08:00
Junjie Mao
392542310f HV: treewide: convert suffix ULL to UL
It is already assumed that ''long'' has 8-bytes, and thus there is no need to
use ULL to indicate a 8-byte unsigned constant.

This patch changes all ULL suffixes found in the hypervisor to UL.

Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-29 00:50:01 +08:00
Yonghua Huang
9beb1b92b5 HV: add MTRR capability check when CPU boot
- to avoid reading operations on MTRR registers if
no MTRR feature support on current platform in "init_mtrr()".

Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
2018-06-29 00:50:01 +08:00
Zhu Yingjiang
f67951bf17 enable audio mediator device model
Modify the Makefile to add the virtio_audio.c

Signed-off-by: Zhu Yingjiang <yingjiang.zhu@linux.intel.com>
2018-06-29 00:50:01 +08:00
Zhu Yingjiang
c82551999b audio mediator device model
The device model is a userspace application on SOS to config the
PCI devices for the UOS. Audio mediator device model is to config
the virtual audio PCI device.

Signed-off-by: Zhu Yingjiang <yingjiang.zhu@linux.intel.com>
2018-06-29 00:50:01 +08:00
Anitha Chrisanthus
359e5cf794 dm: Disable stolen memory for passthru graphics
When enabling GPU passthru for guest, stolen memory needs to be
disabled. This change disables stolen memory in passthru mode.

Signed-off-by: Anitha Chrisanthus <anitha.chrisanthus@intel.com>
Reviewed-by: Gong Zhipeng <zhipeng.gong@intel.com>
2018-06-29 00:50:01 +08:00
Anitha Chrisanthus
8d50d40ff8 hv: More changes to enable GPU passthru
Snoop control is not supported in the graphics VT-d engine and so should
be disabled in the PTEs. Also enabled iommu for graphics in the
dmar_drhd array.

v2: removed disable iommu in handle_one_drhd and combined if cond.
v3: minor code review changes
v4: moved the snoop control change to ept.c to accomodate upstream changes
Signed-off-by: Anitha Chrisanthus <anitha.chrisanthus@intel.com>
Reviewed-by: Gong Zhipeng <zhipeng.gong@intel.com>
2018-06-29 00:50:01 +08:00
Anitha Chrisanthus
9d4cc5c11d dm: Change the PCI_EMUL_MEMBASE64 to workable address.
To enable GPU passthru, BAR2 allocation had problems when the allocation
is above the 4GB memory.This change is to accomodate the 256MB aperture
allocation in BAR2 to a more managable address.

v2: changed the MEMBASE64 address instead of increasing the mem_size.

Signed-off-by: Anitha Chrisanthus <anitha.chrisanthus@intel.com>
Reviewed-by: Gong Zhipeng <zhipeng.gong@intel.com>
2018-06-29 00:50:01 +08:00
Yang, Yu-chu
a69a36960a guest.h: Condition operator fix of foreach_vcpu loop
The for loop statement should work in both & and &&, but it seems
make more sense to have && when executing a condtion.

Signed-off-by: Yang, Yu-chu <yu-chu.yang@intel.com>
2018-06-29 00:50:01 +08:00
Yan, Like
5b14df3a35 hv: irq: fix type for vector in ioapic setup
Fix the type for vector in ioapic setup, which is a potential problem:
- return VECTOR_INVALID instead of false in irq_desc_alloc_vector()
  when irq is out of range;
- change variable type from int to uint32_t for vector, and correct
  the returned value check.

Signed-off-by: Yan, Like <like.yan@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-26 10:47:35 +08:00
Yin Fengwei
bab8fadfee hv: Makefile flags initialization
For hypervisor, we initliaze the flags used in build command
to empty to avoid flags set in default env impact to hypervisor
build.

Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: VanCutsem Geoffroy <geoffroy.vancutsem@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-26 10:47:07 +08:00
Geoffroy Van Cutsem
b2fa8c5ea0 Dockerfiles: add Python3 and kconfiglib build dependency
This adds Python3 and the 'kconfiglib' tool to all Dockerfiles.
This is required in order to build (and/or configure) the ACRN
hypervisor.

It also adds 'findutils' to all Fedora Dockerfiles as both 'find'
and 'xargs' are used in some Makefiles and provided by this package.

Signed-off-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
2018-06-25 17:30:30 +08:00
Yin Fengwei
ad59375dfd hv: cpu_context is not only used by guest.
It could be also used by host as well. So we remove GUEST from
MACRO name

Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Eddie Dong <Eddie.dong@intel.com>
2018-06-25 17:29:45 +08:00
Jason Chen CJ
1d66aaacf3 init: separate init function based on different stack
for bsp_boot_init/cpu_secondary_init, they are on temp stack.
for bsp_boot_post/cpu_secondary_post, they are on runtime stack.
define SWITCH_TO MACRO to switch runtime stack then jump to post functions.

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-25 17:29:11 +08:00
Junjie Mao
79fc2469f4 HV: treewide: fix C-style unsigned constants in assembly
MISRA C requires that unsigned constants should have the 'U' suffix, while this
C syntax is not accepted by binutils assembler per binutil manual.

This patch explicitly spells out the unsigned constants used in the assembly
files while tracking the original expressions in comments. This fixes build
failure when using binutils <= 2.26.

v2 -> v3:

    * Explicitly spell out the unsigned constants in assembly, instead of
      duplicating the macros in headers which break the integrity of the
      definitions.

v1 -> v2:

    * Define different macros instead of wrapping all unsigned constants.

Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-25 13:19:43 +08:00
Mingqiang Chi
6d46749d0f hv: fix android boot fail on 4GB memory board
Config remained 1GB page to 1 on 4GB memory

Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
2018-06-25 12:38:31 +08:00
Geoffroy Van Cutsem
5892b98dbd Getting Started Guide: update build dependencies and tools
Add some basic development tools needed to build the ACRN project.
These were not specifically called out (although most likely
already installed in any development system).

Signed-off-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
2018-06-22 08:05:37 -07:00
Li Zhijian
4de9e1b4c0 HV Makefile: fix detection of gnu-efi tools location
The previous logic assumes LIBDIR to be /usr/lib64 if it exists.
some x86_64 distros, like ubuntu and debian, the default x86_64 libs(gnu-efi)
are installed into /usr/lib while /usr/lib64 is for i386
~/workspace$ dpkg -L gnu-efi | grep elf_x86_64_efi.lds
/usr/lib/elf_x86_64_efi.lds

~/workspace$ dpkg -S /usr/lib64
libc6-amd64:i386: /usr/lib64

so it failed to compile efi perviously as following errors:
-----------------
ld: cannot open linker script file /usr/lib64/elf_x86_64_efi.lds: No such file or directory
Makefile:102: recipe for target '/home/lizj/workspace/acrn-hypervisor/build/hypervisor/bsp/uefi/efi/boot.so' failed
make[2]: *** [/home/lizj/workspace/acrn-hypervisor/build/hypervisor/bsp/uefi/efi/boot.so] Error 1
make[2]: Leaving directory '/home/lizj/workspace/acrn-hypervisor/hypervisor/bsp/uefi/efi'
Makefile:191: recipe for target 'efi' failed
make[1]: *** [efi] Error 2
-----------------

v3: Keep the LIBDIR determination logic for linking ('-lgnuefi -lefi').
v2: addressed Geoffroy's comments

Acked-by: "VanCutsem, Geoffroy" <geoffroy.vancutsem@intel.com>
Signed-off-by: Li Zhijian <lizhijian@cn.fujitsu.com>
2018-06-22 17:17:14 +08:00
Xiangyang Wu
c585172492 Rename phy_cpu_num as phys_cpu_num
phys_cpu_num is more popular than phy_cpu_num, update them
through command.

Signed-off-by: Xiangyang Wu <xiangyang.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-22 16:12:52 +08:00
Yin Fengwei
3892bd0455 hv: refine the address used in sbl multiboot code
Update the structure definition to define the address type
(HVA vs HPA vs GPA) explicitly.

Convert address to HVA before access the GPA/HPA type of address.

Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
2018-06-22 16:12:24 +08:00
Li, Fei1
437ed88588 hv: uos needn't to ummap trap mmio memory
We wouldn't map this memory region for UOS.

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-22 16:12:01 +08:00
Li, Fei1
2e535855ce hv: remove config_page_table_attr
Before we set the page table, we should know the attribute. So
move configure the page table attribute outside of modify_paging.

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-22 16:12:01 +08:00
Huihuang Shi
c5c338aecc vtd:fix "negative shift"
MISRA C doesn't allowed negative shift, changed any potential signed value
to unsigned value.

Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-22 12:18:45 +08:00
Huihuang Shi
218a0a8b5d modified struct to fix "negative shift"
The member of width in struct e820_entries,can be declared to
uint32_t(the range of the member is bigger than 0) to avoid
negative shift.

Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-22 12:18:45 +08:00
Huihuang Shi
58672cb562 fix "negative shift"
MISRA C doesn't allowed negative shift, changed any potential signed value
to unsigned value.

Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-22 12:18:45 +08:00
Li Zhijian
de31cf4f5f HV: remove unused API lookp_entry_by_id()
Signed-off-by: Li Zhijian <lizhijian@cn.fujitsu.com>
2018-06-22 12:17:35 +08:00
Minggui Cao
0e49f85a25 improve memory allocation for UOS by hugeTLB mmap
check if there are enough free huge pages(1GB & 2MB now) for UOS,
if no, it will try to reserve more pages for UOS.

here are two examples
1. if system has free huge pages: 1 page of 1GB size, 0 page of 2MB.
one UOS need 2GB + 500MB memory, it will try to reserve one more 1GB
page and 250 2MB pages from system. If enough free system memory, it
can succeed.

2. if system has free huge pages: 4 pages of 1GB size, 0 page of 2MB.
one UOS need 2GB + 500MB, 1GB huge pages 4 > 2, it's enough, and 2 pages
left. It will try to reserve 250 2MB pages from system free memory,
if failed, it will try to release 1 of the 2 left 1GB pages. And then
try to reserve 250 2MB pages.

Signed-off-by: Minggui Cao <minggui.cao@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-21 17:01:23 +08:00
Junjie Mao
f52a25db7e HV: ptdev: convert vectors in msi_info to unsigned integers
Vectors are unsigned integers now. This patch converts the vectors in struct
ptdev_msi_info to uint32_t so that all variables representing interrupt vectors
are aligned.

No other changes needed except the type declarators since the other functions
manipulating vectors already takes/returns uint32_t.

Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-21 17:00:53 +08:00
Xiangyang Wu
3027bfab10 HV: treewide: enforce unsignedness of pcpu_id
In the hypervisor, physical cpu id is defined as "int" or "uint32_t"
type in the hypervisor. So there are some sign conversion issues
about  physical cpu id (pcpu_id) reported by static analysis tool.
Sign conversion violates the rules of MISRA C:2012.

In this patch, define physical cpu id as "uint16_t" type for all
modules in the hypervisor and change related codes. The valid
range of pcpu_id is 0~65534, INVALID_PCPU_ID is defined to the
invalid pcpu_id for error detection, BROADCAST_PCPU_ID is
broadcast pcpu_id used to notify all valid pcpu.

The type of pcpu_id in the struct vcpu and vcpu_id is "int" type,
this will be fixed in another patch.

V1-->V2:
    *  Change the type of pcpu_id from uint32_t to uint16_t;
    *  Define INVALID_PCPU_ID for error detection;
    *  Define BROADCAST_PCPU_ID to notify all valid pcpu.

V2-->V3:
    *  Update comments for INVALID_PCPU_ID and BROADCAST_PCPU_ID;
    *  Update addtional pcpu_id;
    *  Convert hexadecimals to unsigned to meet the type of pcpu_id;
    *  Clean up for MIN_PCPU_ID and MAX_PCPU_ID, they will be
       defined by configuration.
Note: fix bug in the init_lapic(), the pcpu_id shall be less than 8,
this is constraint by implement in the init_lapic().
Signed-off-by: Xiangyang Wu <xiangyang.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-21 16:59:21 +08:00
Cai Yulong
2922a657c9 hv: fix compile error
function definition in header file must be signed as static inline type

Signed-off-by: Cai Yulong <yulongc@hwtc.com.cn>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-21 13:13:04 +08:00
Junjie Mao
aa505a28bb HV: treewide: convert hexadecimals used in bitops to unsigned
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
2018-06-21 13:12:39 +08:00
Junjie Mao
cdd38d0bc3 HV: msr: convert hexadecimals used in bitops to unsigned
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
2018-06-21 13:12:39 +08:00