Board defconfig depends on hypervisor configurations and vm configurations,
add this to support to parse board defconfig from vm configuration.
Tracked-On: #4634
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
Acked-by: Terry Zou <terry.zou@intel.com>
Rounding HI_MMIO_START, HI_MMIO_END to the closest 1G. This avoids
round up logic in the hypervisor.
Tracked-On: #4586
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
Launch config should relay on library/common.py and launch_cfg_lib,
then remove the duplicate parameters and functions.
Tracked-On: #3854
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
Acked-by: Terry Zou <terry.zou@intel.com>
Scenario config should relay on library/common.py and scenario_cfg_lib,
then remove the duplicate parameters and functions.
Tracked-On: #3854
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
Acked-by: Terry Zou <terry.zou@intel.com>
Board config should relay on library/common.py and board_cfg_lib, then
remove the duplicate parameters and functions.
Tracked-On: #3854
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
Acked-by: Terry Zou <terry.zou@intel.com>
For purpose to refine the library/common and xx_cfg_lib, should have
to expands parameters and functions to common.py firstly.
Tracked-On: #3854
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
Acked-by: Terry Zou <terry.zou@intel.com>
This patch does the following
1) Removes the limitation on BAR size for 1 GB
2) Align the BAR address to the BAR size
Tracked-On: #4586
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
Acked-by: Terry Zou <terry.zou@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
Added "vcpu_clos" to configuration XML, here is an example of VM2 with 2 vCPUs:
<clos desc="Class of Service for Cache Allocation Technology. Please refer SDM 17.19.2 for details and use with caution.">
<vcpu_clos>1</vcpu_clos>
<vcpu_clos>0</vcpu_clos>
</clos>
A macro will be generated in vm_configuration.h:
#define VM2_VCPU_CLOS {1U, 0U}
And the macro will be used in vm_configuration.c:
struct acrn_vm_config vm_configs[CONFIG_MAX_VM_NUM] = {
...
{
...
.clos = VM2_VCPU_CLOS,
...
}
}
Tracked-On: #4566
Signed-off-by: Yan, Like <like.yan@intel.com>
Reviewed-by: Victor Sun <victor.sun@intel.com>
Need more information from iomem, so dump all the iomem information
from /proc/iomem to instead of system ram information.
Tracked-On: #4569
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
Acked-by: Terry Zou <terry.zou@intel.com>
Currently, config tool generate board files and scenario files in
acrn-hypervisor directory, the origin souce code would be corrupted by
the config tool. Config tool add '--out' option for user to give a path
to store the generated files, without this option, tool will generate
files in origin source code.
Tracked-On: #4517
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
Modify the pattern to grap the correct PCI BDF from board information
file.
Tracked-On: #4530
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
1. add CONFIG_scenario=y config in $(BOARD).config file so that
SCENARIO parameter will not be needed when build with xmls.
2. add CONFIG_MAX_KATA_VM_NUM;
3. add CONFIG_ENFORCE_VALIDATED_ACPI_INFO=y because all ACPI info
generated by acrn-config has been validated;
Tracked-On: #3854
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
Remove '--enable_commit' argument since acrn-config will not use git tool any
more.
Tracked-On: #3854
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
Currently we use separate button to generate board configuration files and
scenario configuration files for hypervisor, this is not friendly from UX
perspective. So remove redundant button on HV configuration generation.
Tracked-On: #3854
Signed-off-by: Victor Sun <victor.sun@intel.com>
Reviewed-by: Shuang Zheng <shuang.zheng@intel.com>
This commit creates the folder for hosting the temporary scenario .xml files if the folder doesn't exist to avoid the FileNotFound python exception.
Tracked-On: #4522
Signed-off-by: Tonny Tzeng <tonny.tzeng@intel.com>
Fix links in documentation that have moved (e.g.,
clearlinux.org/documentation moved to docs.01.org/clearlinux/latest).
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
If the bus number is not 0, then malloc a virtual slot for the device,
meanwhile, it should be added to PT_SLOT for the next query, otherwise
the passthru parameter would be lost in the launch script.
Tracked-On: #4494
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
commit a68f655a11 added two extra header
include in pci_dev.c for logical_partition scenario but acrn-config did
not handle that.
This patch fix the issue.
Tracked-On: #4492
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
1. To keep align with acrn-hypervisor source code, remove a function
that generates ve820 file.
Tracked-On: #3854
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
1. If the device configure space is not fixed by ACPI and its pbar address
is above 4G or lower than 2G, then remap the vbar address to high memory.
2. Due to GPU might have huge MMIO space which would result in
HV_RAM_SIZE overflow, skip its vBAR remapping for now when the size high
than 1GB.
Tracked-On: #4458
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
1. refine vm number macro from scenario config.
2. add sanity check for load order.
Tracked-On: #4458
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
Currently the life_mngr daemon has supported:
listen from the SOS shutdown command,
this patch add support listen shutdown command from RTVM.
and this life_mngr daemon can also run on SOS for listening
shutdown commond from acrn-dm(triggered by RTVM).
Tracked-On: #4446
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Minggui Cao <minggui.cao@intel.com>
Reviewed-by: Yuhong, Tao <yuhong.tao@intel.com>
Acked-by: Yan, Like <like.yan@intel.com>
Since there is no RTVM requirement for sdc2 scenario, replace uuid
495ae2e5-2603-4d64-af76-d4bc5a8ec0e5 which is dedicated to RTVM with
615db82a-e189-4b4f-8dbb-d321343e4ab3
Tracked-On: #4472
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
The SOS_BOOTARGS_DIFF which defined in config xml has included most diff
bootargs, so the prints in vm_configuraton_h.py is redundant and would
cause wrong boot param for SOS VM.
Tracked-On: #4470
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
This patch adds support for,
1. Storing MBA resource and its max supported clos value
in the target xml file under clos subsection.
2. Generating board.c file with MBA RDT resource.
Tracked-On: #3725
Signed-off-by: Vijay Dhanraj <vijay.dhanraj@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
- remove .data and .text directives. We want to place all the boot data and
text in the .entry section since the boot code is different from others
in terms of relocation fixup. With this change, the page tables are in
entry section now and it's aligned at 4KB.
- regardless CONFIG_MULTIBOOT2 is set or not, the 64-bit entry offset is
fixed at 0x1200:
0x00 -- 0x10: Multiboot1 header
0x10 -- 0x88: Multiboot2 header if CONFIG_MULTIBOOT2 is set
0x1000: start of entry section: cpu_primary_start_32
0x1200: cpu_primary_start_64 (thanks to the '.org 0x200' directive)
GDT tables
initial page tables
etc.
Tracked-On: #4441
Reviewed-by: Fengwei Yin <fengwei.yin@intel.com>
Signed-off-by: Zide Chen <zide.chen@intel.com>
Currently config tool generated 'console=/dev/ttySn' in boot cmdline
for logical_partiton scenario, need to strip '/dev/' to avoid kernel
boot issue.
Tracked-On: #4451
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
Devices that support SR-IOV can expose their capabilities in
lspci -vv command as below. The offline tool, instead of picking
up the bios exposed memory region(bc000000) for the devices ends
picking up the SR-IOV memory region(00000000c0000000) and generates
VBAR address (in pci_devices.h). This is incorrect. This patch
fixes the offline tool to take the right memory region as the
VBAR address.
Sample lspic -vv log:
67:00.0 Ethernet controller: Intel Corporation Ethernet Connection
X722 for 10GbE backplane (rev 09)
Subsystem: Intel Corporation Device 0000
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort-
Latency: 0
Interrupt: pin A routed to IRQ 61
Region 0: Memory at bc000000 (64-bit, prefetchable) [size=16M]
Region 3: Memory at c1000000 (64-bit, prefetchable) [size=32K]
Capabilities: [160 v1] Single Root I/O Virtualization (SR-IOV)
IOVCap: Migration-, Interrupt Message Number: 000
IOVCtl: Enable- Migration- Interrupt- MSE- ARIHierarchy+
IOVSta: Migration-
Initial VFs: 32, Total VFs: 32, Number of VFs: 0, Function Dependency Link: 00
VF offset: 16, stride: 1, Device ID: 37cd
Supported Page Size: 00000553, System Page Size: 00000001
Region 0: Memory at 00000000c0000000 (64-bit, prefetchable)
Region 3: Memory at 00000000c1020000 (64-bit, prefetchable)
VF Migration: offset: 00000000, BIR: 0
Tracked-On: #4443
Signed-off-by: Vijay Dhanraj <vijay.dhanraj@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
This patches removes the unused CLOS_required flag from the
offline guest configuration tool.
Tracked-On: #3715
Signed-off-by: Vijay Dhanraj <vijay.dhanraj@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
This patch updates existing <$BOARD$>.xml for RDT support.
If the platform supports RDT, the resource and MAX CLOS
value is generated, else the CLOS_INFO is set to empty.
Tracked-On: #3715
Signed-off-by: Vijay Dhanraj <vijay.dhanraj@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
This patch checks if RDT feature is supported by platform and
updates the CONFIG_RDT_ENABLED flag in the <$BOARD$>.config
file accordingly.
Tracked-On: #3715
Signed-off-by: Vijay Dhanraj <vijay.dhanraj@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
This patch adds support for as generating board.c file
with multiple RDT resources.
Tracked-On: #3715
Signed-off-by: Vijay Dhanraj <vijay.dhanraj@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
and vm configuration
This patch adds support for,
1. Providing list of max supported CLOS value that is common
between all RDT resource to user when configuring scenario xml.
2. Validate and set the clos value in the vm_configuration file.
Tracked-On: #3715
Signed-off-by: Vijay Dhanraj <vijay.dhanraj@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
value among RDT resources.
This patch identifies the least common supported clos value
from multiple RDT resource. This is done so as to have
consistent capabilities across all resource allocations.
From SDM, "The number of CLOS supported for the MBA feature
may or may not align with other resources such as L3 CAT. In
cases where the RDT features support different numbers of
CLOS the lowest numerical CLOS support the common set of
features, while higher CLOS may support a subset. For instance,
if L3 CAT supports 8 CLOS while MBA supports 4 CLOS, all 8 CLOS
would have L3 CAT masks available for cache control, but the
upper 4 CLOS would not offer MBA support. In this case the upper
4 CLOS would not be subject to any throttling control. Software
can manage supported resources / CLOS in order to either have
1) consistent capabilities across CLOS by using the common subset
or 2) enable more flexibility by selectively applying resource
control where needed based on careful CLOS and thread mapping".
We decided to go with option #1, as it will be more consistent
and less prone to user errorw hen programming the resource mask
MSRs.
Tracked-On: #3715
Signed-off-by: Vijay Dhanraj <vijay.dhanraj@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
xml file
This patch adds support for parsing RDT resources and
its max clos, max supported mask values from the target xml file.
Tracked-On: #3715
Signed-off-by: Vijay Dhanraj <vijay.dhanraj@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
This patch adds support for storing multiple RDT resource
and its max supported clos value in the target xml file under
clos subsection.
Tracked-On: #3715
Signed-off-by: Vijay Dhanraj <vijay.dhanraj@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
The slot in launch config would be conflicted when the same bdf is
selected from webUI.
This patch do the below condition to avoid such case:
1. Add the bdf check for pass-through devices.
2. Use the bus:dev:func as passthru device option in launch config.
v1-v2:
1. If BUS of PCI device for passthru is not 0, then alloc a virtual
slot for it.
Tracked-On: #4312
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
KATA VM is not supported on dual-core systems override the
MAX_KATA_VM_NUM to 0.
Tracked-On: #4319
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
apl-mrb need to access P2SB device, so add 00:0d.0 P2SB device to
whitelist for platform pci hidden device.
Tracked-On: #3475
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Reviewed-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
- python script crashes if the desired 'clos' tag doesn't exist in the
scenario xml file. In the following example, tag '0' doesn't exist:
clos_set: {1: '0', 2: '0'}
referring to tag 0 directly ("vm_info.clos_set[0] == None") causes crash.
To fix it, this patch uses "if i in vm_info.clos_set:" where 'i' is the
VM id and serves as the tag in the clos_set dictionary, to sanity
check the dictionary.
- if the hardware doesn't support CAT, don't need to generate clos entry
in the vm_config[], which could be confusing.
- to reduce redundant code, wrap the clos generation code as a function.
Tracked-On: #2462
Signed-off-by: Zide Chen <zide.chen@intel.com>
