Commit Graph

1227 Commits

Author SHA1 Message Date
Yonghua Huang
c853eb4bc2 hv: remove redundant code for virtual interrupt injection
- vlapic_pending_intr() is called only for case no
    APICv/VID(Virtual Interrupt Delivery) feature support,
    in this case, there is no need to test VID case.

  - remove 'apicv_pending_intr()' function.

Tracked-On: #2427
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-28 11:36:17 +08:00
Sainath Grandhi
6d5456a0df hv: Bit Representation for IOAPIC RTE
As we enable Interrupt Remapping, bit positions in IOAPIC RTEs
have a different syntax for programming. ACRN should handle original
format for vIOAPIC as well IR representation for physical IOAPIC.
This patch adds bit granularity IOAPIC RTE.

Tracked-On: #2407
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
2019-01-26 23:25:34 +08:00
Sainath Grandhi
7d57eb056e hv: Add bit representation for MSI addr and data
As we enable Interrupt Remapping, bit positions in MSI address and
data registers have a different syntax for programming. This patch adds
bit granularity for MSI address and data structs.

Tracked-On: #2407
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
2019-01-26 23:25:34 +08:00
Mingqiang Chi
6825043078 hv:Move severl variable declaration for boot code
-- add header file ld_sym.h in include/arch/x86/boot/
-- move 'ld_bss_start/end' from cpu.h to ld_sym.h,
   avoid reverse dependency
-- move 'ld_text_end' from mmu.h to ld_sym.h
-- move 'ld_trampoline_load/start/end' to ld_sym.h

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2019-01-25 21:32:21 +08:00
Victor Sun
c20d095a63 HV: refine sos_vm config header
The sos_vm config under arch/x86/configs/$(CONFIG_BOARD) folder should be
customer specific configuration, leave it back to customer.

When hypervisor start building, it will check whether BOARD specific sos_vm.h
exist in configs/$(CONFIG_BOARD) folder. If exist, then include this header;
if not, then include default sos_vm config header under configs/default folder.

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-25 21:30:49 +08:00
Victor Sun
66e0023029 HV: sanitize vm config
Add a API to sanitize vm_configs[] array, in this API, we will do sanity
check for VM configurations and refill some fields in vm_configs[]. If
sanity check is failed, the HV would reject to boot.

About pcpu_bitmap of SOS_VM:

We should not hard code pcpu_bitmap for SOS_VM, this is not convenient for
unconfigured boards. The pcpu_bitmap follows a very simple rule:

All physical CPUs except ocuppied by Pre-launched VMs are all belong to
SOS_VM. In this way, the pcpu_bitmap of a SOS_VM is decided by pcpu_bitmap
status in PRE_LAUNCHED_VMs.

To get the correct pcpu_bitmap of SOS_VM, We need to setup another rule, that
the vm_configs[] array should follow the order of PRE_LAUNCHED_VM - SOS_VM
strictly.

With this patch enabled, the pcpu_bitmap field of sos vm config is not needed
to configure;

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-25 21:30:49 +08:00
Jason Chen CJ
285b64faec replace arch_switch_to with pure asm code instead of inline asm
after compile, the compiled code could change rsp, so use pure asm code
to avoid such problem which will cause schedule switch failure.

Tracked-On: #2410
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
2019-01-25 11:39:47 +08:00
Jason Chen CJ
c233bf54a2 make sure secondary CPU's stack is aligned with CPU STACK
secondary CPU's stack should be aligned with 16

Tracked-On: #2410
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
2019-01-25 11:39:47 +08:00
Yonghua Huang
ee066a7f1c hv: fix possible buffer overflow in 'vcpu_set_eoi_exit()'
'vector' should be no greater than 0xff,else
 'eoi_exit_bitmap[]' will overflow.

Tracked-On: #1252
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-25 11:26:45 +08:00
Yonghua Huang
88eeae3f1f hv: remove unused fields in 'struct acrn_vcpu'
below fields are defined but not used.
- sync, pause_cnt & dbg_req_state.

Tracked-On: #861
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2019-01-25 11:26:33 +08:00
Victor Sun
d0eb83aa0c HV: move Kconfig IOREQ_POLLING to acrn vm config
Previously I/O emulation completion mode mode was configured in Kconfig:

	config IOREQ_NOTIFICATION
	       bool "Notification mode"
	       help
	         When I/O request is completed, SOS will mark the completion status and
	         notify hypervisor via hypercall. Hypervisor will finish the post work
	         when notification is received.

	config IOREQ_POLLING
	       bool "Polling mode"
	       help
	         When I/O request is completed, SOS will only mark completion status
	         without notifying hypervisor. Hypervisor will poll the completion
	         status and finish the post work.

Now move this configuration to guest_flags of acrn_vm_config struct.

	if ((vm_config->guest_flags & IO_COMPLETION_POLLING) != 0U) {
		I/O with polling;
	} else {
		I/O with notification;
	}

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-25 10:24:18 +08:00
Chaohong guo
5c5f43523a HV: modify RELOC kconfig option default to "enable"
re-enable RELOC kconfig as default to "y".

Tracked-On: #2349
Signed-off-by: Chaohong guo <chaohong.guo@intel.com>
2019-01-24 11:59:21 +08:00
Chaohong guo
8f22a6e89a HV: fix per-cpu stack relocation in trampoline.c
In write_trampoline_stack_sym(), when do relocation for pcpu's stack,
it wrongly adds an offset. As a result, during booting, when non-BSP
CPU (APs) tries to run trampoline code once they are waken up by BSP
via SIPI, system hangs.

Tracked-On: #2349
Signed-off-by: Chaohong guo <chaohong.guo@intel.com>
Reviewed-By: Yin Fengwei <fengwei.yin@intel.com>
Reviewed-by: Zide Chen <zide.chen@intel.com>
2019-01-24 11:59:21 +08:00
Chaohong guo
41dd38baf2 HV: init_paging() wrongly calcuate the size of hypervisor
when relocation is enabled, the calcuation of HV size in init_paging
routine is not right. As a result, it doesn't enable NX bit for many
pages which don't belong to hypervisor text section.

Tracked-On: #2349
Signed-off-by: Chaohong guo <chaohong.guo@intel.com>
Reviewed-by: Zide Chen <zide.chen@intel.com>
2019-01-24 11:59:21 +08:00
Chaohong guo
9feab4cf29 HV: adjust the starting addr of HV to be 2M-aligned
In init_paging(), when modify page table, it does a round up to 2M on
the starting address of HV memory. If the address is not 2M aligned,
memory overwrite occurs, or memory attribute(cache, u/s) may be not
right. Besides, trusty memory (uos_sworld_memory) in .bss section is 2M
aligned during compiling,  after enabling HV memroy 2M alignment, when
relocation is enabled, EFI stub or other loaders just needs to find a
2M-aligned starting addr for HV memory.

Tracked-On: #2349
Signed-off-by: Chaohong guo <chaohong.guo@intel.com>
Reviewed-by: Zide Chen <zide.chen@intel.com>
2019-01-24 11:59:21 +08:00
Jason Chen CJ
3c60512738 io_emul: reorg function definition to pass partition mode build
reorg function definition to pass partition mode build

Tracked-On: #2394
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
2019-01-23 16:21:17 +08:00
Jason Chen CJ
15030f6f2c io_emul: reshuffle io emulation path
This is the following patch after removing pending_pre_work, it make sure
all io emulation is done on its own cpu.

For hv emulated request, it follows the steps:
	hv_emulate_pio->emulate_pio_complete
	hv_emulate_mmio->emulate_mmio_complete

For dm emulated request, it follows the steps:
	acrn_insert_request->dm_emulate_io_complete
while in acrn_insert_request, it could trigger scheduling out then resume by
hcall_notify_ioreq_finish, or busy wait for ioreq completion if polling mode
is enabled.

Tracked-On: #2394
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Xu, Anthony <anthony.xu@intel.com>
2019-01-23 16:21:17 +08:00
Jason Chen CJ
fb41ea5cfb io_emul: remove pending_pre_work
Now we do not need pending_pre_work anymore, as we can make sure IO request
VCPU resume from where it paused.

Now only three fixed points will try to do schedule:
- vcpu_thread: before vm entry, will check reschedule flag and to it if needed
- default_idle: loop check reschedule flag to see if need switch out
- io request: if IO REQ need DM's handle, it will schedule out

Tracked-On: #2394
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Xu, Anthony <anthony.xu@intel.com>
2019-01-23 16:21:17 +08:00
Jason Chen CJ
4fc54f952e schedule: add full context switch support
this patch added full context switch support for scheduling, it make sure
each VCPU has its own stack, and added host_sp field in struct sched_object
to record host stack pointer for each switch out object.

Arch related function arch_switch_to is added for context switch.

To benefit debugging, a name[] field is also added into struct sched_object.

Tracked-On: #2394
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Xu, Anthony <anthony.xu@intel.com>
2019-01-23 16:21:17 +08:00
Shiqing Gao
5e94788689 hv: vlapic: remove calcvdest
- remove `calcvdest` and use `vlapic_calcdest` directly

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-23 13:43:09 +08:00
Minggui Cao
173b534b05 HV: modularization cleanup instr_emul header file
separate the private macro/structure/functions, which are just used
in instr_emul.c;

and move instr_emul.h to public include path.

Tracked-On: #1842
Signed-off-by: Minggui Cao <minggui.cao@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2019-01-22 10:50:30 +08:00
Victor Sun
18dbdfd5d7 HV: replace lapic_pt with guest flag in vm_config
The member of lapic_pt in acrn_vm_config will be replaced by
guest_flag of LAPIC_PASSTHROUGH;

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-21 18:03:31 +08:00
Victor Sun
23f8e5e598 HV: replace memory config with acrn_vm_mem_config
The member of mem_size and start_hpa in acrn_vm_config struct will
be replaced with the acrn_vm_mem_config struct;

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-21 18:03:31 +08:00
Victor Sun
253b25937b HV: remove vm_config pointer in acrn_vm struct
For each vm_array[] item, its config is located in corresponding
index of vm_configs[], so vm_config pointer is not needed any more.

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-21 18:03:31 +08:00
Victor Sun
7bf9b1be2c HV: enable pcpu bitmap config for partition mode
All the legacy cpu configration in vm_description.c are all cleaned up;

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-21 18:03:31 +08:00
Victor Sun
2e32fba536 HV: remove sworld_supported in acrn_vm_config
We will use guest_flags of SECURE_WORLD_ENABLED to check wthether
sworld is supported.

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-21 18:03:31 +08:00
Victor Sun
ec199d9609 HV: add get_sos_vm api
This patch creates a new get_sos_vm() api to replace get_vm_from_vmid(0U)
because VM 0 might not be SOS VM now;

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-21 18:03:31 +08:00
Victor Sun
f3014a3c89 HV: show correct vm name per config
The patch will show correct VM name per its configuration. As we do not
validate vm id when call get_vm_from_vmid() any more, we only show VM's
states which their VM type are defined;

If VM name is not configured in config file, then the name is specified
with vm id, i.e. "ACRN VM_(vm id)"

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-21 18:03:31 +08:00
Victor Sun
e6117e0d5b HV: refine launch vm interface
When pcpu enter guest mode, it will call launch_vms() function to launch
VMs in global vm_configs array.

In launch_vms() function, current pcpu will go through vm_config array list
and check whether it is a bsp of configured VM, if yes then it will prepare
corresponding VM and start it. The index of vm_config array will be specified
to VM id.

The first least significant bit in pcpu_bitmap means the bsp of the VM.

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-21 18:03:31 +08:00
Victor Sun
49e6deaf26 HV: rename the term of vm0 to sos vm
Under sharing mode, VM0 is identical with SOS VM. But the coupling of
SOS VM and VM 0 is not friendly for partition mode.

This patch is a pure term change of vm0 to sos VM, it does not change
any code logic or senmantic.

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-21 18:03:31 +08:00
Mingqiang Chi
55e5ed2e1a hv:move ept violation handler to io_emul.c
move this api from ept.c to io_emul.c to avoid
reverse dependency.

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
2019-01-21 13:49:54 +08:00
Mingqiang Chi
1d98b7012d hv: move 'setup_io_bitmap' to vm.c
move this api from io_emul.c to vm.c to avoid reverse
dependency

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
2019-01-21 13:49:54 +08:00
Mingqiang Chi
de4ab6fdfa hv:modulization for IO Emulation
-- rename io.c to io_emul.c, add io_emul.h
-- rename io_request.c to io_req.c,rename ioreq.h to io_req.h
-- move some APIs declaration from ioreq.h to io_emul.h
   related IO emulation

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
	modified:   ../doc/acrn.doxyfile
	modified:   Makefile
	renamed:    arch/x86/io.c -> arch/x86/io_emul.c
	renamed:    common/io_request.c -> common/io_req.c
	modified:   include/arch/x86/hv_arch.h
	modified:   include/arch/x86/io.h
	new file:   include/arch/x86/io_emul.h
	renamed:    include/arch/x86/ioreq.h -> include/arch/x86/io_req.h
2019-01-21 13:49:54 +08:00
Victor Sun
a8e4f227ba HV: add new acrn_vm_config member and config files
- add new struct member for acrn_vm_config;

- add sharing_config.c file with initialized vm_config array;

- add SOS VM config header for apl-mrb/apl-nuc/up2 and dnv-cb2 board;

- and partition_config.c file with dummy vm_config array;

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-18 11:50:00 +08:00
Victor Sun
c4a230f313 HV: rename the term of vm_description to vm_config
This patch is a pure term change of vm_description to vm_config,
the struct name of vm_description is changed to acrn_vm_config.

The patch does not change any code logic or senmantic.

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-18 11:50:00 +08:00
Minggui Cao
f45605dd49 HV: modularization to separate CR related code
1. move the CR related code from vmcs/vcpu to vCR source files.
2. also add virtual_cr.h to acrn.doxyfile to avoid doc failure.

Tracked-On: #1842
Signed-off-by: Minggui Cao <minggui.cao@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
2019-01-18 10:50:18 +08:00
Mingqiang Chi
6372548e11 hv:Fix violation "Cyclomatic complexity greater than 20" in instr_emul.c
Split decode_prefixes() to 2 small APIs

v1-->v2:
    split decode_prefixes to 2 APIs

Tracked-On: #861
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-17 11:22:02 +08:00
yuhong.tao@intel.com
ae144e1a56 hv:fix MISRA-C violation in virq.c
The MISRA-C Standards suggests procedures to be single exit

Tracked-On: #861
Acked-by: Eddie Dong <eddie.dong@intel.com>
Signed-off-by: Tao Yuhong <yuhong.tao@intel.com>
2019-01-17 08:48:42 +08:00
Yan, Like
6641bc7949 hv: remove ACRN_REQUEST_TMR_UPDATE and unnecessary codes
Because ACRN_REQUEST_TMR_UPDATE is not needed anymore, this commit remove
the MACRO definition and its related logic, including following functions:
- apicv_batch_set_tmr()
- vlapic_apicv_batch_set_tmr()
- vlapic_set_tmr_one_vec()
- vioapic_update_tmr()

Tracked-On: #2343
Signed-off-by: Yan, Like <like.yan@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-17 08:48:22 +08:00
Yan, Like
fc61536b07 hv: rework EOI_EXIT_BITMAP update logic
This commit changes the EOI_EXIT_BITMAP as follows:
- add a eoi_exit_bitmap to vlapic structure;
- go through all the RTEs and set eoi_exit_bitmap in the vlapic structure when related RTE fields are modified;
- add ACRN_REQUEST_EOI_EXIT_UPDATE, if eoi_exit_bitmap changed, request the corresponding vcpu to write the bitmap
  to VMCS.

Tracked-On: #2343
Signed-off-by: Yan, Like <like.yan@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-17 08:48:22 +08:00
Yan, Like
f15cc7d6de hv: set/clear TMR bit like hardware behave
Current ACRN implementation update TMR bits one time only when related RTE fields changed,
which is not acting like actual hardware.

From SDM vol3 10.8.4:
"Upon acceptance of an interrupt into the IRR, the corresponding TMR bit is cleared for
edge-triggered interrupts and set for leveltriggered interrupts."

This commit change the ACRN implementation to set/clear corresponding TMR bit when inject
intr to vlapic.

Tracked-On: #2343
Signed-off-by: Yan, Like <like.yan@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-17 08:48:22 +08:00
Sainath Grandhi
c9b617485f hv: Make reserved regions in E820 table to Supervisor pages
On platforms that put ACPI RSDT in "Reserved" type memory, ACRN
fails to parse RSDP and therefore ACPI Tables. This patch adds
"Reserved" memory regions in E820 as Supervisor pages.

Tracked-On: #2320
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
2019-01-17 08:48:07 +08:00
Chaohong guo
dc6d1d5fa7 HV: fix MISRA issue in apicv_pending_intr()
Remove multi-return statement in apicv_pending_intr().

Tracked-On: #861
Signed-off-by: Chaohong guo <chaohong.guo@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-15 13:48:19 +08:00
Chaohong guo
aebb971d41 HV: misra clean for guest.c file
to meeting MISRA, add more bracks for if conditions; also a small
change to copy_gpa() to fix DD flow complaint from MISRA

Tracked-On: #861
Signed-off-by: Chaohong guo <chaohong.guo@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-15 13:48:19 +08:00
Chaohong guo
6a1c865671 HV: add empty else statement for if condition in vlapic.c
To meeting MISRA, add empty else {} for corresponding if-else-if {}.
Also, remove a DD flow violation in vlapic_free()

Tracked-On: #861
Signed-off-by: Chaohong guo <chaohong.guo@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-15 13:48:19 +08:00
Victor Sun
952356099c HV: rename dnv_cb2 to dnv-cb2
To follow the same (albeit implicit) convention with apl-mrb and use dnv-cb2.

Tracked-On: #2291
Signed-off-by: Victor Sun <victor.sun@intel.com>
2019-01-15 13:42:36 +08:00
Zide Chen
b30dfb1da8 hv: fix MISRA-C violations in vmsr.c
In enable_msr_interception(), by removing the local pointer declarations and
all pointer arithmetic operations, the following violations are fixed.

- Use of pointer arithmetic.
- Pointer arithmetic is not on array.
- Pointer not checked for null before use.

Tracked-On: #861
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2019-01-15 08:49:34 +08:00
Li, Fei1
65f3383d62 hv: coding style: remove unnecessary conditional operators
Condtional operators which will add code cyclomatic complexity. So replace the
unnecessary conditional operators.

Tracked-On: #861
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2019-01-14 15:33:05 +08:00
yuhong.tao@intel.com
270d2d2727 hv: virq: fix attempt to change parameter passed by value
The MISRA C stardand do not allow change parameter passed by value

Tracked-On: #861
Acked-by: Eddie Dong <eddie.dong@intel.com>
Signed-off-by: Tao Yuhong <yuhong.tao@intel.com>
2019-01-14 10:34:12 +08:00
Zide Chen
92d7018249 hv: fix 2 minor MISRA-C violations in inst_emul.c
Signed integral type cast to unsigned. :  (unsigned long and long)

Tracked-On: #861
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2019-01-12 10:04:51 +08:00