Commit Graph

596 Commits

Author SHA1 Message Date
Binbin Wu
71a80d2d60 hv: assign: change ptirq vpin source type from enum to macro
This patch fixes the MISRA-C violations on implicit type conversion.
For ptirq vpin source type, there is no need to define a enum.
Remove enum ptirq_vpin_source.
Define two macro:
- PTDEV_VPIN_IOAPIC
- PTDEV_VPIN_PIC

Tracked-On: #861
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-20 13:43:47 +08:00
Yan, Like
530388db30 hv: irq: fix MISRA-C violations in irq.c and idt.h
This commit fixed following violations:
- Procedure has more than one exit point: free_irq_vector/request_irq/dispatch_interrupt
- goto detected: dispatch_interrupt
- Pointer param should be declared pointer to const: fixup_idt
- basic type declaration used: fixup_idt

Tracked-On: #861
Signed-off-by: Yan, Like <like.yan@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-20 09:09:31 +08:00
Kaige Fu
2fefff34a7 HV: x86: fix "Global variable should be declared const"
Gloabal variable should be declared constant wherever possible to avoid unintentional
modification.

Tracked-On: #861
Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-19 13:06:34 +08:00
Zide Chen
d133f95d97 hv: fix MISRA-C violations "Pointer param should be declared pointer to const."
MIRSA-C requires the const qualifier should be applied to pointer parameters
that address data not subject to change in rule 120D.

Tracked-On #861
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-12-19 13:03:03 +08:00
Minggui Cao
f81fb21a58 HV: modularization to refine pm related code.
1. move out vm related code from arch/pm.
2. remove unnecssary global variables.
3. keep the global variables as static, not used
by other modules directlly.

Tracked-On: #1842
Signed-off-by: Minggui Cao <minggui.cao@intel.com>
Reviewed-by: Victor Sun <victor.sun@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-12-19 13:02:09 +08:00
Mingqiang Chi
64a463000f hv:refine prepare_vm0 api
-- fix MISRA-C violation "procedure has more than one exit point"
   for this api
-- change start_vm to void type since it is always return 0

Tracked-On: #861
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-19 09:16:37 +08:00
Jason Chen CJ
97132acccf Make ibrs_type as internal variable
add get_ibrs_type API to get ibrs type.
this patch fix Misra C violation:
filename:/hypervisor/arch/x86/security.c  function:None  offset:19:
       reason:Variable should be declared static. : ibrs_type

Tracked-On: #861
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
2018-12-19 09:07:14 +08:00
Jason Chen CJ
689c1c28c5 function name change in init.c
- bsp_boot_init to init_primary_cpu
- bsp_boot_post to init_primary_cpu_post

Tracked-On: #1842
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
2018-12-19 09:07:14 +08:00
Jason Chen CJ
5968da4635 move security related funcs into security.c
there are still some security related funcs in cpu_caps.c & cpu.c,
move them out into security.c.

Changes to be committed:
	modified:   Makefile
	modified:   arch/x86/cpu.c
	modified:   arch/x86/cpu_caps.c
	modified:   arch/x86/guest/vcpu.c
	new file:   arch/x86/security.c
	modified:   arch/x86/trusty.c
	modified:   arch/x86/vmx_asm.S
	modified:   include/arch/x86/cpu.h
	modified:   include/arch/x86/cpu_caps.h
	modified:   include/arch/x86/per_cpu.h
	new file:   include/arch/x86/security.h

Tracked-On: #1842
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
2018-12-19 09:07:14 +08:00
Jason Chen CJ
0ad6da998c make detect_cpu_cap as internal function
call detect_cpu_cap in init_cpu_capabilities

Tracked-On: #1842
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
2018-12-19 09:07:14 +08:00
Jason Chen CJ
7c8b767192 refine in cpu_caps.c
- we should not use print function before tsc setup
- is_ept_supported is internal API
- add is_apicv_supported to check apicv feature
- rename some functions to verb+obj format or better name

Changes to be committed:
	modified:   arch/x86/cpu.c
	modified:   arch/x86/cpu_caps.c
	modified:   include/arch/x86/cpu_caps.h

Tracked-On: #1842
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
2018-12-19 09:07:14 +08:00
Jason Chen CJ
63773db437 change get_monitor_cap to has_monitor_cap
has_monitor_cap is more suitable name

v2:
- rename to has_monitor_cap

Changes to be committed:
	modified:   arch/x86/cpu.c
	modified:   arch/x86/cpu_caps.c
	modified:   include/arch/x86/cpu_caps.h

Tracked-On: #1842
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-19 09:07:14 +08:00
Jason Chen CJ
746fbe147d modulization: move functions related with cpu caps into cpu_caps.c
move cpu caps related functions like capability init/detect/check
in cpu.c & mmu.c into a new file cpu_caps.c

Changes to be committed:
	modified:   developer-guides/hld/hv-memmgt.rst
	modified:   ../hypervisor/Makefile
	modified:   ../hypervisor/arch/x86/cpu.c
	new file:   ../hypervisor/arch/x86/cpu_caps.c
	modified:   ../hypervisor/arch/x86/mmu.c
	modified:   ../hypervisor/arch/x86/vmx_asm.S
	modified:   ../hypervisor/include/arch/x86/cpu.h
	new file:   ../hypervisor/include/arch/x86/cpu_caps.h
	modified:   ../hypervisor/include/arch/x86/guest/vm.h
	modified:   ../hypervisor/include/arch/x86/mmu.h
	modified:   ../hypervisor/include/arch/x86/vmcs.h

Tracked-On: #1842
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-19 09:07:14 +08:00
Li, Fei1
78e9a84f39 hv: add fast string enhanced rep movsb/stosb check on initial
The ACRN suppose the CPU support fast string enhanced rep.

Tracked-On: #861
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2018-12-18 16:30:27 +08:00
Zhipeng Gong
c547e9cfb4 hv: enable/disable snoop control bit per vm
For security, this patch add one flag per vm and disable snoop control
for sos and enable snoop control for uos by default.

v2: add one flag in vm, not in iommu domain.
v3: add vm null check

Tracked-On: #2086
Signed-off-by: Zhipeng Gong <zhipeng.gong@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-12-18 13:45:10 +08:00
Zide Chen
2028034151 hv: MISRA-C fix "identifier reuse" in vpci code
13X: Identifier reuse: tag vs component.
A tag name shall be a unique identifier

Change the following names:
  struct msi --> struct pci_msi
  struct msix --> struct pci_msix
  struct vpci --> struct acrn_vpci
  union cfgdata -> union pci_cfgdata

Tracked-On: #861
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-18 13:39:15 +08:00
Jason Chen CJ
36863a0b54 modulization: vmx on/off should not use vcpu param
vmx.c should only take care host vmx operations, which should not
contain vcpu reference, so refine vmx on/off APIs, move out use
of vcpu by adding one per cpu vmcs_run pointer.

as now each pcpu only run on one vcpu, so just keep running vmcs
in per cpu vmcs_run pointer is enough.

Changes to be committed:
	modified:   arch/x86/cpu.c
	modified:   arch/x86/init.c
	modified:   arch/x86/pm.c
	modified:   arch/x86/vmcs.c
	modified:   arch/x86/vmx.c
	modified:   include/arch/x86/per_cpu.h
	modified:   include/arch/x86/vmx.h

Tracked-On: #1842
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-18 10:00:56 +08:00
Jason Chen CJ
bed82dd3f8 cleanup vmcs source and header files
remove no need included header files and macro definitions

Changes to be committed:
	modified:   arch/x86/vmcs.c
	modified:   include/arch/x86/vmcs.h

Tracked-On: #1842
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
2018-12-18 10:00:56 +08:00
Jason Chen CJ
731c4836dd modulization: separate vmx.c into two parts
one part is pure vmx operations which keeps in vmx.c
the other part is vmcs operations which is vcpu related, move them
into vmcs.c

Changes to be committed:
	modified:   Makefile
	copied:     arch/x86/vmx.c -> arch/x86/vmcs.c
	modified:   arch/x86/vmx.c
	modified:   arch/x86/vmx_asm.S
	modified:   include/arch/x86/hv_arch.h
	new file:   include/arch/x86/vmcs.h
	modified:   include/arch/x86/vmx.h

Tracked-On: #1842
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
2018-12-18 10:00:56 +08:00
Yin Fengwei
69dc939243 hv: drop the temperory stack for AP startup
By switching AP wakeup from broadcast to one by one, we could
set correct stack for each AP and drop the temp stack used during
AP boot.

Tracked-On: #2034
Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-12-17 19:16:43 +08:00
Jason Chen CJ
59e3f562b8 remove check_tsc
there is no need to clear CR4.TSD as there is no user mode
in ACRN hypervisor.

Tracked-On: #1842
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
2018-12-17 14:31:52 +08:00
Jason Chen CJ
d2bac7cc5d cpu_dead should only run on current pcpu
no need for input param pcpu_id.

Tracked-On: #1842
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-17 14:31:52 +08:00
Zide Chen
44e9318c45 hv: vmsr: fix MISRA_C violations
106D No prototype for non-static function.
  2 functions missing prototyle declarations in header file.

120S Use of bit operator on signed type.
123S Use of underlying enum representation value.
  enum values are treated like unsigned integer in vmsr.c

Tracked-On: #861
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-12-16 14:52:22 +08:00
Yonghua Huang
4fc5dcfc3e hv: enable SMAP in hypervisor
With SMAP enabled, hypervisor can't access pages that
owned by guest(either SOS or UOS), and an override is
is provided: stac()/clac() to enable/disable access to
guest's memory pages.

 Pre-conditon:
    Mark hypervisor owned pages as supervisor mode (U/S = 0),
       and set all othter memory pages as user mode (U/S = 1).

Tracked-On: #2056
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-12-14 15:24:26 +08:00
Yonghua Huang
57dfc7de05 hv: refine IOREQ state operation functions in hypervisor
1) add functions to set/get VHM request state.
2) modify 'complete_ioreq()' in io.c
3) update the caller code

Tracked-On: #2056
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-12-14 15:24:26 +08:00
Zide Chen
c89d6e6526 modularization: clean up namings in vMTRR module
- rename 3 module interface APIs
  init_mtrr() -> init_vmtrr()
  mtrr_rdmsr -> read_vmtrr()
  mtrr_wrmsr() -> write_vmtrr()

- follow naming convention for other modules, rename struct mtrr_state
  to struct acrn_vmtrr. And add acrn_vcpu to it.

- because MTRR is x86 architecture specific, move struct acrn_vmtrr to
  struct acrn_vcpu_arch.

Tracked-on: #1842
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-14 09:43:06 +08:00
Zide Chen
6bbd0129c3 modularization: move vMTRR code to guest directory
MTRR emulation belongs to virtual CPU component.

- rename mtrr.c to vmtrr.c and move it to arch/x86/guest
- rename mtrr.h to vmtrr.h and move it to include/arch/x86/guest

Tracked-On: #1842
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-14 09:43:06 +08:00
Zide Chen
a958fea7a4 hv: emulate IA32_TSC_ADJUST MSR
Intercept IA32_TSC_ADJUST MSR so that writing IA32_TSC_ADJUST from the
guests won't impact the TSC in root mode or potentially other vCPUs in
the same pCPU.

- MSR TSC_ADJUST needs to be isolated between normal and secure world,
  so it's included in NUM_WORLD_MSRS.
- Upon writing to either IA32_TSC_ADJUST or IA32_TSC from the guests,
  don't write to physical MSRS so it won't impact the host side, but
  update the TSC offset VM-execution control.
- don't need to intercept rdmsr for IA32_TIME_STAMP_COUNTER.
- add the missing statement in save_world_ctx() to save the tsc_offset
  during world switch.

Tracked-On: #1867
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-12-14 09:11:37 +08:00
Jason Chen CJ
2d469a5e5f modularization: hypervisor initilization component
hypervisor initilization component triggered by boot component,
and it calls different components initilization functions from
the highest layer.

this patch added init.c and move reorged cpu init functions into
it, keep hardware management functions in cpu.c but move other
components' init function into init.c.

the hypervisor initilization components will call:
- init_cpu_pre
- init_cpu_post
- init_bsp
- init_debug_pre
- init_debug_post
- init_guest
- init_passthru
- enter_guest_mode

the hypervisor initilization component include files:
arch/x86/init.c
include/arch/x86/init.h

this component is higest layer, so there is no reverse dependencies for it.

v2:
- separate into 2 patches, 1 for reorg, 1 for pure move.

Tracked-On: #1842
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Xu, Anthony <anthony.xu@intel.com>
2018-12-14 08:56:15 +08:00
Jason Chen CJ
07427b4ca9 modulization: move virtual cpuid stuff into guest dir
functions like set_vcpuid_entries & guest_cpuid should only
server for virtual cpuid, so move such kind of functions
to guest/vcpuid.c.

and all native cpuid APIs will keep in cpuid.h

Tracked-On: #1842
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-13 09:08:02 +08:00
Li, Fei1
e3fc6c3c79 hv: use int32_t replace int
Since it's typedef in "include/lib/types.h"

Tracked-On: #861
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2018-12-12 13:08:10 +08:00
Li, Fei1
8bafde9942 hv: use uint8_t replace "unsigned char"
Since it's typedef in "include/lib/types.h"

Tracked-On: #861
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2018-12-12 13:08:10 +08:00
Yonghua Huang
4d13ad9d08 hv: enable NX in hypervisor
- enable NX feature in hypervisor:
  1. Set 'XD' bit for all pages, including pages for guests
     when initialize MMU tables in hypervisor.
  2. remove 'XD' bit for pages that contain hypervisor instructions.
  3. enable MSR EFER.NXE,which will enable page access restriction by
     preventing instruction fetches form pages with XD bit set.

- remove "-Wl -z noexecstack" GCC flag option in hypervisor
  Makefile as it would not affect stack attribute in hyervisor,
  which setup stack itself, instead of by loader.

Tracked-On: #1122
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-12-12 12:53:18 +08:00
Minggui Cao
9b58b9d11d HV: improve e820 interfaces and their usages
1. change its APIs as more indepentent, and modify the callers' code
2. limit its global variables as static, and return const to the callers
3. remove unused code in "CONFIG_CMA"

Tracked-On: #1842
Signed-off-by: Minggui Cao <minggui.cao@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-12-12 09:12:12 +08:00
Minggui Cao
b69d24b1d4 HV: separate e820 related code as e820.c/h
1. e820 is modulized as separated files.
2. move boot_regs into multiboot.h as it's related with
multiboot info header

Tracked-On: #1842
Signed-off-by: Minggui Cao <minggui.cao@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-12-12 09:12:12 +08:00
Jason Chen CJ
c2be20d2a0 move idt.S and idt.h out of boot component
based on previous patch, we can move idt.S and idt.h out of boot component

Tracked-On: #1842
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-12 09:07:43 +08:00
Zide Chen
9761eede2a hv: cleanup IA32_PAT emulation code r.w.t. to the refactored guest_msrs[]
Currently there are two fields in ext_context to emulate IA32_PAT MSR:
- ia32_pat: hold the value of the emulated IA32_PAT MSR
- vmx_ia32_pat: used for load/store IA32_PAT MSR during world switch

This patch moves ext_context->ia32_pat to the common placeholder for
emulated MSRs acrn_vcpu_arch->guest_msrs[].

Also it renames ext_context->vmx_ia32_pat to ext_context->ia32_pat to
retain same naming convention in struct ext_context.

Tracked-On: #1867
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-09 21:32:03 +08:00
Zide Chen
b6aaf1b8d9 hv: MSRs may need isolation between normal and secure world
- implement unified APIs to access guest_msrs[] under struct acrn_vcpu.
- use these new APIs to read/write emulated TSC_DEADLINE MSR
- switch world_msrs[] and guest_msrs[] during world switch for MSRs that
  need world isolation
- remove the old guest_msrs[] array and it's index macros.

Tracked-On: #1867
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-09 21:32:03 +08:00
Zide Chen
92bbb545cf hv: rearrange data structure for emulated MSRs
Create two arrays for emulated MSRs:
- guest_msrs[] in struct acrn_vcpu_arch: emulation for all MSRs that are
  included in emulated_guest_msrs[].
- world_msrs[] in struct cpu_context: it has separate copies for secure and
  normal world for those MSRs that are in the first NUM_WORLD_MSRS entries
  in emulated_guest_msrs[].

Split vmsr.c/emulated_msrs[] into 3 smaller arrays:
- emulated_guest_msrs[]: corresponding MSRs are emulated in guest_msrs[]
- mtrr_msrs[]: emulated MTRRs are saved in vMTRR module
- unsupported_msrs[]: GP for any guest accesses

Tracked-On: #1867
Signed-off-by: Zide Chen <zide.chen@intel.com>
2018-12-09 21:32:03 +08:00
Li, Fei1
36be890ee6 hv: fix included file not protected with #define
Tracked-On: #861
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2018-12-07 16:39:58 +08:00
Li, Fei1
ae9d4361fd hv: minimize the case of "identifier reuse"
Identifier reuse may arise confusion. So should minimize the case of it
as much as possible. This patch is try to do this except the PCI related
module.

Tracked-On: #861
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2018-12-07 15:21:39 +08:00
Sainath Grandhi
9ea93ce620 hv: x2APICv support on platforms without support for APICv reg virtualization
On platforms, that do not support APICv register virtualization, all the
x2APIC MSRs need to intercepted by ACRN for emulation.

Tracked-On: #1973
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
2018-12-05 09:21:27 +08:00
Shiqing Gao
f73cf21187 hv: fix 'Unused procedure parameter'
remove the unused procedure parameter

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-04 18:28:32 +08:00
Shiqing Gao
7cc8566d37 hv: fixes related to unused API and uninitialized variable
This patch does:
- remove the unused API declaration
- fix use of uninitialized variable in instr_emul.c

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-04 16:49:49 +08:00
Li, Fei1
5fd6021dee doc: hv: add comments to timer APIs for documentation
This patch adds more comment to describe functions that are
interfaces to the other modules in the hypervisor. The comments
are in doxygen-style for document generation.

Tracked-On: #1595
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2018-12-04 15:09:47 +08:00
Shiqing Gao
11102cfa45 hv: change the param type of mmio_write**
Input parameter of mmio_write64/mmio_write32/mmio_write16/mmio_write8
should be 'void *addr' rather than 'const void *addr' since the object
pointed by 'addr' is modified in these operations.

This patch change the param type of mmio_write** and update its usage
accordingly.

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Reviewed-by: Li, Fei1 <fei1.li@intel.com>
2018-12-04 09:10:54 +08:00
Shiqing Gao
dd43f3ba0a hv: replace CPU_PAGE_MASK with PAGE_MASK
replace CPU_PAGE_MASK with PAGE_MASK
These two MACROs are duplicated and PAGE_MASK is a more reasonable name.

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-03 15:14:57 +08:00
Shiqing Gao
0f766ca6b8 hv: replace CPU_PAGE_SHIFT with PAGE_SHIFT
- replace CPU_PAGE_SHIFT with PAGE_SHIFT
  These two MACROs are duplicated and PAGE_SHIFT is a more
  reasonable name.
- remove unused MACROs related to page shift in cpu.h

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-03 15:14:57 +08:00
Shiqing Gao
2f15d3569c hv: replace CPU_PAGE_SIZE with PAGE_SIZE
replace CPU_PAGE_SIZE with PAGE_SIZE
These two MACROs are duplicated and PAGE_SIZE is a more reasonable name.

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-03 15:14:57 +08:00
Huihuang Shi
10bde520a5 hv: other: fix "Procedure has more than one exit point"
IEC 61508,ISO 26262 standards highly recommend single-exit rule.

Reduce the count of the "return entries".
Fix the violations which is comply with the cases list below:
1.Function has 2 return entries.
2.The first return entry is used to return the error code of
checking variable whether is valid.

Fix the violations in "if else" format.

Tracked-On: #861
Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-03 11:10:04 +08:00