Commit Graph

206 Commits

Author SHA1 Message Date
Mingqiang Chi
f994b5ffaf hv:cleanup vcpu state
-- remove VCPU_PAUSED and resume_vcpu
-- remove vcpu->prev_state in vcpu structure
-- rename pause_vcpu to zombie_vcpu

Tracked-On: #4320
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
2020-05-21 15:08:49 +08:00
Zide Chen
0a956c34c7 hv: add a new field cpu_affinity in struct acrn_vm
For post-launched VMs, the configured CPU affinity could be different
from the actual running CPU affinity. This new field acrn_vm->cpu_affinity
recognizes this difference so that it's possible that CREATE_VM
hypercall won't overwrite the configured CPU afifnity.

Change name cpu_affinity_bitmap in acrn_vm_config to cpu_affinity.
This is read-only in run time, never overwritten by acrn-dm.

Remove vm_config->vcpu_num, which means the number of vCPUs of the
configured CPU affinity. This is not to be confused with the actual
running vCPU number: vm->hw.created_vcpus.

Changed get_vm_bsp_pcpu_id() to get_configured_bsp_pcpu_id() for less
confusion.

Tracked-On: #4616
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2020-05-08 11:04:31 +08:00
Zide Chen
3691e305c0 hv: dynamically configure CPU affinity through hypercall
- add a new member cpu_affinity to struct acrn_create_vm, so that acrn-dm
  is able to assign CPU affinity through HC_CREATE_VM hypercall.

- if vm_create.cpu_affinity is zero, hypervisor launches the VM with the
  statically configured CPU affinity.

Tracked-On: #4616
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2020-04-23 09:38:54 +08:00
Jason Chen CJ
0584981c03 hv:add pre-condition for vm APIs
check the vm state in hypercall api,
add pre-condition for vm api.

Tracked-On: #4320
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2020-04-16 21:59:03 +08:00
Zide Chen
5420b34a26 hv: provide vm_config information in get_platform_info hypercall
Hypervisor reports VM configuration information to SOS which can be used to
dynamically allocate VCPU affinity.

Servise OS can get the vm_configs in this order:

1. call platform_info HC (set vm_configs_addr with 0) to get max_vms and
   vm_config_entry_size.
2. allocate memory for acrn_vm_config array based on the number of VMs
   and entry size that just got in step 1.
3. call platform_info HC again to collect VM configurations.

Tracked-On: #4616
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2020-04-16 13:46:27 +08:00
Zide Chen
1d2aea1ebd hv: some coding refinement in hypercall.c
- since now we don't need to print error messages if copy_to/from_gpa()
  fails, then in many cases we can simplify the function return handling.

  In the following example, my fix could change the 'ret' value from
  the original '-1' to the actual errno returned from copy_to_gpa(). But
  this is valid. Ideally we may replace all '-1' with the actual errno.

  - if (copy_to_gpa() < 0) {
  -	pr_err("error messages");
  -	ret = -1;
  - } else {
  -	ret = 0;
  - }
  + ret = copy_to_gpa();

- in most cases, 'ret' is declared with a default value 0 or -1, then the
  redundant assignment statements can be removed.

- replace white spaces with tabs.

Tracked-On: #3854
Signed-off-by: Zide Chen <zide.chen@intel.com>
2020-03-30 13:19:01 +08:00
Zide Chen
eef3b51eda hv: move error message logging into gpa copy APIs
In this way, the code looks simpler and line of code is reduced.

Tracked-On: #3854
Signed-off-by: Zide Chen <zide.chen@intel.com>
2020-03-30 13:19:01 +08:00
Sainath Grandhi
fe5a108c7b hv: vioapic init for SOS VM on platforms with multiple IO-APICs
For SOS VM, when the target platform has multiple IO-APICs, there
should be equal number of virtual IO-APICs.

This patch adds support for emulating multiple vIOAPICs per VM.

Tracked-On: #4151
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
Acked-by: Eddie Dong <eddie.dong@Intel.com>
2020-03-25 09:36:18 +08:00
Sainath Grandhi
f67ac09141 hv: Handle holes in GSI i.e. Global System Interrupt for multiple IO-APICs
MADT is used to specify the GSI base for each IO-APIC and the number of
interrupt pins per IO-APIC is programmed into Max. Redir. Entry register of
that IO-APIC.

On platforms with multiple IO-APICs, there can be holes in the GSI space.
For example, on a platform with 2 IO-APICs, the following configuration has
a hole (from 24 to 31) in the GSI space.

IO-APIC 1: GSI base - 0, number of pins - 24
IO-APIC 2: GSI base - 32, number of pins - 8

This patch also adjusts the size for variables used to represent the total
number of IO-APICs on the system from uint16_t to uint8_t as the ACPI MADT
uses only 8-bits to indicate the unique IO-APIC IDs.

Tracked-On: #4151
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
Acked-by: Eddie Dong <eddie.dong@Intel.com>
2020-03-25 09:36:18 +08:00
Sainath Grandhi
dd6c80c305 hv: Move error checking for hypercall parameters out of assign module
Moving checks on validity of IOAPIC interrupt remapping hypercall parameters
to hypercall module

Tracked-On: #4151
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
Acked-by: Eddie Dong <eddie.dong@Intel.com>
2020-03-25 09:36:18 +08:00
Mingqiang Chi
14692ef60c hv:Rename two VM states
Rename:
  VM_STARTED --> VM_RUNNING
  VM_POWERING_OFF --> VM_READY_TO_POWEROFF

Tracked-On: #4320
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2020-03-13 10:34:29 +08:00
Yonghua Huang
64b874ce4c hv: rename BOOT_CPU_ID to BSP_CPU_ID
1. Rename BOOT_CPU_ID to BSP_CPU_ID
  2. Repace hardcoded value with BSP_CPU_ID when
  ID of BSP is referenced.

Tracked-On: #4420
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
2020-02-25 09:08:14 +08:00
Li Fei1
e8479f84cd hv: vPCI: remove passthrough PCI device unuse code
Now we split passthrough PCI device from DM to HV, we could remove all the passthrough
PCI device unused code.

Tracked-On: #4371
Signed-off-by: Li Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2020-02-24 16:17:38 +08:00
Li Fei1
fe3182ea05 hv: vPCI: add assign/deassign PCI device HC APIs
Add assign/deassign PCI device hypercall APIs to assign a PCI device from SOS to
post-launched VM or deassign a PCI device from post-launched VM to SOS. This patch
is prepared for spliting passthrough PCI device from DM to HV.
The old assign/deassign ptdev APIs will be discarded.

Tracked-On: #4371
Signed-off-by: Li Fei1 <fei1.li@intel.com>
2020-02-24 16:17:38 +08:00
Yonghua Huang
b90862921e hv: rename the ACRN_DBG_XXX
Refine this MACRO 'ACRN_DBG_XXX' to 'DBG_LEVEL_XXX'

Tracked-On: #4348
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
2020-01-14 10:21:23 +08:00
Shuo A Liu
db708fc3e8 hv: rename is_completion_polling to is_polling_ioreq
is_polling_ioreq is more straightforward. Rename it.

Tracked-On: #4329
Signed-off-by: Shuo A Liu <shuo.a.liu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2020-01-13 10:16:30 +08:00
Yonghua Huang
0e47f0a8f9 hv: fix potential NULL pointer reference in hc_assgin_ptdev
this patch validates input 'vdev->pdev' before
 reference to avoid potenial hypervisor crash.

[v2] update:
 Combine condition check for 'vdev' and 'vdev->pdev'

Tracked-On: #4334
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Reviewed-by: Fei Li <fei1.li@intel.com>
2020-01-08 11:54:49 +08:00
Yonghua Huang
ddebefb9b4 hv: remove depreciated code for hc_assign/deassign_ptdev
'param' is BDF value instead of GPA when VHM driver
  issues below 2 hypercalls:
   - HC_ASSIGN_PTEDEV
   - HC_DEASSIGN_PTDEV
 This patch is to remove related code in hc_assign/deassign()
 functions.

Tracked-On: #4334
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Reviewed-by: Fei Li <fei1.li@intel.com>
2020-01-08 11:54:49 +08:00
Shuo A Liu
e3c303363b hv: vcpu: wait and signal vcpu event support
Introduce two kinds of events for each vcpu,
  VCPU_EVENT_IOREQ: for vcpu waiting for IO request completion
  VCPU_EVENT_VIRTUAL_INTERRUPT: for vcpu waiting for virtual interrupts events
vcpu can wait for such events, and resume to run when the
event get signalled.

This patch also change IO request waiting/notifying to this way.

Tracked-On: #4329
Signed-off-by: Shuo A Liu <shuo.a.liu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2020-01-07 11:23:32 +08:00
Li Fei1
21b405d109 hv: vpci: an assign PT device should support FLR or PM reset
Before we assign a PT device to post-launched VM, we should reset the PCI device
first. However, ACRN hypervisor doesn't plan to support PCIe hot-plug and doesn't
support PCIe bridge Secondary Bus Reset. So the PT device must support FLR or PM
reset. This patch do this check when assigning a PT device to post-launched VM.

Tracked-On: #3465
Signed-off-by: Li Fei1 <fei1.li@intel.com>
2019-12-30 13:43:07 +08:00
Victor Sun
ab13228591 HV: ensure valid vcpu state transition
The vcpu state machine transition should follow below rule:

old vcpu state                              new vcpu state
==============                              ==============
VCPU_OFFLINE         --- create_vcpu -->    VCPU_INIT
VCPU_INIT            --- launch_vcpu -->    VCPU_RUNNING
VCPU_RUNNING         ---  pause_vcpu -->    VCPU_PAUSED
VCPU_PAUSED          --- resume_vcpu -->    VCPU_RUNNING
VCPU_RUNNING/PAUSED  ---  pause_vcpu -->    VCPU_ZOMBIE
VCPU_INIT            ---  pause_vcpu -->    VCPU_ZOMBIE
VCPU_ZOMBIE          ---  reset_vcpu -->    VCPU_INIT
VCPU_ZOMBIE          --- offline_vcpu-->    VCPU_OFFLINE

Tracked-On: #4267

Signed-off-by: Victor Sun <victor.sun@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-12-27 12:27:08 +08:00
Victor Sun
a5158e2c16 HV: refine reset_vcpu api
The patch abstract a vcpu_reset_internal() api for internal usage, the
function would not touch any vcpu state transition and just do vcpu reset
processing. It will be called by create_vcpu() and reset_vcpu().

The reset_vcpu() will act as a public api and should be called
only when vcpu receive INIT or vm reset/resume from S3. It should not be
called when do shutdown_vm() or hcall_sos_offline_cpu(), so the patch remove
reset_vcpu() in shutdown_vm() and hcall_sos_offline_cpu().

The patch also introduced reset_mode enum so that vcpu and vlapic could do
different context operation according to different reset mode;

Tracked-On: #4267

Signed-off-by: Victor Sun <victor.sun@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-12-27 12:27:08 +08:00
Yonghua Huang
d4677a8917 hv:fix crash issue when handling HC_NOTIFY_REQUEST_FINISH
Input 'vcpu_id' and the state of target vCPU should be validated
properly:

  - 'vcpu_id' shall be less than 'vm->hw.created_vcpus' instead
     of 'MAX_VCPUS_PER_VM'.
  - The state of target vCPU should be "VCPU_PAUSED", and reject
    all other states.

Tracked-On: #4245
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-12-16 09:44:12 +08:00
Yonghua Huang
05682b2bad hv:bugfix in write protect page hypercall
This patch fixes potential hypervisor crash when
 calling hcall_write_protect_page() with a crafted
 GPA in 'struct wp_data' instance, e.g. an invalid
 GPA that is not in the scope of the target VM's
 EPT address space.

 To check the validity for this GPA  before updating
 the 'write protect' page.

Tracked-On: #4240
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Reviewed-by: Fei Li <fei1.li@intel.com>
2019-12-13 10:42:31 +08:00
Victor Sun
a44c1c900c HV: Kconfig: remove MAX_VCPUS_PER_VM in Kconfig
In current architecutre, the maximum vCPUs number per VM could not
exceed the pCPUs number. Given the MAX_PCPU_NUM macro is provided
in board configurations, so remove the MAX_VCPUS_PER_VM from Kconfig
and add a macro of MAX_VCPUS_PER_VM to reference MAX_PCPU_NUM directly.

Tracked-On: #4230

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-12-12 13:49:28 +08:00
Yonghua Huang
0eb427f122 hv:refine 'uint64_t' string print format in comm moudle
Use "0x%lx" string to format 'uint64_t' type value,
  instead of "0x%llx".

Tracked-On: #4020
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
2019-11-09 11:42:38 +08:00
Li, Fei1
dc1e2adaec hv: vpci: add PCI BAR re-program address check
In theory, guest could re-program PCI BAR address to any address. However, ACRN
hypervisor only support [0, top_address_space) EPT memory mapping. So we need to
check whether the PCI BAR re-program address is within this scope.

Tracked-On: #3475
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-10-29 14:49:55 +08:00
Shuo A Liu
891e46453d hv: sched: move pcpu_id from acrn_vcpu to thread_object
With cpu sharing enabled, we will map acrn_vcpu to thread_object
in scheduling. From modulization perspective, we'd better hide the
pcpu_id in acrn_vcpu and move it to thread_object.

Tracked-On: #3813
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Signed-off-by: Yu Wang <yu1.wang@intel.com>
Signed-off-by: Shuo A Liu <shuo.a.liu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-10-23 12:47:08 +08:00
Yonghua Huang
b1e43b4454 hv: fix error debug message in hcall_set_callback_vector
this patch is to fix error debug message
 for invalid 'param' case, there is no string
 variable for '%s' output, which will potenially
 trigger hypervisor crash as it may access random
 memroy address and trigger SMAP violation.

Tracked-On: #3801
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
2019-10-14 09:07:30 +08:00
Shiqing Gao
658fff27b4 hv: pci: update "union pci_bdf"
- add one more filed in "union pci_bdf"
- remove following interfaces:
  * pci_bus
  * pci_slot
  * pci_func
  * pci_devfn

Tracked-On: #1842
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
2019-09-25 13:45:39 +08:00
Shuo A Liu
ca2540fe8c hv: return pre-defined vcpu_num from HV to upper layer
There is plan that define each VM configuration statically in HV and let
DM just do VM creating and destroying. So DM need get vcpu_num
information when VM creating.

This patch return the vcpu_num via the API param. And also initial the
VMs' cpu_num for existing scenarios.

Tracked-On: #3663
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Signed-off-by: Yu Wang <yu1.wang@intel.com>
Signed-off-by: Shuo A Liu <shuo.a.liu@intel.com>
Reviewed-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-09-24 11:58:45 +08:00
Shuo A Liu
f4ce9cc4a2 hv: make hypercall HC_CREATE_VCPU empty
Now, we create vcpus while VM being created in hypervisor. The
create vcpu hypercall will not be used any more. For compatbility,
keep the hypercall HC_CREATE_VCPU do nothing.

v4: Don't remove HC_CREATE_VCPU hypercall, let it do nothing.

Tracked-On: #3663
Signed-off-by: Shuo A Liu <shuo.a.liu@intel.com>
2019-09-24 11:58:45 +08:00
Mingqiang Chi
c36908dce2 hv:remove redundant memset in some cases
No need to memset since it will overwrite the memory
by copy_from_gpa in some cases.

Tracked-On: #861
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
2019-09-24 09:02:05 +08:00
Mingqiang Chi
2310d99ebf hv: cleanup vmcs.h
-- move 'RFLAGS_AC' to cpu.h
-- move 'VMX_SUPPORT_UNRESTRICTED_GUEST' to msr.h
   and rename it to 'MSR_IA32_MISC_UNRESTRICTED_GUEST'
-- move 'get_vcpu_mode' to vcpu.h
-- remove deadcode 'vmx_eoi_exit()'

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-08-22 14:13:15 +08:00
Li, Fei1
5471473f60 hv: vpci: create iommu domain in vpci_init for all guests
Create an iommu domain for all guest in vpci_init no matter if there's a PTDev
in it.

Tracked-On: #3475
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
Reviewed-by: Dongsheng Zhang <dongsheng.x.zhang@intel.com>
2019-08-06 11:51:02 +08:00
Victor Sun
5b1852e482 HV: add kata support on sdc scenario
In current design, devicemodel passes VM UUID to create VMs and hypervisor
would check the UUID whether it is matched with the one in VM configurations.

Kata container would maintain few UUIDs to let ACRN launch the VM, so
hypervisor need to add these UUIDs in VM configurations for Kata running.
In the hypercall of hcall_get_platform_info(), hypervisor will report the
maximum Kata container number it will support. The patch will add a Kconfig
to indicate the maximum Kata container number that SOS could support.

In current stage, only one Kata container is supported by SOS on SDC scenario
so add one UUID for Kata container in SDC VM configuration. If we want to
support Kata on other scenarios in the future, we could follow the example
of this patch;

Tracked-On: #3402

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-07-12 16:34:31 +08:00
Mingqiang Chi
e4d1c321ad hv:fix "no prototype for non-static function"
change some APIs to static or include header file

Tracked-On: #861
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
2019-07-09 10:36:03 +08:00
Kaige Fu
fd9eb2a55b HV: Fix OVMF hang issue when boot with lapic_pt
In hcall_inject_msi, we check vlapic state of SOS by mistake.
If the SOS's vlapic state doesn't equal to target_vm's, the OVMF will
hang when boot up. Instead, we should check the target_vm's
vlapic state.

Tracked-On: #3069
Acked-by: Eddie Dong <eddie.dong@intel.com>
Reviewed-by: Binbin Wu <binbin.wu@intel.com>
Signed-off-by: Kaige Fu <kaige.fu@intel.com>
2019-06-19 08:40:48 +08:00
Li, Fei1
9960ff98c5 hv: ept: unify EPT API name to verb-object style
Rename ept_mr_add to ept_add_mr
Rename ept_mr_modify to ept_modify_mr
Rename ept_mr_del to ept_del_mr

Tracked-On: #1842
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2019-06-14 14:40:25 +08:00
Sainath Grandhi
7d44cd5c28 hv: Introduce check_vm_vlapic_state API
This patch introduces check_vm_vlapic_state API instead of is_lapic_pt_enabled
to check if all the vCPUs of a VM are using x2APIC mode and LAPIC
pass-through is enabled on all of them.

When the VM is in VM_VLAPIC_TRANSITION or VM_VLAPIC_DISABLED state,
following conditions apply.
1) For pass-thru MSI interrupts, interrupt source is not programmed.
2) For DM emulated device MSI interrupts, interrupt is not delivered.
3) For IPIs, it will work only if the sender and destination are both in x2APIC mode.

Tracked-On: #3253
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-06-14 13:55:26 +08:00
Arindam Roy
2321fcdf78 HV:Modularize vpic code to remove usage of acrn_vm
V1:Initial Patch
Modularize vpic. The current patch reduces the usage
of acrn_vm inside the vpic.c file.
Due to the global natire of register_pio_handler, where
acrn_vm is being passed, some usage remains.
These needs to be a separate "interface" file.
That will come in smaller newer patch provided
this patch is accepted.

V2:
Incorporated comments from Jason.

V3:
Fixed some MISRA-C Violations.

Tracked-On: #1842
Signed-off-by: Arindam Roy <arindam.roy@intel.com>
Reviewed-by: Xu, Anthony <anthony.xu@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
2019-06-13 09:54:52 +08:00
Victor Sun
f83ddd393f HV: introduce relative vm id for hcall api
On SDC scenario, SOS VM id is fixed to 0 so some hypercalls from guest
are using hardcoded "0" to represent SOS VM, this would bring issues
for HYBRID scenario which SOS VM id is non-zero.

Now introducing a new VM id concept for DM/VHM hypercall APIs, that
return a relative VM id which is from SOS view when create VM for post-
launched VMs. DM/VHM could always treat their own vm id is "0". When they
make hypercalls, hypervisor will convert the VM id to the absolute id
when dispatch the hypercalls.

Tracked-On: #3214

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@Intel.com>
2019-06-12 11:00:40 +08:00
Victor Sun
3d3de6bd38 HV: specify dispatch hypercall for sos or trusty
Changes:

- In current design, the hypercall is only allowed calling from SOS or
trusty VM, so separate the trusty hypercalls from dispatch_hypercall().
The vm parameter which referenced by hcall_xxx() should be SOS VM;

- do not inject #UD for hypercalls from non-SOS, just return -ENODEV;

Tracked-On: #3214

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@Intel.com>
2019-06-12 11:00:40 +08:00
Sainath Grandhi
536c69b9ff hv: distinguish between LAPIC_PASSTHROUGH configured vs enabled
ACRN supports LAPIC emulation for guests using x86 APICv. When guest OS/BIOS
switches from xAPIC to x2APIC mode of operation, ACRN also supports switching
froom LAPIC emulation to LAPIC passthrough to guest. User/developer needs to
configure GUEST_FLAG_LAPIC_PASSTHROUGH for guest_flags in the corresponding
VM's config for ACRN to enable LAPIC passthrough.

This patch does the following

1)Fixes a bug in the abovementioned feature. For a guest that is
configured with GUEST_FLAG_LAPIC_PASSTHROUGH, during the time period guest is
using xAPIC mode of LAPIC,  virtual interrupts are not delivered. This can be
manifested as guest hang when it does not receive virtual timer interrupts.

2)ACRN exposes physical topology via CPUID leaf 0xb to LAPIC PT VMs. This patch
removes that condition and exposes virtual topology via CPUID leaf 0xb.

Tracked-On: #3136
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
2019-05-23 11:15:31 +08:00
Yin Fengwei
8626e5aa3a vm_state: Update vm state VM_STATE_INVALID to VM_POWERED_OFF
Replace the vm state VM_STATE_INVALID to VM_POWERED_OFF.
Also replace is_valid_vm() with is_poweroff_vm().
Add API is_created_vm() to identify VM created state.

Tracked-On: #3082
Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
2019-05-08 16:58:41 +08:00
Mingqiang Chi
da9ed0eda9 hv:remove some unnecessary includes
remove some unnecessary includes

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
2019-05-07 09:10:13 +08:00
Yonghua Huang
be2fe2a44d hv:remove accessing shared log buffer cases between stac/clac
Shared buffer is allocated by VM and is protected by SMAP.
Accessing to shared buffer between stac/clac pair will invalidate
SMAP protection.This patch is to remove these cases.
Fix minor stac/clac mis-usage,and add comments as stac/clac usage BKM

Tracked-On: #2526
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Reviewed-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-05-05 10:00:32 +08:00
Sainath Grandhi
53b2bd5811 hv: vpci_cleanup for VMs of type POST_LAUNCHED_VM
ACRN cleans up the IOMMU domain and other data structures that
represents the state of device assigment to POST_LAUNCHED_VM. This is
with the help of hypercalls from SOS DM. Under scenarios where DM
execution can get terminated abruptly or due to bugs in DM, hypercalls
responsible for cleaning up ACRN cannot happen. This leaves ACRN
device representation/resource assignment in an incorrect state.
This patch cleans up the IOMMU resource and other data structures
upon shutdown of POST_LAUNCHED_VM.

Tracked-On: #2700
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-04-29 17:04:02 +08:00
Sainath Grandhi
9214c84600 hv: Rename NORMAL_VM to POST_LAUNCHED_VM
The name NORMAL_VM does not clearly reflect the attribute that these VMs
are launched "later". POST_LAUNCHED_VM is closer to the fact
that these VMs are launched "later" by one of the VMs launched by ACRN.

Tracked-On: #3034
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-04-29 09:19:51 +08:00
Yin Fengwei
578592b566 vlapic: refine IPI broadcast to support x2APIC mode
According to SDM 10.6.1, if dest fields is 0xffU for register
ICR operation, that means the IPI is for broadcast.

According to SDM 10.12.9, 0xffffffffU of dest fields for x2APIC
means IPI is for broadcast.

We add new parameter to vlapic_calc_dest() to show whether the
dest is for broadcast. For IPI, we will set it according to
dest fields. For ioapic and MSI, we hardcode it to false because
no broadcast for ioapic and MSI.

Tracked-On: #3003
Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-04-25 09:12:16 +08:00