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7edf929a69
ACRN needs to trap the pm1a/pm1b written/read from VM0. So we could know when should we put the system to S3. We will have two path back to VM0: - S3 enter/exit sucess. Will reset VM0 and jump to VM0 wakeup vec with real mode - S3 enter/exit failed. Will return to the next instruction of pm1a/pm1b register writing. VM0 will read the pm1a/pm1b evt register to check whether it's waked up or not. Signed-off-by: Victor Sun <victor.sun@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com> |
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| .. | ||
| guest.c | ||
| instr_emul_wrapper.c | ||
| instr_emul_wrapper.h | ||
| instr_emul.c | ||
| instr_emul.h | ||
| pm.c | ||
| ucode.c | ||
| vcpu.c | ||
| vioapic.c | ||
| vlapic_priv.h | ||
| vlapic.c | ||
| vm.c | ||
| vmcall.c | ||
| vmsr.c | ||
| vpic.c | ||