This patch figures out the guest cache hierarchy:
- calculate the cache hierarchy parameters, including
cache thread sharing number and inclusiveness of LLC.
- define and initialize data structure to describe
L2 & L3 cache buffers, these buffers will be mapped
to user VM as ssram regions.
- add some utility functions.
- complete the implementation of function
'create_ssram_rtct_entries()', though most functions
inside are not implemented yet.
Tracked-On: #7010
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Acked-by: Yu1 Wang <yu1.wang@intel.com>
bc746b9118