Tao Yuhong 6f447ba626 HV: hide CONFIG_SERIAL_PIO_BASE IO port for SOS ...

Always trap for accessing IO port at CONFIG_SERIAL_PIO_BASE(0x3f8).

SOS will trap at IO 0x3f8 access because vuart[0]. When HW platform
has this serial IO port, and HV use it as debug shell, If vuart[0]
is not set, SOS & HV console input/output are mixed up.

So SOS should always trap at CONFIG_SERIAL_PIO_BASE

Tracked-On: #5498
Signed-off-by: Tao Yuhong <yuhong.tao@intel.com>

2020-11-11 14:04:45 +08:00

..

boot

hv: don't need to save boot context

2020-10-29 10:05:05 +08:00

configs

acrn-config: refactor pci_dev_c.py and insert vuart device information

2020-10-30 20:24:28 +08:00

guest

HV: hide CONFIG_SERIAL_PIO_BASE IO port for SOS

2020-11-11 14:04:45 +08:00

lib

HV: rewrite memcpy_s to be iso c11 compliant

2020-06-08 13:30:04 +08:00

seed

HV: rename append_seed_arg to fill_seed_arg

2020-06-08 13:30:04 +08:00

cpu_caps.c

hv:cpu-caps:refine is_apl_platform func and clean up duplicated code

2020-08-14 10:08:50 +08:00

cpu_state_tbl.c

HV: add board specific cpu state table to support Px Cx

2019-07-29 20:25:16 +08:00

cpu.c

hv: skip pSRAM for guest WBINVD emulation

2020-11-02 10:29:43 +08:00

e820.c

hv: Reserve space for VMs' EPT 4k pages after boot

2020-04-01 21:13:37 +08:00

gdt.c

hv:cleanup header files for arch folder

2019-02-22 13:14:36 +08:00

idt.S

HV: Install a NMI handler in acrn IDT

2019-12-13 10:13:09 +08:00

init.c

HV: split sanitize_multiboot_info api

2020-06-08 13:30:04 +08:00

ioapic.c

hv: mmu: rename hv_access_memory_region_update to ppt_clear_user_bit

2020-11-02 10:29:43 +08:00

irq.c

hv: remove de-privilege boot mode support and remove vboot wrappers

2020-10-21 15:09:26 +08:00

Kconfig

hv: psram: add kconfig to enable psram

2020-11-02 15:56:30 +08:00

lapic.c

hv:cpu-caps:refine processor family and model info

2020-08-14 10:08:50 +08:00

mmu.c

hv: mmu: rename hv_access_memory_region_update to ppt_clear_user_bit

2020-11-02 10:29:43 +08:00

notify.c

hv: maintain a per-pCPU array of vCPUs and handle posted interrupt IRQs

2020-04-15 13:47:22 +08:00

page.c

hv: mmu: rename hv_access_memory_region_update to ppt_clear_user_bit

2020-11-02 10:29:43 +08:00

pagetable.c

hv: mmu: release 1GB cpu side support constrain

2020-06-15 15:16:34 +08:00

platform_caps.c

hv: add function to check if using posted interrupt is possible for vm

2020-04-15 13:47:22 +08:00

pm.c

pm: S5: update the system shutdown logical in ACRN

2019-12-23 15:15:09 +08:00

ptcm.c

hv: pSRAM: temporarily remove NX bit of PTCM binary

2020-11-02 10:29:43 +08:00

rdt.c

acrn-config: code refactoring for CAT/MBA

2020-08-28 16:44:06 +08:00

sched.S

hv: sched: rename schedule related structs and vars

2019-10-16 10:25:53 +08:00

security.c

hv:cpu-caps:refine processor family and model info

2020-08-14 10:08:50 +08:00

sgx.c

hv: sgx: add basic support to init sgx resource for vm

2019-05-29 11:24:13 +08:00

timer.c

hv: list: rename list_entry to container_of

2020-03-31 10:57:47 +08:00

trampoline.c

hv: remove de-privilege boot mode support and remove vboot wrappers

2020-10-21 15:09:26 +08:00

vmx.c

hv:fix "no prototype for non-static function"

2019-07-09 10:36:03 +08:00

vtd.c

hv: mmu: rename hv_access_memory_region_update to ppt_clear_user_bit

2020-11-02 10:29:43 +08:00

wakeup.S

hv: pm: correct the function name

2019-09-11 17:30:24 +08:00