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Use CSR initialization for clearing ITCM.

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Clears the ITCM in one go before loading an ELF file using the
hardware initialization CSRs.
DTCM is not cleared as it's temporarily larger than the CSRs can fit.

Tested manually.

Change-Id: Ie4620508404cebc8724771eb579c873fcc0cf0ee
GitOrigin-RevId: ef5de7003c22a1871ab0f74a23fce34593b73fe1
This commit is contained in:
Adam Jesionowski
2021-12-10 10:23:23 -08:00
committed by Sam Leffler
parent af833e8d19
commit 4ed5fc91fd
3 changed files with 26 additions and 8 deletions
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8
apps/system/components/MlCoordinator/kata-ml-coordinator/src/run.rs
View File

@@ -5,9 +5,9 @@ extern crate kata_panic;
use core::slice;
use kata_logger::KataLogger;
use kata_vec_core::MlCore;
use kata_ml_interface::MlCoordinatorInterface;
use kata_ml_interface::MlCoreInterface;
use kata_vec_core::MlCore;
use log::{error, info, trace};
pub struct MLCoordinator {
@@ -65,7 +65,9 @@ impl MLCoordinator {
impl MlCoordinatorInterface for MLCoordinator {
fn execute(&mut self) {
if self.is_running { return; }
if self.is_running {
return;
}
if !self.is_loaded {
let res = self
@@ -81,7 +83,7 @@ impl MlCoordinatorInterface for MLCoordinator {
if self.is_loaded {
self.is_running = true;
self.ml_core.run(); // Unhalt, start at default PC.
self.ml_core.run(); // Unhalt, start at default PC.
}
}

1
apps/system/components/MlCoordinator/kata-ml-interface/src/lib.rs
View File

@@ -7,7 +7,6 @@ pub trait MlCoordinatorInterface {
pub trait MlCoreInterface {
fn enable_interrupts(&mut self, enabled: bool);
fn clear_tcm(&mut self, start: *const u32, len: usize);
fn run(&mut self);
fn load_elf(&mut self, elf_slice: &[u8]) -> Result<(), &'static str>;
fn get_return_code() -> u32;

25
apps/system/components/MlCoordinator/kata-vec-core/src/lib.rs
View File

@@ -31,6 +31,24 @@ fn get_dtcm_slice() -> &'static mut [u32] {
pub struct MlCore {}
fn clear_section(start: u32, end: u32, is_itcm: bool) {
let init_start = vc_top::InitStart::new()
.with_address(start)
.with_imem_dmem_sel(is_itcm);
vc_top::set_init_start(init_start);
let init_end = vc_top::InitEnd::new().with_address(end).with_valid(true);
vc_top::set_init_end(init_end);
while !vc_top::get_init_status().init_done() {}
}
fn clear_tcm() {
clear_section(0, ITCM_SIZE as u32, true);
// TODO(jesionowski): Enable when DTCM_SIZE fits into INIT_END.
// clear_section(0, DTCM_SIZE as u32, false);
}
impl MlCoreInterface for MlCore {
fn enable_interrupts(&mut self, enable: bool) {
let intr_enable = vc_top::IntrEnable::new()
@@ -41,9 +59,6 @@ impl MlCoreInterface for MlCore {
vc_top::set_intr_enable(intr_enable);
}
// TODO(jesionowski): Implement using hardware clear CSRs.
fn clear_tcm(&mut self, _start: *const u32, _len: usize) {}
fn run(&mut self) {
let ctrl = vc_top::Ctrl::new()
.with_freeze(false)
@@ -58,6 +73,8 @@ impl MlCoreInterface for MlCore {
let elf = ElfFile::new(elf_slice)?;
clear_tcm();
for seg in elf.program_iter() {
if seg.get_type()? == Type::Load {
let fsize = seg.file_size() as usize;
@@ -83,7 +100,7 @@ impl MlCoreInterface for MlCore {
if let SegmentData::Undefined(bytes) = seg.get_data(&elf)? {
dtcm_slice[..fsize].copy_from_slice(&bytes);
}
// TODO(jesionowski): Use clear_tcm instead.
// TODO(jesionowski): Remove when clear_tcm is fully implemented.
// Clear NOBITS sections.
dtcm_slice[fsize..msize].fill(0x00);
} else {