update vm configurations for hybrid_rt scenario on WHL/EHL/TGL/CFL
boards, add 1 YaaG and assign 1 more pcpu for WaaG.
Tracked-On: #5390
Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
assign 2 CPUs for WaaG and add 1 YaaG on hybrid_rt scenario for
WHL/EHL/TGL/CFL boards.
Tracked-On: #5390
Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
P2SB_BAR_ADDR related macros should only be defined in misc_cfg.h only when
p2sb is enabled in scenario xml.
Tracked-On: #5340
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Add configurations code of industry scenario and hybrid_rt scenario for
cfl-k700-i7 board to support build acrn binary from source code directly.
Tracked-On: #5212
Signed-off-by: Victor Sun <victor.sun@intel.com>
Add cfl-k700-i7 hybrid_rt xml to support ACRN hybrid_rt scenario on
cfl-k700-i7 board.
Tracked-On: #5212
Signed-off-by: Victor Sun <victor.sun@intel.com>
There is no default xml for hybrid_rt to to generate the
script of posted launch WaaG.
Tracked-On: #5336
Signed-off-by: Shixiong Zhang <shixiongx.zhang@intel.com>
Fail to launch waag by the script generated by launch config on
hybrid_rt scenario, the get_scenario_uuid function should use the
vmid instad of the uosid to get the correct uuid.
Tracked-On: #5336
Signed-off-by: Shixiong Zhang <shixiongx.zhang@intel.com>
Did a partial run of ACRN documents through Acrolinx to catch additional
spelling and grammar fixes missed during regular reviews.
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
update config xmls to make ivshmem size in decimal MB at description
and values.
Tracked-On: #4853
Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
make ivshmem size configured in decimal and MB in config tool
UI and XMLs to simplify input from users.
Tracked-On: #4853
Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
add the TSN device in tgl-rvp board XML and configure it to
passthrough to pre-launched VM for hybrid_rt scenario on tgl-rvp.
Tracked-On: #5266
Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Reviewed-by: Victor Sun <victor.sun@intel.com>
move MACRO of IVSHMEM region name to ivshmem_cfg.h and bug fix that
avoids multiple declarations of mem_regions in ivshmem_cfg.h
Tracked-On: #4853
Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
The MACRO of IVSHMEM shared region name is relevant to scenario, move
the MACRO from pci_devices.h which should be consistent for different
scenarios to ivshmem_cfg.h which is the configuration for IVSHMEM and
could vary in sceanrios.
Tracked-On: #4853
Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
This is a bug fix that avoids multiple declarations of mem_regions
Tracked-On: #4853
Signed-off-by: Yuan Liu <yuan1.liu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
When generate the launch scripts, the pm_by_vuart setting of pm_notify_channel
in launch setting should be according to the config of SOS vuart1.
Tracked-On: #5154
Signed-off-by: Shixiong Zhang <shixiongx.zhang@intel.com>
Move the function which are used to get available ttysn
from board catalogue to library catalogue
Tracked-On: #5154
Signed-off-by: Shixiong Zhang <shixiongx.zhang@intel.com>
Comments will be added for the HV_SUPPORTED_MAX_CLOS/MAX_MBA_CLOS_NUM_ENTRIES/MAX_CACHE_CLOS_NUM_ENTRIES
macros in generated code
Tracked-On: #5229
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Move struct pt_intx_config vm0_pt_intx[] defintion to pt_intx.c
so that vm_configurations.h/vm_configurations.c are consistent for different boards
Tracked-On: #5229
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
so that vm_configurations.h/vm_configurations.c are consistent for different boards
The boilerplate code is protected by #ifdef P2SB_BAR_ADDR/#endif, so it will
not hurt if we always produce related code.
Define new macros P2SB_BAR_ADDR_GPA and P2SB_BAR_SIZE to make the code more flexible.
Tracked-On: #5229
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
so that vm_configurations.h/vm_configurations.c are consistent for different boards
The boilerplate code is protected by #ifdef VM0_PASSTHROUGH_TPM/#endif, so it will
not hurt if we always produce related code.
Define a new macro VM0_TPM_BUFFER_BASE_ADDR_GPA to define the allocated gpa for VM0_TPM_BUFFER_BASE_ADDR
to make the code more flexible.
Tracked-On: #5229
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
so that vm_configurations.h/vm_configurations.c are consistent for different boards
The boilerplate code is protected by #ifdef CONFIG_RDT_ENABLED/#endif, so it will
not hurt if we always produce the .clos code.
Tracked-On: #5229
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
so that vm_configurations.h/vm_configurations.c are consistent for different boards
Debugged and refactored the split_cmdline() function
Tracked-On: #5229
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
so that vm_configurations.h/vm_configurations.c are consistent for different boards
Tracked-On: #5229
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
so that vm_configurations.h/vm_configurations.c are consistent for different boards
Tracked-On: #5229
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
For python versions prior to 3.7, dict order is not guaranteed.
Use ordered dict to ensure consistent ordering for the same input,
otherwise, the generated config files may change every time the config tool runs
Fix some error messages in code/comment
Tracked-On: #5229
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
increase the length of DSDT table to avoid memory overwrited by
subsequent ACPI tables.
Tracked-On: #5266
Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
add TSN device OTN1 config into offline ACPI table for TSN device
passthrough to pre-launched RTVM.
v2) update TSN device list from bdf list to vid:pid list.
Tracked-On: #5266
Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
Use vm_type to configure the load_type/uuid/severity,
Delete uuid lines in config scenario.
Tracked-On: #4641
Signed-off-by: Shixiong Zhang <shixiongx.zhang@intel.com>
Reviewed-by: Victor Sun <victor.sun@intel.com>
add extern acrn_vm_pci_dev_config variables in vm_configuration.c
when ivshmem configured on scenarios with ivshmem configured.
Tracked-On: #5298
Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
Fix the folder name where the 'acrn-manager' source code is located.
Replace instances of 'UOS' by 'User VM'
Other minor text updates to improve readability
Signed-off-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
generate ASL code of ACPI tables for pre-launched VMs on nuc7i7dnb,
whl-ipc-i5, whl-ipc-i7, ehl-crb-b boards
Tracked-On: #5266
Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Reviewed-by: Victor Sun <victor.sun@intel.com>
enable TPM2 config on ehl-crb-b board and update TPM2 configs on
legacy boards.
Tracked-On: #5266
Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Reviewed-by: Victor Sun <victor.sun@intel.com>
For EHL hybrid_rt scenario, the requirement needs a network device
passthough to pre-launched VM0.
Tracked-On: #5286
Signed-off-by: Tao Yuhong <yuhong.tao@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
add 2 MACROs: DEFAULT_PCI_MMCFG_START_BUS and DEFAULT_PCI_MMCFG_END_BUS
in platform_acpi_info.h.
Tracked-On: #5233
Signed-off-by: Shixiong Zhang <shixiongx.zhang@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
add 2 MACROs: DEFAULT_PCI_MMCFG_START_BUS and DEFAULT_PCI_MMCFG_END_BUS
in platform_acpi_info.h.
Tracked-On: #5233
Signed-off-by: Shixiong Zhang <shixiongx.zhang@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
use offline tool to generate one binary of ACPI tables for pre-launched
VMs, then load the ACPI binary into guest physical memory as grub module.
Users can configure the resources or devices like TPM2 for the
pre-launched VM from sceanrio XMLs or UI, and the offline tool will
generate ASL code of the ACPI tables with the configured resources or
devices, then compile the ASL code to one binary when building ACRN.
Tracked-On: #5266
Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
EHL PSE TSN GbE driver is default set to use 32bit of dma addressing.
net: stmmac: configure PSE Gbe to 32bit dma addressing
https://github.com/intel/linux-intel-lts/commit/011c8f
When VM has more than 4GB physical memory, Linux kernel uses the bounce
buffers (swiotlb) to translate kernel data in 64bit memory to 32bit
range for the sake of the DMA because iommu is not available. The
default swiotlb value 32768 is insufficient to support two PSE TSN GbEs
at the same time. Increase the value to 131072 otherwise two GbEs can't
link up.
Tracked-On: #5243
Signed-off-by: Toshiki Nishioka <toshiki.nishioka@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
When creating a new launch setting, config app can't fine the
scenario config which caused the app failed to load the new
launch setting.
Tracked-On: #5282
Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Reviewed-by: Victor Sun <victor.sun@intel.com>
Build and install 'acrnctl' for regardless of the RELEASE value. Kata Containers
depends on 'acrnctl' in order to work correctly and we therefore need to make
sure that it is built and installed correctly regardless of whether this is a
debug or a release build.
Tracked-On: #4940
Signed-off-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
Add a new scenario xml file for EHL which is derived from hybrid_rt for
validation of certain passthru devices in prelaunched RTVM. Because the
configuration requires to disable GPIO support for SOS VM, it should
not be merged into the standard hybrid_rt scenario. According to this
change, remove the SCI passthru setting from existing hybrid_rt since
from now on hybrid_rt_fusa should be used for SCI passthru test.
Tracked-On: #5278
Signed-off-by: Toshiki Nishioka <toshiki.nishioka@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
minor_ver should be le 2 when major_ver == 2.
Tracked-On: #5276
Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
update the size of ivshmem memory region to [2MB, 512MB].
Tracked-On: #4853
Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Reviewed-by: Yuan Liu <yuan1.liu@intel.com>
Always use P2SB_ as a prefix for all macro definitions related to P2SB
MMIO passthru. And introduce the new P2SB_VGPIO_DM_ENABLED macro to
indicate the presence of the pre-launched VM which requires the feature.
This macro intends to be used to enclose source files with ifdef where
macros defined by config-tool being used which are available only when
the feature is enabled. It is required to avoid causing compilation
errors when users build HV without enabling the feature.
Tracked-On: #5246
Signed-off-by: Toshiki Nishioka <toshiki.nishioka@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
Two PSE-GPIO controllers of EHL CRB require MSI-X emulation for
pass-thru because it uses multiple MSI vectors. Currently acrn-config
enables MSI-X emulation for only TSN devices. Enable MSI-X emulation
for PSE-GPIOs, too.
Tracked-On: #5242
Signed-off-by: Toshiki Nishioka <toshiki.nishioka@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
After below commit in https://github.com/zephyrproject-rtos/zephyr
commit d0126a037d23484feebba00d2c0eac27e6393fef
Author: Zide Chen <zide.chen@intel.com>
Date: Wed Feb 5 08:32:00 2020 -0800
boards/x86/acrn: build it in x86_64 mode and switch to X2APIC
The zephyr image for acrn would be built in x86_64 mode by default, then the
load/entry address for pre-launched Zephyr image should be changed from
0x100000 to 0x8000 accordingly per below definition in zephyr .ld file:
zephyrproject_src/zephyr/include/arch/x86/intel64/linker.ld
SECTIONS
{
/*
* The "locore" must be in the 64K of RAM, so that 16-bit code (with
* segment registers == 0x0000) and 32/64-bit code agree on addresses.
* ... there is no 16-bit code yet, but there will be when we add SMP.
*/
.locore 0x8000 : ALIGN(16)
{
_locore_start = .;
The commit in zephyrproject is merged before zephyr v2.2 release, so from v2.2
on, HV need this fix to boot Zephyr as pre-launched VM.
Tracked-On: #5259
Signed-off-by: Victor Sun <victor.sun@intel.com>
ACRN 2.1 supports two virtual boot modes, deprivilege boot mode and
direct boot mode. The deprivilege boot mode’s main purpose is to support
booting Clear Linux Service VM with UEFI service support, but this
brings scalability problems when porting ACRN to new Intel platforms.
For the 2.2 release, deprivilege mode is removed, and only direct boot
is supported, and with this we've removed support for Clear Linux as the
service VM, which impacts over 50 ACRN documents. This PR removes
documents we don't intend to update, and fixes broken links that would
occur from references to these deleted docs.
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
Convert SERIAL_PCI_BDF string value to hex value.
Tracked-On: #4937
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Tested-by: Shuo A Liu <shuo.a.liu@intel.com>
Users can add one or more ivshmem shm regions for uos when the shm
regions are configured from scenario setting.
Tracked-On: #4853
Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
add shm_region config in default launch XMLs to configure Inter-
VM communication for post-launched VMs.
Tracked-On: #4853
Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
This patch is to expose GPIO chassis interrupts as INTx to safety VM for
EHL. User can configure this per-VM attribute in scenario xml using the
following format:
<pt_intx desc="pt intx mapping.">
(phys_gsi0, virt_gsi0), (phys_gsi1, virt_gsi1), (phys_gsiN, virt_gsiN)
</pt_intx>
The physical and virtual interrupt gsi in each pair are separated by a
comma and enclosed in parentheses. If an integer begins with 0x or 0X,
it is hexadecimal, otherwise, it is assumed to be decimal. Example:
<pt_intx desc="pt intx mapping.">
(1, 0), (0x3, 1), (0x4, 2), (5, 6), (89, 0x12)
</pt_intx>
Tracked-On: #5241
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
This patch is to support direct assignment of P2SB bridge to one pre-launched
VM for EHL. User can configure this per-VM attribute in scenario xml:
<mmio_resources desc="MMIO resources.">
<p2sb>y</p2sb>
</mmio_resources>
Set p2sb to y to passthru P2SB bridge to VM, and n otherwise.
Tracked-On: #5221
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Add missing IVSHMEM tag in mrb board xml file to fix build issue
Correct misspelled function name
Use better error messages
Tracked-On: #5221
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Because ivshmem memory uses hv memory, if the ivshmem feature is
enabled, HV_RAM_SIZE will include IVSHMEM_SHM_SIZE.
Tracked-On: #4853
Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
add hybrid_rt scenario for the ElkhartLake CRB board so that user can
launch Yocto Linux as pre-launched VM.
Tracked-On: #5238
Signed-off-by: "Nishioka, Toshiki" <toshiki.nishioka@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
1.Modify clos_mask and mba_delay as a member of the union type.
2.Move HV_SUPPORTED_MAX_CLOS ,MAX_CACHE_CLOS_NUM_ENTRIES and
MAX_MBA_CLOS_NUM_ENTRIES to misc_cfg.h file.
Tracked-On: #5229
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
1.Add macro MAX_CACHE_CLOS_NUM_ENTRIES for CAT, and MAX_MBA_CLOS_NUM_ENTRIES for MBA.
MAX_MBA_CLOS_NUM_ENTRIES:
Max number of Cache Mask entries corresponding to each CLOS.
This can vary if CDP is enabled vs disabled, as each CLOS entry will have corresponding
cache mask values for Data and Code when CDP is enabled.
MAX_CACHE_CLOS_NUM_ENTRIES:
Max number of MBA delay entries corresponding to each CLOS.
2.Move VMx_VCPU_CLOS macro to misc_cfg.h head file.
Tracked-On: #5229
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
HV_SUPPORTED_MAX_CLOS:
This value represents the maximum CLOS that is allowed by ACRN hypervisor.
This value is set to be least common Max CLOS (CPUID.(EAX=0x10,ECX=ResID):EDX[15:0])
among all supported RDT resources in the platform. In other words, it is
min(maximum CLOS of L2, L3 and MBA). This is done in order to have consistent
CLOS allocations between all the RDT resources.
Tracked-On: #5229
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
add IVSHMEM config in hybrid_rt scenario on tgl-rvp board.
Tracked-On: #4853
Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
We use sos kernel cmdline maxcpus to limit the pCPU number of SOS
for hybrid or hybrid_rt scenarios by vcpu numbers calculation.
v2: add SOS CPU affinity calculation by total pCPU plus pCPUs
occupied by pre-launched VMs when no pcpuid configured
in SOS.
Tracked-On: #5216
Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Reviewed-by: Victor Sun <victor.sun@intel.com>
Add cfl-k700-i7 board xml and its industry xml to support ACRN industry
scenario on cfl-k700-i7 board.
Tracked-On: #5212
Signed-off-by: Victor Sun <victor.sun@intel.com>
CPU sharing between pre-launch VMs and SOS, post-launch VMs were
forbidden.
Remove the limitation.
Tracked-On: #5153
Signed-off-by: Shuo A Liu <shuo.a.liu@intel.com>
Acked-by: Terry Zou <terry.zou@intel.com>
This patch is to support the Inter-VM communication by IVSHMEM
in config tool.
Users can configure IVSHMEM_ENABLE to enable or disable Inter-VM
communication by IVSHMEM; users can configure the name, size,
communication VM IDs of the IVSHMEM devices in the VM settings of
scenario xmls, then config tool will generate the related IVSHMEM
configurations for Inter-VM communication.
The config tool will do sanity check including when saving the xmls:
the format of shared memory region configuration is
[name],[size],[VM ID]:[VM ID](:[VM ID]...);
the max size of the name is 32 bytes;
the names should not be duplicated;
the mininum value of shared memory region size is 2M;
the value of shared memory region is a power of 2;
the size of share memory region should not extended the size of
available ram.
Tracked-On: #4853
Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
Shared memory regoins can be added or deleted or updated from
scenario settings in config app with sanity check.
v2: move IVSHMEM config to hv->FEATURES->IVSHMEM
Tracked-On: #4853
Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
add IVSHMEM_ENABLED and IVSHMEM_REGION in scenario xmls to support
Inter-VM communications configuration for VMs.
v2: move IVSHMEM config into <FEATURES> section
Tracked-On: #4853
Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
Enable TPM passthrough configuration for pre-launched VM feature, on
TGL, by adding 'tgl-rvp' to TPM_PASSTHRU_BOARD.
Tracked-On: #5205
Signed-off-by: Tao Yuhong <yuhong.tao@intel.com>
Get the max number with integer list to instead string 'number'.
Tracked-On: #5199
Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
The default memory is 16G on TGL; the value of PLATFORM_RAM_SIZE and
SOS_RAM_SIZE is a little small in default xml.
Tracked-On: #5184
Reviewed-by: Victor Sun <victor.sun@intel.com>
Signed-off-by: fuzhongl <fuzhong.liu@intel.com>
add an IVSHMEM regoin and the related configuration parameters in
hybrid_rt scenario on whl-ipc-i5. The size of the shared memory is
2M, and it is used for the communication between VM0 and VM2.
v6: rename shm name; remove unnecessary MACROs.
v7: rename MACRO for shm name; add unassigned vbdf for post-launched
VMs.
Tracked-On: #4853
Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
Fix build issue while CDP_ENABLED=y for EHL-CRB-B.
Tracked-On: #5092
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
The default memory is 16G on TGL; the value of HV and sos
ramsize is a little small in default xml.
Tracked-On: # 5184
Signed-off-by: fuzhongl <fuzhong.liu@intel.com>
Add a comment for SOS_VM to indicate its VM ID for better understanding;
Tracked-On: #5077
Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
when CONFIG_MAX_MSIX_TABLE_NUM was set to 64, it will trigger timeout ASSERT
on WHL-I5 board.
Tracked-On: #5178
Signed-off-by: lirui34 <ruix.li@intel.com>
This patch will move the VM configuration check to pre-build stage,
a test program will do the check for pre-defined VM configuration
data before making hypervisor binary. If test failed, the make
process will be aborted. So once the hypervisor binary is built
successfully or start to run, it means the VM configuration has
been sanitized.
The patch did not add any new VM configuration check function,
it just port the original sanitize_vm_config() function from cpu.c
to static_checks.c with below change:
1. remove runtime rdt detection for clos check;
2. replace pr_err() from logmsg.h with printf() from stdio.h;
3. replace runtime call get_pcpu_nums() in ALL_CPUS_MASK macro
with static defined MAX_PCPU_NUM;
4. remove cpu_affinity check since pre-launched VM might share
pcpu with SOS VM;
The BOARD/SCENARIO parameter check and configuration folder check is
also moved to prebuild Makefile.
Tracked-On: #5077
Signed-off-by: Victor Sun <victor.sun@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
Add cpu_affinity setup for SOS VM. Cpu affinity must be set in
scenario XML, except if no pre-launched VM on the scenario and
all pCPUs will be assigned to SOS VM in that case;
Tracked-On: #5077
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Previously the CPU affinity of SOS VM is initialized at runtime during
sanitize_vm_config() stage, follow the policy that all physical CPUs
except ocuppied by Pre-launched VMs are all belong to SOS_VM. Now change
the process that SOS CPU affinity should be initialized at build time
and has the assumption that its validity is guarenteed before runtime.
Tracked-On: #5077
Signed-off-by: Victor Sun <victor.sun@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
Set guest flag value for logical partition.
Tracked-On: #5119
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
Remove RT guest flags from logical partition
configuration.
Tracked-On: #5119
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
The folders for config xmls and scenario setting source code are moved
to misc/vm_configs/xmls and misc/vm_configs/board, misc/vm_configs/scenario,
so this patch is to update config path for these folders.
Tracked-On: #5077
Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Add xmls/samples folders under misc/vm_configs, and make soft link for
them.
Tracked-On: #5077
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
Add hybrid_rt source code for whl-ipc-i5/i7.
Tracked-On: #5081
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
1.Refine cpu affinity in hybrid rt xmls for whl-ipc-i5/7
2.Refine guest flag for hybrid rt xmls for whl-ipc-i5/7
Tracked-On: #5081
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
Add support to generate passthru TPM information for whl-ipc-i5/i7.
Tracked-On: #5077
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
There is some macro defined in misc_cfg.h while CAT/MBA enabled.
include the missing header to solve build issue.
Tracked-On: #5092
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
