Commit Graph

1478 Commits

Author SHA1 Message Date
Victor Sun
1f93f7f46c HV: remove some redundant includes
vm_config.h has included types.h/acrn_common.h/vm_configurations.h,
acrn_common.h has included types.h, so remove the redundant includes;

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
2019-05-08 16:57:46 +08:00
Victor Sun
ad3658ee17 HV: remove CONFIG_CONSTANT_ACPI from Kconfig
The MACRO of CONFIG_CONSTANT_ACPI will be defined per scenario usage,
so move it from Kconfig to vm_configurations.h;

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-05-07 11:39:51 +08:00
Victor Sun
e2d723d4fa HV: enable acpi pm1a register info fixup
Previously ACPI PM1A register info was hardcoded to 0 in HV for generic boards,
but SOS still can know the real PM1A info so the system would hang if user
trigger S3 in SOS. Enabling PM1A register info fixup will let HV be able to
intercept the operation on PM1A and then make basic function of S3 work for
all boards;

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-05-07 11:39:51 +08:00
Mingqiang Chi
da9ed0eda9 hv:remove some unnecessary includes
remove some unnecessary includes

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
2019-05-07 09:10:13 +08:00
Zide Chen
5f87e716b8 hv: release IOMMU irte when releasing ptirq remapping entries
IRTE is freed if ptirq entry is released from remove_msix_remapping() or
remove_intx_remapping(). But if it's called from ptdev_release_all_entries(),
e.g. SOS shutdown/reboot, IRTE is not freed.

This patch adds a release_cb() callback function to do any architectural
specific cleanup. In x86, it's used to release IRTE.

On VM shutdown, vpci_cleanup() needs to remove MSI/MSI-X remapping on
ptirq entries, thus it should be called before ptdev_release_all_entries().

Tracked-On: #2700
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-05-06 18:25:37 +08:00
Conghui Chen
dd86a78e75 HV: rename 'type' in struct io_request
Rename 'type' in struct io_request to 'io_type' to be more readable.

Tracked-On: #3061
Signed-off-by: Conghui Chen <conghui.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-05-06 18:25:20 +08:00
Shiqing Gao
94e1e362fb hv: rename 'interrupt_init' to 'init_interrupt'
This patch renames 'interrupt_init' to 'init_interrupt'.

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-05-06 16:58:27 +08:00
Yan, Like
31efa2b522 hv: add one more guest VM to the industry scenario
This commmit added one more guest VM to the industry scenario, to
be aligned with the HLD for the industry usage.
With this commit, 4 VMs could be launched at maximum: 1 SOS VM and 3 post-launced VM.

Tracked-On: #3039
Signed-off-by: Yan, Like <like.yan@intel.com>
2019-05-05 16:38:57 +08:00
Conghui Chen
e6670b32f4 HV: rename structure acrn_vm_type
Rename structure acrn_vm_type to acrn_vm_load_order as it is used to
indicate the load order instead of the VM type.

Tracked-On: #2291
Signed-off-by: Conghui Chen <conghui.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-05-05 11:50:36 +08:00
Yonghua Huang
be2fe2a44d hv:remove accessing shared log buffer cases between stac/clac
Shared buffer is allocated by VM and is protected by SMAP.
Accessing to shared buffer between stac/clac pair will invalidate
SMAP protection.This patch is to remove these cases.
Fix minor stac/clac mis-usage,and add comments as stac/clac usage BKM

Tracked-On: #2526
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Reviewed-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-05-05 10:00:32 +08:00
Yan, Like
624185c3ca hv: add scenario for the industry use case
This scenario is typical for industry usage with 3 VMs: 1 pre-launched SOS VM,
1 post-launched user VM for HMI and 1 post-launched  RT VM for real-time control.

Tracked-On: #3039
Signed-off-by: Yan, Like <like.yan@intel.com>
2019-04-29 17:03:19 +08:00
Victor Sun
00ebe8630f HV: remove dummy DRHD in template platform acpi info
The DRHD MACROs are needed only when CONFIG_DMAR_PARSE_ENABLED set to n,
whereas the template platform_acpi_info.h is prepared for generic boards
that usually CONFIG_DMAR_PARSE_ENABLED is set to y, so remove these dummy
DRHD info MACROs.

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-04-29 15:25:25 +08:00
Victor Sun
6378b74db4 HV: add generic board config
hypervisor/arch/x86/configs/($CONFIG_BOARD) will store Board specific configs,
add a generic folder to store configs for generic boards that they can share
one build binary with minimal and common features in some scenarios like SDC.

Please be aware that BDF of pci devices are different on each board, so one
binary for LOGICAL_PARTITION scenario is not supported.

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-04-29 15:25:25 +08:00
Sainath Grandhi
9214c84600 hv: Rename NORMAL_VM to POST_LAUNCHED_VM
The name NORMAL_VM does not clearly reflect the attribute that these VMs
are launched "later". POST_LAUNCHED_VM is closer to the fact
that these VMs are launched "later" by one of the VMs launched by ACRN.

Tracked-On: #3034
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-04-29 09:19:51 +08:00
Li, Fei1
536bc5bd12 hv: instr_emul: fix operand size decode
1) For some instructions (like movsx, movzx which we support), there're two operands
and the source operand size is not equal to the dest operand size. In this case,
if we update the memory operand size according to the bit 0(w bit) of opcode,
we will lost the register operand size. This patch tries to fix this by calculating
memory operand size when we want to use it.
2) Calculate memory operand size form operand size and the bit 0(w bit) of opcode
when we want to operate on memory operand.

Tracked-On: #1337
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Reviewed-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-04-28 11:53:24 +08:00
Victor Sun
4bbf946fdd HV: minor changes on pci devices config
- The pci device config is related to VM configurations, so move the device
mapping MACROs from pci_devices.h to vm_configurations.h. Also considering
pci_devices.h should be generated by offline parse tool, this code change
would decouple the relationship between VM configuration tool and target
paser tool;

- Another minor change is add post-fix in number for each PCI device subclass
name to make target parse tool interface friendly;

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-04-28 11:53:06 +08:00
Conghui Chen
a3922797af HV: cleanup SHARING_MODE and PARTITION_MODE
As SHARING_MODE and PARTITION_MODE are not used anymore, cleanup the
code.

Tracked-On: #2291
Signed-off-by: Conghui Chen <conghui.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-04-26 17:06:39 +08:00
Victor Sun
3bb4308361 HV: check vm id param when dispatching hypercall
If the vmcall param passed from guest is representing a vmid, we should
make sure it is a valid one because it is a pre-condition of following
get_vm_from_vmid(). And then we don't need to do NULL VM pointer check
in is_valid_vm() because get_vm_from_vmid() would never return NULL.

Tracked-On: #2978

Signed-off-by: Victor Sun <victor.sun@intel.com>
Reviewed-by: Yonghua Huang <yonghua.huang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-04-26 16:21:14 +08:00
Zide Chen
1b7d33a426 hv: separate host e820 and SOS ve820
There are 2 reasons why SOS ve820 has to be separated from host e820:
- in hybrid mode, SOS may not own all the host memory.
- when SOS is being re-launched, it needs an untainted version of host
  e820 to create SOS ve820.

This patch creates sos_e820 table for SOS and keeps host e820 intact
during SOS creation.

Tracked-On: #2700
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-04-26 16:20:50 +08:00
Conghui Chen
235d886103 HV: vuart: enable vuart console for VM
In previous code, only for pre-launched VM, hypervisor would create
vuart console for each VM. But for post-launched VM, no vuart is
created.
In this patch, create vuart according to configuration in structure
acrn_vm_config. As the new configuration is set for pre-launched VM and
post-launched VM, and the vuart initialize process is common for each
VM, so, remove CONFIG_PARTITION_MODE from vuart related code.

Tracked-On: #2987
Signed-off-by: Conghui Chen <conghui.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-04-25 11:21:54 +08:00
Conghui Chen
3c92d7bbc7 HV: vuart: refine vuart config
Add vuart config in acrn_vm_config struct, support configuring 2 vuarts for
each VM. The first vuart is used to work as VM's console. The second vuart
is used to connect to other VM's vuart. When the port base for a vuart
is set to 0, hypervisor will not create this vuart.

Tracked-On: #2987
Signed-off-by: Victor Sun <victor.sun@intel.com>
Signed-off-by: Conghui Chen <conghui.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-04-25 11:21:54 +08:00
Victor Sun
2362e58509 HV: correct usage of GUEST_FLAG_IO_COMPLETION_POLLING
The guest flags of GUEST_FLAG_IO_COMPLETION_POLLING work for NORMAL_VM only;

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-04-25 11:07:21 +08:00
Yin Fengwei
578592b566 vlapic: refine IPI broadcast to support x2APIC mode
According to SDM 10.6.1, if dest fields is 0xffU for register
ICR operation, that means the IPI is for broadcast.

According to SDM 10.12.9, 0xffffffffU of dest fields for x2APIC
means IPI is for broadcast.

We add new parameter to vlapic_calc_dest() to show whether the
dest is for broadcast. For IPI, we will set it according to
dest fields. For ioapic and MSI, we hardcode it to false because
no broadcast for ioapic and MSI.

Tracked-On: #3003
Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-04-25 09:12:16 +08:00
Kaige Fu
581c0a239a HV: move AP_MASK to cpu.h
It is better to use an unified MACRO. So, this patch moves AP_MASK to cpu.h
and removes the defination of the MACRO spanning different source files.

Tracked-On: #2991
Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-04-24 11:55:23 +08:00
Kaige Fu
7b6fe14517 HV: Remove unnecssary indent in pm.c
This patch just removes unnecessary indent before #include in pm.c.

Tracked-On: #2991
Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-04-24 10:50:38 +08:00
Kaige Fu
a85d11ca7a HV: Add prefix 'p' before 'cpu' to physical cpu related functions
This patch adds prefix 'p' before 'cpu' to physical cpu related functions.
And there is no code logic change.

Tracked-On: #2991
Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-04-24 10:50:28 +08:00
li bing
25741b62db HV: fix the issue of ACRN_REQUEST_EXCP flag is not cleared.
the problem is : System will crash when run crashme.
The root cause of this problem is that when the ACRN_REQUEST_EXCP flag is set by calling
the vcpu_make_request function, the flag is not cleared.
Add the following statement to the vcpu_inject_exception function to fix the problem:
bitmap_test_and_clear_lock(ACRN_REQUEST_EXCP, &vcpu->arch.pending_req);
Tested that one night, there was no crash.

Tracked-On: #2527
Signed-off-by: bing.li<bingx.li@intel.com>
Acked-by:      Eddie Dong<eddie.dong@intel.com>
2019-04-23 15:17:13 +08:00
Li, Fei1
28d50f1b96 hv: vlapic: add apic register offset check API
Add apic rgister offset check before do vlapic read/write.

Tracked-On: #1842
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2019-04-23 15:16:56 +08:00
Li, Fei1
70dd254456 hv: vmsr: refine x2apic MSR bitmap setting
In theory, we should trap out all the x2apic MSR access if APICv is not enabled.
When "Use TPR shadow" and "Virtualize x2APIC mode" are enabled, we could disable
TPR interception; when APICv is fully enabled, besides TPR, we could disable all
MSR read, EOI and self-IPI interception; when we pass through lapic to guest, we
could disable all the MSR access interception except XAPICID/LDR read and ICR write.

Tracked-On: #1842
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2019-04-23 15:16:56 +08:00
Li, Fei1
0c347e607a hv: vlapic: wrap APICv check pending delivery interrupt
When in fully APICv mode, we enable VID. All pending delivery interrupts
will inject to VM before VM entry. So there is no pending delivery interrupt.
However, if VID is not enabled, we can only inject pending delivery interrupt
one by one. So we always need to do this check.

Tracked-On: #1842
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2019-04-23 15:16:56 +08:00
Li, Fei1
037fffc203 hv: vlapic: wrap APICv inject interrupt API
apicv_advanced_inject_intr is used if APICv fully features are supported,
it uses PIR to inject interrupt. otherwise, apicv_basic_inject_intr is used.
it will use VMCS INTR INFO field to inject irq.

Tracked-On: #1842
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2019-04-23 15:16:56 +08:00
Li, Fei1
1db8123c2d hv: virq: refine pending event inject coding style
In order to combine vlapic_apicv_inject_pir and vcpu_inject_vlapic_int.

Tracked-On: #1842
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2019-04-23 15:16:56 +08:00
Li, Fei1
fde2c07c0a hv: vlapic: minor fix about APICv inject interrupt
When VID is enabeld, we should always inejct the pending interrupts when vm enter.

Tracked-On: #1842
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2019-04-23 15:16:56 +08:00
Li, Fei1
846b5cf6b7 hv: vlapic: wrap APICv accept interrupt API
The APICv ops is decided once the APICv feature on the physical platform is detected.
We will use apicv_advanced_ops if the physical platform support fully APICv feature;
otherwise, we will use apicv_basic_ops.
This patch only wrap the accept interrupt API for them.

Tracked-On: #1842
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2019-04-23 15:16:56 +08:00
Yonghua Huang
f991d179b0 hv: fix possible buffer overflow in vlapic.c
Possible buffer overflow will happen in vlapic_set_tmr()
  and vlapic_update_ppr(),this path is to fix them.

Tracked-On: #1252
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-04-23 13:43:25 +08:00
Li, Fei1
2c13ac7400 hv: vmcs: minor fix about APICv feature setting
1) Shouldn't try to set APIC-register virtualization if the physical doesn't
support APICV advanced mode.
2) Remove all APICv features VMCS setting when LAPIC is passed through to guest.

Tracked-On: #1842
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2019-04-23 09:47:36 +08:00
Li, Fei1
4fc2009770 hv: instr_emul: check the bit 0(w bit) of opcode when necessary
Not every instruction supports the operand-size bit (w). This patch try to correct
what done in commit-id 9df8790 by setting a flag VIE_OP_F_BYTE_OP to indicate which
instruction supports the operand-size bit (w).

This bug is found by removing VMX_PROCBASED_CTLS2_VAPIC_REGS VMCS setting when the
physical doesn't support this APICv feature. However, if emulated this in MRB board,
the android can't boot because when switch to trusty world, it will check
"Delivery Status" in ICR first. It turns out that this Bit Test instruction is not
emulated correctly.

Tracked-On: #1337
Signed-off-by: Qi Yadong <yadong.qi@intel.com>
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Reviewed-by: Yin Fengwei <fengwei.yin@intel.com>
2019-04-23 09:47:36 +08:00
Kaige Fu
7ccb44afda HV: Remove dead loop in stop_cpus
This patch removes dead loop in stop_cpus because timeout never occurs.
If target cpu received a NMI and panic, it has called cpu_dead and stop_cpus success.
If target cpu is running, an IPI will be delivered to it and then call cpu_dead.

Tracked-On: #2991
Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-04-22 19:58:20 +08:00
Kaige Fu
91c1408197 HV: Reset physical core of lapic_pt vm when shutdown
The physical core of lapic_pt vm should be reset for security and
correctness when shutdown the vm.

Tracked-On: #2991
Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-04-22 19:58:20 +08:00
Kaige Fu
e52917f7d1 HV: Reshuffle start_cpus and start_cpu
This patch makes the following changes:
  - Add one parameter 'mask' to start_cpus for later use.
  - Set cpu state as DEAD instead of dead loop when fail to start cpu.
  - Panic when there are any failures when start cpus in init_cpu_post and host_enter_s3.

Tracked-On: #2991
Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-04-22 19:58:20 +08:00
Kaige Fu
cfe8637cc1 HV: Kconfig: Remove CPU_UP_TIMEOUT
This patch remove the over design CPU_UP_TIMEOUT and
use CPU_UP_TIMEOUT and CPU_DOWN_TIMEOUT instead.

Tracked-On: #2991
Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-04-22 19:58:20 +08:00
Kaige Fu
565f3c723a HV: Clear DM set guest_flags when shutdown vm
Currently, the previous configurations about guest_flags set by DM will
not be cleared when shutdown the vm. Then it might bring issue for the
next dm-launched vm.

For example, if we create one vm with LAPIC_PASSTHROUGH flag and shutdown it.
Then the next dm-launched vm will has the LAPIC_PASSTHROUGH flag set no matter
whether we set it in DM.

This patch clears all the DM set flags when shtudown vm.

Tracked-On: #2991
Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-04-22 19:58:20 +08:00
Zide Chen
a3207b2bc2 hv: allocate vpid based on vm_id and vcpu_id mapping
Currently vpid is not released in reset_vcpu() hence the vpid resource
could be exhausted easily if guests are re-launched.

This patch assigns vpid according to the fixed mapping of runtime vm_id
and vcpu_id to guarantee the uniqueness of vpid.

Tracked-On: #2700
Signed-off-by: Zide Chen <zide.chen@intel.com>
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2019-04-22 19:57:28 +08:00
Victor Sun
9673f3dad4 HV: validate target vm in hypercall
- The target vm in most of hypercalls should be a NORMAL_VM, in some
exceptions it might be a SOS_VM, we should validate them.

- Please be aware that some hypercall might have limitation on specific
target vm like RT or SAFETY VMs, this leaves "TODO" in future;

- Unify the coding style:

	int32_t hcall_foo(vm, target_vm_id, ...)
	{
		int32_t ret = -1;
		...

		if ((is_valid_vm(target_vm) && is_normal_vm(target_vm)) {
			ret = ....
		}

		return ret;
	}

Tracked-On: #2978

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-04-22 19:57:03 +08:00
Cai Yulong
887d41683b hv: check vm state before creating a VM
If launch two UOS with same UUID by acrn-dm, current code path will
return same VM instance to the acrn-dm, this will crash the two UOS.

Check VM state and make sure it's in VM_STATE_INVALID state before
creating a VM.

Tracked-On: #2984
Signed-off-by: Cai Yulong <yulongc@hwtc.com.cn>
2019-04-22 15:18:03 +08:00
Qi Yadong
fa47554054 hv: seed: fix potential NULL pointer dereferencing
The 'boot_params' and 'entry' might be dereferenced after they were
positively checked for NULL. Refine checking logic to fix the issue.

Tracked-On: #2979
Signed-off-by: Qi Yadong <yadong.qi@intel.com>
Acked-by: Zhu Bing <bing.zhu@intel.com>
2019-04-22 15:17:33 +08:00
Zide Chen
aee9f3c666 hv: reset per cpu sbuf pointers during vcpu reset
When shutting down SOS VM, the shared sbuf is released from guest OS, but
the per cpu sbuf pointers in hypervisor keep inact. This creates a problem
that after SOS is re-launched, hypervisor could write to the shared
buffer that no longer exists.

This patch implements sbuf_reset() and call it from reset_vcpu() to
reset sbuf pointers.

Tracked-On: #2700
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2019-04-19 16:20:34 +08:00
Li, Fei1
56acaacc29 hv: vlapic: add TPR below threshold implement
Add TPR below threshold implement for "Virtual-interrupt delivery" not support.
Windows will use it to delay interrupt handle.

Complete all the interrupts in IRR as long as they are higher priority than
current TPR. Once current IRR priority is less than current TPR enable TPR
threshold to IRR, so that if guest reduces the TPR threshold, it would be good
to take below TPR threshold exit and let interrupts to go thru.

Tracked-On: #1842
Signed-off-by: Zheng, Gen <gen.zheng@intel.com>
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2019-04-19 11:11:54 +08:00
Yuan Liu
b1e68453bd hv: enable vMCE from guest CPUID
Enable vMCE feature to boot windows guest.

vMCE is set in EDX from Microsoft TLFS spec, to support windows guest
vMCA and vMCE should be supported by guest CPUID.

Support MSR_IA32_MCG_CAP and MSR_IA32_MCG_STATUS reading when vMCE is enabled,
but they are not emulated yet, so return 0 directly.

Tracked-On: #1867
Signed-off-by: Yuan Liu <yuan1.liu@intel.com>
Reviewed-by: Yu Wang <yu1.wang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-04-18 09:00:42 +08:00
Sainath Grandhi
824caf8ce0 hv: Remove need for init_fallback_iommu_domain and fallback_iommu_domain
In the presence of SOS, ACRN uses fallback_iommu_domain which is the same
used by SOS, to assign domain to devices during ACRN init. Also it uses
fallback_iommu_domain when DM requests ACRN to remove device from UOS domain.
This patch changes the design of assign/remove_iommu_device to avoid the
concept of fallback_iommu_domain and its setup. This way ACRN can commonly
treat pre-launched VMs bringup w.r.t. IOMMU domain creation.

Tracked-On: #2965
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
2019-04-17 11:42:36 +08:00
Xiangyang Wu
48be6f1fd7 HV:config:Add config to enable logic partition on KBL NUC i7
In the current design, logic partition scenario is supported
on KBL NUC i7 since there is no related configuration and
no the cooresponding boot loader supporting.
The boot loader supporting is done in the previous patch.

Add some configurations such physical PCI devices information,
virtual e820 table etc for KBL NUC i7 to enable logical
partition scenario.
In the logical partition of KBL NUC i7, there are two
pre-launched VM, this pre-launched VM doesn't support
local APIC passthrough now. The hypervisor is booted through
GRUB.

TODO: In future, Local APIC passthrough and some real time
fetures are needed for the logic partition scenario of KBL
NUC i7.

V5-->V6:
	Update "Tracked-On"

Tracked-On: #2944

Signed-off-by: Xiangyang Wu <xiangyang.wu@linux.intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
2019-04-16 12:07:58 +08:00
Yonghua Huang
46480f6e23 hv: add new hypercall to fetch platform configurations
add new hypercall get platform information,
 such as physical CPU number.

Tracked-On: #2538
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-04-15 22:14:13 +08:00
Sainath Grandhi
16a2af5715 hv: Build mptable for guest if VM type is Pre-Launched
ACRN builds mptable for pre-launched VMs. It uses CONFIG_PARTITION_MODE
to compile mptable source code and related support. This patch removes
the macro and checks if the type of VM is pre-launched to build mptable.

Tracked-On: #2941
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-04-15 15:51:02 +08:00
Shiqing Gao
869de39757 hv: rename 'assign_iommu_device' and 'unassign_iommu_device'
- rename 'assign_iommu_device' to 'assign_pt_device'
- rename 'unassign_iommu_device' to 'unassign_pt_device'

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@inte.com>
2019-04-15 15:38:01 +08:00
Victor Sun
445999af5d HV: make vm id statically by uuid
Currently VM id of NORMAL_VM is allocated dymatically, we need to make
VM id statically for FuSa compliance.

This patch will pre-configure UUID for all VMs, then NORMAL_VM could
get its VM id/configuration from vm_configs array by indexing the UUID.

If UUID collisions is found in vm configs array, HV will refuse to
load the VM;

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-04-12 13:45:32 +08:00
Victor Sun
cb10dc7e73 HV: return bool in sanitize_vm_config
Return true if vm configs is sanitized successfully, otherwise return false;

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-04-12 13:45:32 +08:00
Victor Sun
6071234337 HV: use term of UUID
The code mixed the usage on term of UUID and GUID, now use UUID to make
code more consistent, also will use lowercase (i.e. uuid) in variable name
definition.

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-04-12 13:45:32 +08:00
Li, Fei1
4557033a3a hv: vlapic: minor fix about vlapic write
1) In x2apic mode, when read ICR, we want to read a 64-bits value.
2) In x2apic mode, write self-IPI will trap out through MSR write when VID isn't enabled.

Tracked-On: #1842
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2019-04-12 10:11:10 +08:00
Li, Fei1
fa8fa37cdf hv: vlapic: remove vlapic_rdmsr/wrmsr
We could call vlapic API directly, remove vlapic_rdmsr/wrmsr to make things easier.

Tracked-On: #1842
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2019-04-12 10:11:10 +08:00
Mingqiang Chi
69627ad7b6 hv: rename io_emul.c to vmx_io.c
renamed:  arch/x86/guest/io_emul.c -> arch/x86/guest/vmx_io.c
renamed:  include/arch/x86/guest/io_emul.h
	   -> include/arch/x86/guest/vmx_io.h

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-04-12 10:09:26 +08:00
Mingqiang Chi
2b79c6df6a hv:move some common APIs to io_req.c
Now the io_emul.c is relates with arch,io_req.c is common,
move some APIs from io_emul.c to io_req.c as common like these APIs:
register_pio/mmio_emulation_handler
dm_emulate_pio/mmio_complete
pio_default_read/write
mmio_default_access_handler
hv_emulate_pio/mmio etc

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-04-12 10:09:26 +08:00
Mingqiang Chi
0a1c016dbb hv: move 'emul_pio[]' from strcut vm_arch to acrn_vm
Move ‘emul_pio[]/default_io_read/default_io_write’
from struct vm_arch to struct acrn_vm

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-04-12 10:09:26 +08:00
Mingqiang Chi
35c8437bbc hv:move 'fire_vhm_interrupt' to io_emul.c
-- this api is related with arch_x86, then move to x86 folder
-- rename 'set_vhm_vector' to 'set_vhm_notification_vector'
-- rename 'acrn_vhm_vector' to 'acrn_vhm_notification_vector'
-- add an API 'get_vhm_notification_vector'

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-04-12 10:09:26 +08:00
Sainath Grandhi
6915264740 hv: Use virtual APIC IDs for Pre-launched VMs
For Pre-launched VMs, ACRN uses mptable for reporting APIC IDs to guest OS.
In current code, ACRN uses physical LAPIC IDs for vLAPIC IDs.
This patch is to let ACRN use vCPU id for vLAPIC IDs  and also report the same
when building mptable. ACRN should still use physical LAPIC IDs for SOS
because host ACPI tables are passthru to SOS.

Tracked-On: #2934
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
Acked-by: Eddie Dong <eddie.dong@Intel.com>
2019-04-11 20:04:58 +08:00
Victor Sun
16de23d0d5 HV: move CONFIG_MAX_VM_NUM to vm configurations
Now the MAX supported VM number is defined explicitly for each scenario,
so move this config from Kconfig to VM configuration.

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-04-08 13:08:55 +08:00
Victor Sun
d3e4f69595 HV: use separated vm_config.c for each scenario
Previously we use unified vm_config.c for all scenarios and use MACROs
for each configuration items, then the initialization of vm_configs[]
becomes more complicated when definition of MACROs increase, so change
the coding style that all configurable items could be explicitly shown in
vm_configuration.c to make code more readable.

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-04-08 13:08:55 +08:00
Sainath Grandhi
f22347346e hv: Remove separate interrupt routine for pre-launched VMs
As vector re-mapping is enabled for pre-launched/partition mode VMs,
there is no more need for separate interrupt routine i.e.
partition_mode_dispatch_interrupt.

Tracked-On: #2879
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
2019-04-04 17:51:36 +08:00
Sainath Grandhi
5b795a3312 hv: add the support of vector remapping for pre-launched VMs
For pre-launched VMs MSI/MSI-x configuration writes are not intercepted by ACRN.
It is pass-thru and interrupts land in ACRN and the guest vector is injected into
the VM's vLAPIC. With this patch, ACRN intercepts MSI/MSI-x config writes and take
the code path to remap interrupt vector/APIC ID as it does for SOS/UOS.

Tracked-On: #2879
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
2019-04-04 17:51:36 +08:00
Kaige Fu
336ed72250 HV: Minor refinement about RTVM pm MACRO and comments
This patch mainly does the following:
  - Replace prefix RT_VM_ with VIRTUAL_.
  - Remove the check of "addr != RT_VM_PM1A_CNT_ADDR" as the handler is specific for this addr.
  - Add comments about the meaning of return value.

Tracked-On: #2865
Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-04-04 00:27:55 +08:00
Kaige Fu
9c5e16987a HV: Remove the check pcpu active status when sending INIT
Intel SDM Vol3 23.8 says:
  The INIT signal is blocked whenever a logical processor is in VMX root operation.
  It is not blocked in VMX nonroot operation. Instead, INITs cause VM exits

So, there is no side-effect to send INIT signal regardless of pcpu active status.

Tracked-On: #2865
Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2019-04-04 00:27:55 +08:00
Huihuang Shi
b316bf8a39 hv: fix "Else alternative missing in if."
All if . . else if constructs shall be
terminated with an else statement.

Tracked-On: #861
Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com
2019-04-03 09:20:55 +08:00
Victor Sun
7cff124b96 HV: removed unused pt_dev.c in board folder
The pt_dev.c in board folder is replaced by the one in scenarios folder,
so remove them.

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
2019-04-02 21:42:07 +08:00
Qi Yadong
6d582f62d2 hv: trusty: minor change of coding style
Refine return value checking in functions.

Tracked-On: #2874
Signed-off-by: Qi Yadong <yadong.qi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-04-02 21:38:17 +08:00
Yan, Like
ede1459e19 hv: fix the vm pointer check before use
After using get_vm_from_vmid(), vm pointer is always not NULL. But there are still many NULL pointer checks.
This commit replaced the NULL vm pointer check with a validation check which checks the vm status.
In addition, NULL check for pointer returned by get_sos_vm() and get_vm_config() is removed.

Tracked-On: #2520
Signed-off-by: Yan, Like <like.yan@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-04-02 16:29:51 +08:00
Victor Sun
e35f27a525 HV: add clos initialization in vm_config
The CLOS is initialized to 0 for each scenarios. User could modify this
configuration in its vm_configurations.h;

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-04-02 16:00:27 +08:00
Victor Sun
7580cddf9f HV: add scenario for logical partition
In this scenario, hypervisor will run two logical partition VMs.

Please note that the Kconfig of Hypervisor mode will be removed
gradually. In current Kconfig setting, the CONFIG_PARTITION_MODE
is still kept for now for back-compatibility.

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-04-02 16:00:27 +08:00
Victor Sun
56c193851a HV: introduce scenario Kconfig for sharing mode
Previously the vm_configs[] is defined separately for sharing mode and
partition mode, but the concept of hypervisor mode will be removed. Instead
we will introduce scenario Kconfig for hypervisor to load different vm
configurations.

SDC(Software Defined Cockpit) is a typical scenario that ACRN supported
so we introduce this scenario for previously sharing mode and move its
configurations to scenarios/sdc folder. The configuration could be used
for all boards reference.

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-04-02 16:00:27 +08:00
Victor Sun
564c9dcb79 HV: refine pt_dev.c for partition mode
Use MACROs in pt_dev.c to replace straight-forward BDF numbers. The
pt devices for each VM will be chosen from Board specific PCI devices
list which defined in pci_devices.h;

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-04-02 16:00:27 +08:00
Jian Jun Chen
cee45a80d9 hv: add default handlers for PIO/MMIO access
Add the default handlers for PIO and MMIO access which returns all
FFs on read and discards write. These default handlers are registered
when SOS VM or pre-launched VM is created.

v3 -> v4:
- use single layer if in hv_emulate_pio
- change the implementation of pio_default_read

v2 -> v3:
- use runtime vm type instead of CONFIG_PARTITION_MODE
- revise the pio/mmio emulation functions
- revise the pio/mmio default read functions according to MISRA C
- revise the commit message

v1 -> v2:
- add default handlers members in struct acrn_vm and add interfaces
  to register default handlers for PIO and MMIO.

Tracked-On: #2860
Signed-off-by: Jian Jun Chen <jian.jun.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-04-01 11:16:37 +08:00
Kaige Fu
382acfaf28 HV: Using INIT to kick vCPUs off when RTVM poweroff by itself
When RTVM is trying to poweroff by itself, we use INIT to
kick vCPUs off the non-root mode.

For RTVM, only if vm state equal VM_POWERING_OFF, we take action to pause
the vCPUs with INIT signal. Otherwise, we will reject the pause request.

Tracked-On: #2865
Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-29 16:17:44 +08:00
Kaige Fu
2771b46b1d HV: Add one delmode parameter to make_reschedule_request
This patch makes make_reschedule_request support for kicking
off vCPU using INIT.

Tracked-On: #2865
Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-29 16:17:44 +08:00
Kaige Fu
ef9be0208a HV: Introduce one new API send_single_init
This API is only for kick vcpu out of non-root mode when
RTVM poweroff by itself. And the first caller will soon come
along with the next patch.

Tracked-On: #2865
Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-29 16:17:44 +08:00
Kaige Fu
8ad5adced7 HV: Set vm state as with VM_POWERING_OFF when RTVM poweroff by itself
We set the vm state as VM_POWERING_OFF when RTVM is trying to poweroff by itself.
We will check it when trying to pause vCPUs of RTVM. Only if vm state equal to
VM_POWERING_OFF, we take action to pause the vCPUs of RTVM. Otherwise, we will
reject the pause request.

Tracked-On: #2865
Signed-off-by: Kaige Fu <kaige.fu@intel.com>
2019-03-29 16:17:44 +08:00
Kaige Fu
83d11bbff8 HV: Register S5 pio handler for dm-launched RTVM
The virtual pm port of RTVM is intercepted by HV. But the HV needs to inform the DM as well.
So we will forward the virtual S5 request to DM too

The handler in HV just set the pm state flag (VM_POWERING_OFF) which indicate that the RTVM is powering
off by itself. Meanwhile, there are data resources in VHM and DM should be released once we handle the PM
of RTVM in HV. So, return to DM to go through the entire VM destroy cycles to release the resources.
During the cycles, the DM will try to pause vm through hypercall. In the hypercall handler in HV, we will
check the pm state flag. If it is set, pause all the vCPUs of the vm. Otherwise, reject the request.

In this way, we can make sure that RTVM can only trigger its s5 by itself. All
other S5 request from external will be rejected.

Here is sequence chart of RTVM s5.

   poweroff
+-----------+              +----------+           +-----------+         +----------+
|    vBSP   |              |    vAPs  |           |    HV     |         |    DM    |
+-----+-----+              +----------+           +-----+-----+         +-----+----+
      |                         |                       |                     |
      |   Stop all other cpus   |                       |                     |
      +----------------------------+                    |                     |
      |                         |  |Disable LAPIC       |                     |
      |                         +<-+                    |                     |
      |                         |                       |                     |
      |                         +--+                    |                     |
      |                         |  |HLT in              |                     |
      | All other cpus stopped  |  |non-root mode       |                     |
      +----------------------------+                    |                     |
      |     Call ACPI method to enter s5                |                     |
      +-------------------------+---------------------> |                     |
      |                         |   Set s5 flag         |                     |
      |                         | <---------------------+                     |
      |                         |   APs paused          | Re-inject IOREQ TO DM
      |                         | +-------------------> +-------------------> +
      |                         |                       |   Pause VM          |
      |                         |   Check S5 flag:      | <-------------------+
      |                         |    - If set, pause vm |  VM paused          |
      |                         |    - If no, reject    | +-----------------> +--+
      |                         |                       |  Destroy VM         |  |Deinit works
      |                         |                       | <--------------------<-+
      |                         |                       |  VM destroyed       |
      |                         |                       | +-----------------> |
      +                         +                       +                     +

Tracked-On: #2865
Signed-off-by: Kaige Fu <kaige.fu@intel.com>
2019-03-29 16:17:44 +08:00
Kaige Fu
1c0d7f78d0 HV: HV: make io_read_fn_t return true or false
This patch makes io_read_fn_t return true or false instead of void.
Returning true means that the handler in HV process the request completely.
Returning false means that we need to re-inject the request to DM after
processing it in HV.

Tracked-On: #2865
Signed-off-by: Kaige Fu <kaige.fu@intel.com>
2019-03-29 16:17:44 +08:00
Kaige Fu
3b2ad67788 HV: make io_write_fn_t return true or false
This patch makes io_write_fn_t return true or false instead of void.
Returning true means that the handler in HV process the request completely.
Returning false means that we need to re-inject the request to DM after
processing it in HV.

Tracked-On: #2865
Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-29 16:17:44 +08:00
Kaige Fu
ed286e3239 HV: Introduce a new API is_rt_vm
This patch checks if the GUEST_FLAG_RT is set when GUEST_FLAG_LAPIC_PASSTHROUGH is set.
If GUEST_FLAG_RT is not set while GUEST_FLAG_LAPIC_PASSTHROUGH is set, we will refuse
to boot the VM.

Meanwhile, this patch introduces a new API is_rt_vm.

Tracked-On: #2865
Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-29 16:17:44 +08:00
Yonghua Huang
868778a68b hv: fix vulnerability when VM is destroyed
In hypervisor fuzzing test, hypervisor will hang
 if issuing HV_VM_SET_MEMORY_REGIONS hypercall after
 target VM is destroyed.

 this patch is to fix above vulnerability.

Tracked-On: #2849
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2019-03-27 09:20:12 +08:00
wenlingz
3effbb05a2 Revert "hv: vmsr: add IA32_MISC_ENABLE to msr store area"
This reverts commit 98b3d98ac5.
2019-03-26 13:59:21 +08:00
Li, Fei1
40168e73ee hv: vlapic: remove TPR set/get API
Since we always enable "Use TPR shadow", so operate on TPR will not
trigger VM exit. So remove these APIs.

Tracked-On: #1842
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2019-03-25 13:31:51 -07:00
Li, Fei1
4a683ed10e hv: vlapic: minor fix for update_msr_bitmap_x2apic_apicv
Shouldn't trap TPR since we always enable "Use TPR shadow"

Tracked-On: #1842
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2019-03-25 13:31:51 -07:00
Binbin Wu
98b3d98ac5 hv: vmsr: add IA32_MISC_ENABLE to msr store area
Currently MSR IA32_MISC_ENABLE is passthrough to guest.
However, guest may change the value of this MSR, which will cause issue in hypervisor.
This patch uses VMX MSR store area to isolate the MSR IA32_MISC_ENABLE between guest and host.

TODO:
Some bits of the MSR IA32_MISC_ENABLE is not just per core, but per package.
So need to check if need to prevent guest from setting or clearing these bits that may affect other cores.

Tracked-On: #2834
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2019-03-22 13:32:01 +08:00
Binbin Wu
273381b372 hv: vmsr: rename msr_num to msr_index in struct msr_store_entry
Rename the field msr_num to msr_index, which is more accurate,
in struct msr_store_entry.

Tracked-On: #2834
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
2019-03-22 13:32:01 +08:00
Mingqiang Chi
5585084c00 hv:move 'udelay' to timer.c
-- move this api from misc.c to timer.c to avoid
   reverse dependency, and remove misc.c

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
2019-03-22 08:38:13 +08:00
Zide Chen
370998ba5a hv: replace MEM_2K with a new macro MAX_BOOTARGS_SIZE for bootargs size
- for all cases of referring guest bootargs size, replace MEM_2K with
  CONFIG_MAX_BOOTARGS_SIZE for better readability.
- remove duplicated MAX_BOOTARGS_SIZE definition from vm_config.h.

Also fix one minor issue in general_sw_loader() which uses copy_to_gpa()
to copy a string. Since copy_to_gpa() makes use of memncpy_s() to do the
job, the size parameter should include the string null ternimator.

Tracked-On: #2806
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-21 13:08:15 +08:00
Yan, Like
93ed2af165 hv: passthru TSC_ADJUST to VM with lapic pt
Linux access TSC_ADJUST to verify it has not tampered every time when enter idle.
So for RTVM running rt-linux, the access will cause vm exit which affect real-time performance.

This commit pass through TSC_ADJUST to VM with lapic_pt, to avoid TSC_ADJUST caused vm_exit.
For other VMs, TSC_ADJUST msr access is still trapped and emulated.

Tracked-On: #2813
Signed-off-by: Yan, Like <like.yan@intel.com>
2019-03-20 13:35:28 +08:00
Binbin Wu
f32b59d73d hv: disable mpx capability for guest
This patch hide Memory Protection Extention (MPX) capability from guest.

- vCPUID change:
  Clear cpuid.07H.0.ebx[14]
  Clear cpuid.0DH.0.eax[4:3]
- vMSR change:
  Add MSR_IA32_BNDCFGS to un-supported MSR array.
- XCR0[4:3] is not allowed to set by guest.

Tracked-On: #2821
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-20 13:07:31 +08:00
Sainath Grandhi
b1cc18810e hv: Use domain/device specific invalidation for DMAR translation caches
ACRN uses global invalidation for all DMAR translation caches. Whenever
a UOS is shutdown or rebooted, it ends up clearing entries in translation
caches belonging to other VMs/domains. This patch adds support for
domain/device level invalidation for DMA translation caches and index
based invalidation for Interrupt Remapping Cache.

Tracked-On: #2738
Signed-off-by: Sainath Grandhi sainath.grandhi@intel.com
Acked-by: Eddie Dong eddie.dong@intel.com
2019-03-20 09:13:07 +08:00
Li, Fei1
e131d7059a hv: vmconfig: minor fix about regression of commit 79cfb1
commit 79cfb1 forgot to add GUEST_FLAG_ prefix for LAPIC_PASSTHROUGH
in file arch/x86/configs/dnv-cb2/partition_config.h

Tracked-On: #1842
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2019-03-19 19:09:36 +08:00
Junjie Mao
9abd469da2 config: unify board names to lowercase
Currently board names are used inconsistently across the project.

* Name of defconfigs for various boards use lowercase.
* Directory of config files for various boards use lowercase.
* CONFIG_BOARD uses uppercase.

This confuses the configuration scripts and leads to unintended overwriting of
.config, as well as missing of board-specific headers during compilation because
the include paths are case-sensitive.

This patch converts the default board names to lowercase to resolve such
issues. Users are still free to define their own boards in either uppercase or
lowercase as long as they keep the cases consistent.

Tracked-On: #2794
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
2019-03-19 19:08:59 +08:00