Rename vlapic_post_intr to apicv_post_intr and move it to internal function
since it's only used in vlaic.c.
Tracked-On: #1842
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
Since it's only used in vlaic.c
Tracked-On: #1842
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
Move vm_active_cpus from vlapic.c to vm.h since it's vm related
not vlapic related.
Tracked-On: #1842
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
pci_vdev contains a pointer to pdev, which stores pbdf, so there is no need
to store a separate pbdf in vdev.
Tracked-On: #2534
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
Use a function to compare bdf instead and some related code cleanup
Tracked-On: #2534
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
For 64-bit bars, previously the code will do bar size calculation only if the
lower 32-bit bar address is nonzero, changed to do bar size calculation when the whole
64-bit bar address is nonzero.
Tracked-On: #2534
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
Otherwise, page fault will be triggered when writing npk log
to these mmio addresses.
Tracked-On: #2589
Signed-off-by: Zhi Jin <zhi.jin@intel.com>
Reviewed-by: Yonghua Huang <yonghua.huang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
merge E820_MAX_ENTRIES and NUM_E820_ENTRIES
to E820_MAX_ENTRIES.
Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
PDPTE registers should be loaded in PAE paging mode.
However, current code load PDPTE registers in long mode.
Tracked-On: #2561
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
There are two bugs related to PDPT address calculation for PAE mode.
1. Current code doesn't ignore the "Ignored" fileds when load pdpt registers.
Mask the "Ignored" fileds according to SDM Figure 4-7 Vol3.
2. Current code only ignores 4bits instead of 5bits in low "Ignored" filed when
calculate PDPT address in PAE mode for guest memory address translation.
Tracked-On: #2561
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
We need to parse dmar table on UP2+SBL, otherwise all
the interrupts from IOAPIC don't work.
Tracked-On: #2572
Signed-off-by: Tw <wei.tan@intel.com>
Reviewed-by: Binbin Wu <binbin.wu@intel.com>
remove hypervisor.h from per_cpu.h
Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
merge include/arch/x86/irq.h and include/common/irq.h
--> include/arch/x86/irq.h
Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
move gva2hva() & hva2gpa() to guest_memory.c,
we will remove hypervisor.h in the future.
Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
According to SDM 17.3.1.1, for any fault-class exception except a
debug exception generated in response to an instruction breakpoint,
the value pushed for RF is 1.
This patch set Resume Flag for fault class exceptions.
Tracked-On: #2405
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
DCR is initialized to 0 which means divisor shift is 1. Currently, both
are initialized to 0 which result in incorrect APIC timer counts if the
vLAPIC's DCR is never programmed.
This bug was exposed by OVMF because OVMF does not program DCR during
LAPIC initialization.
Tracked-On: #2543
Signed-off-by: Peter Fang <peter.fang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
HV passes the return value of vmcall by register RAX unconditionally.
However, if the vmcall is undefined for a guest, RAX value of guest vcpu
should not be changed.
According to SDM Vol. 3C 30-9, VMCALL is allowed from any CPL in guest.
VMCALL is NOT allowed from CPL > 0 in vmx root mode.
ACRN hypervisor doesn't call VMCALL in vmx root mode, though.
In current code, ACRN also deny VMCALL from CPL > 0 in guest.
So for this case, #GP will not be injected, instead, modify the RAX to
notify the return value.
Tracked-On: #2405
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
ACRN HV hide VMX capability from guest. Only vmcall from SOS or some
specific vmcall from UOS are allowed.
Unsupported vmcall from UOS should be considered a "not in VMX operation" case,
and should be handled first according to SDM Vol. 3C 30-9.
Tracked-On: #2405
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
Removed the remaining reference of acrn vm from
inside of vtd.c.
Removed usage of snoopy_mem, and added code to achieve
the same using iommu_snoop.
Initialize iommu_snoop to true in create deault iommu.
Tracked-On: #2496
Signed-off-by: Arindam Roy <arindam.roy@intel.com>
This patch is a modified one. It removes the usage
of acrn_vm struct from inside vtd.c.
It also puts struct iommu_domain inside vtd.h,
from vtd.c.
It modifies the signature of init_iommu_domain
in order to remove dependency on acrn_vm from
inside vtd.c.
Incorporated comments from Jason and Eddie.
Changed the name of sos_vm_domain to
fallback_iommu_domain
Removed any reference of sos_vm from vtd.[c|h]
files, including comments.
Tracked-On: #2496
Signed-off-by: Arindam Roy <arindam.roy@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
For vcpu.c and vcpu.h,only include some necessary
header files, doesn't include hypervisor.h
Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
-- now hypervisor.h is the universal set of header file,
this patch doesn't include hypervisor.h, only include
some necessary header files for vm.c and vm.h
-- move 'struct vcpuid_entry' from vm.h to vcpuid.h
-- remove dead code 'enum vm_privilege_level'
-- move 'enum vpic_wire_mode' from vm.h to vpic.h
Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
- move functions related vmexit from `guest.h` to `vmexit.h`
- move functions related msr from `guest.h` to `msr.h`
- move functions related vm_sw_loader from `guest.h` to `vm.h`
- move function `vmx_vmrun` from `guest.h` to `vcpu.h`
- move MACROs related to vcpu from `guest.h` to `vcpu.h`
- move MACRO `E820_MAX_ENTRIES` from `guest.h` to `e820.h`
- move MACROs related to irq from `guest.h` to `irq.h`
- rename `guest.h` to `guest_memory.h`
Tracked-On: #2503
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
Use acrn_vm_pci_ptdev_config struct for PCI PT devices configuration
in acrn_vm_config, the only needed configure item is PT devices's
vBDF and pBDF info. When init PT devices, the BDF info will be stored
in pci_vdevs[] of acrn_vm.
With this patch, the previous vpci_vdev_array struct is not needed.
Tracked-On: #2291
Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
Remove redundancy code since they are not used now.
-- remove 'max_ram_blk_base' & 'max_ram_blk_size' in
struct e820_mem_params
-- remove 'gpa_lowtop' in struct vm_hw_info
-- remove MACRO 'UOS_DEFAULT_START_ADDR'
Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
The partition mode vm config in vm_description.c is abandoned,
so delete the file. Its related struct in vm.h is also removed;
Tracked-On: #2291
Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
The previous VM configs array for partition mode is inside struct of
vm_config_partition and named as vm_config_array[], now switch to
global vm_configs[];
Tracked-On: #2291
Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
Add VM configure files for Intel apl-mrb and dnv-cb2 platforms.
The board specific config header is named as partition_config.h and
the PCI passthrough device list is named as pt_dev.c under
hypervisor/arch/x86/configs/$CONFIG_BOARD folder.
Tracked-On: #2291
Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
As we store the physical pci device info in a global pdev array, the vdev struct can
store a pointer to pdev instead.
Tracked-On: #2431
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Reviewed-by: Anthony Xu <anthony.xu@intel.com>
The ptdev ops will be initialized automatically during ptdev init, so
remove the hardcoded ops in vm_description.c
Tracked-On: #2431
Signed-off-by: Victor Sun <victor.sun@intel.com>
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Reviewed-by: Anthony Xu <anthony.xu@intel.com>
We have enabled bar decoding in init ptdev, so hard-coded bar info is not needed
any more.
Tracked-On: #2431
Signed-off-by: Victor Sun <victor.sun@intel.com>
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Reviewed-by: Anthony Xu <anthony.xu@intel.com>
Current pt devices bar info for partion mode is hardcoded in
vm_description.c, now we remove the hardcoded info and parse the bar
info during pt devices init.
Tracked-On: #2431
Signed-off-by: Victor Sun <victor.sun@intel.com>
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Reviewed-by: Anthony Xu <anthony.xu@intel.com>
Tracked-On: #2431
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Signed-off-by: Victor Sun <victor.sun@intel.com>
Reviewed-by: Anthony Xu <anthony.xu@intel.com>
- add e820 info in struct acrn_vm;
- rename rebuild_sos_vm_e820() to create_sos_vm_e820();
- add create_prelaunched_vm_e820() for partition mode;
- rename create_e820_table() to create_zeropage_e820() and merge for
both sharing mode and partition mode;
- move create_xxx_vm_e820() to vm.c;
- move create_zeropage_e820() to vm_load.c;
Tracked-On: #2291
Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
move e820_default_entries[] from vm_description.c to ve820.c and rename
to ve820_entry[] as a temparary solution for partiton mode e820 management;
Tracked-On: #2291
Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
Rename vlapic_deliver_intr to vlapic_receive_intr: ioapic/msi device
deliver an interrupt to lapic.
Rename vlapic_pending_intr to vlapic_find_deliverable_intr: find a
deliverable interrupt which pending in irr and its priority large than ppr.
Rename vlapic_intr_accepted to vlapic_get_deliverable_intr: get the deliverable
interrupt from irr and set it in isr (which also raise ppr update)
Tracked-On: #1842
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
CRx 'guest/host mask' is widely used when talking
about CR0/CR4 virtualization in SDM spec,
rename them to 'VMX_CRx_GUEST_HOST_MASK'.
Tracked-On: #861
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
- move `vcpumask2pcpumask` from `guest.c` to `vcpu.c`
- move `prepare_sos_vm_memmap` from `guest.c` to `vm.c`
- rename `guest.c` to `guest_memory.c`
Tracked-On: #2484
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
This patch adds IR enable/disable APIs. Upon boot, enabling IR is
deferred until the first interrupt source is programmed. This is done
for UEFI platforms as UEFI bootloader depends on timer interrupt and
the programming of timer interrupt source is done before ACRN gets a
chance to run during boot.
Tracked-On: #2426
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
When a corresponding IOMMU is found for the device, this patch adds
support to program Interrupt Remapping hardware RTEs and the original
interrupt sources (MSI or IOAPIC) with IR format.
Tracked-On: #2426
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
Reviewed-by: Binbin Wu <binbin.wu@intel.com>
Interrupt Remapping hardware in x86 can hold 64K entries with each entry
of size 16 bytes. So 256 entries occupy 4K. Adding a configuration for
developer to choose number of IR entries, in multiples of 256. ACRN does
not boot on platforms that does not support Interrupt Remapping and
Extended Interrupt Mode
Tracked-On: #2426
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
Reviewed-by: Binbin Wu <binbin.wu@intel.com>
IOAPIC info from DMAR table is needed to match the IOAPIC info from
MADT. This patch adds support to get id and bus, devfn for IOAPIC
from DMAR. IOAPIC info for SBL platform is hardcoded in the header
file.
Tracked-On: #2426
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
Reviewed-by: Binbin Wu <binbin.wu@intel.com>
IOAPIC info, specifically ID, is needed to map the IOAPIC to
corresponding DMAR. DMAR table in ACPI has a field that has IOAPIC
ID, that matches the info provided in MADT. Both (IOAPIC info from
MADT and from DMAR) is needed for remapping IOAPIC interrupts.
Tracked-On: #2426
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
As we enable Interrupt Remapping Hardware in ACRN, Queued Invalidation
(QI) needs to be used clear DMAR hardware caches. This patch introduces
Queued Invalidation APIs. Code related to Register based Invalidation
is removed from ACRN and platforms that do not support QI cannot boot
with ACRN after this patch.
Tracked-On: #2426
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
Reviewed-by: Binbin Wu <binbin.wu@intel.com>
