Commit Graph

980 Commits

Author SHA1 Message Date
Mingqiang Chi
5b43aa8a65 hv:Rename ptdev to ptirq for some variables and structures
ptdev_remapping_info --> ptirq_remapping_info
ptdev_msi_info --> ptirq_msi_info
ptdev_vpin_source --> ptirq_vpin_source
ptdev_irq_entries --> ptirq_entries
ptdev_entry_bitmaps --> ptirq_entry_bitmaps

v1-->v2:
   still use ptdev_lock instead of ptirq_lock
Tracked-On: #861
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-30 13:27:49 +08:00
Junjie Mao
10afa9bbbf HV: io: obsolete the valid field in vhm requests
As SOS has already adapted to the new state transition of VHM requests for a
month, the old `valid` field can now be safely obsoleted.

This patch changes the `valid` field as reserved and drops all the code that
reads or modifies this field for backward compatibility. The embedded comments
are updated accordingly, following the doxygen style.

Tracked-On: #875
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-30 13:14:59 +08:00
Shiqing Gao
db3c5746f3 hv: fix 'Function return value potentially unused'
MISRA-C requires that if the return value of a function call is
assigned to a local variable, this value shall be used in all paths.

This patch moves the variable assignment right before the moment that
the variable is used.

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-30 06:54:54 +08:00
Jason Chen CJ
0bc85d2ebc modularization: boot component - move files
Boot component prepares the very basic platform boot env. It finally call
into platform initilization entries:

- bsp_boot_init & cpu_secondary_init for start up
- or restore_s3_context for wakeup

This patch just move files into reorg dir.

Tracked-On: #1842
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
2018-11-29 15:44:56 +08:00
Huihuang Shi
17a6d9446e hv: guest: fix "Procedure has more than one exit point"
IEC 61508,ISO 26262 standards highly recommend single-exit rule.

Reduce the count of the "return entries".
Fix the violations which is comply with the cases list below:
1.Function has 2 return entries.
2.The first return entry is used to return the error code of
checking variable whether is valid.

Fix the violations in "if else" format.

Tracked-On: #861
Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-29 15:03:48 +08:00
Huihuang Shi
c32d41a0be hv: irq: fix "Procedure has more than one exit point"
IEC 61508,ISO 26262 standards highly recommend single-exit rule.

Reduce the count of the "return entries".
Fix the violations which is comply with the cases list below:
1.Function has 2 return entries.
2.The first return entry is used to return the error code of
checking variable whether is valid.

Fix the violations in "if else" format.

Tracked-On: #861
Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-29 15:03:48 +08:00
Li, Fei1
a1ac585b85 hv: add brackets to make operator expression more readable
v1-v2:
Bypass this case:
When binary arithmetic operators of different precedence (e.g. '+'
and '*') are mixed in an expression, parentheses are added to the
sub-expressions using the operator with a higher precedence.

v1:
The operator precedence rules are complicated and it is easy to make a mistake.
So add brackets to make operator expression more readable.

Tracked-On: #861
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2018-11-29 11:10:22 +08:00
Li, Fei1
e1d0f7e432 hv: instr_emul: fix decode_modrm no default case in switch statement
MISRA-C required every switch statement shall have a default label.

Tracked-On: #861
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-28 13:25:56 +08:00
Li, Fei1
042c393526 hv: trusty: fix get_max_svn_index return type inconsistent
Function return type should consistent.

Tracked-On: #861
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2018-11-28 13:25:56 +08:00
Huihuang Shi
2afa7173ef hv: vlapic: fix "Procedure has more than one exit point"
IEC 61508,ISO 26262 standards highly recommend single-exit rule.

Reduce the count of the "return entries".
Fix the violations which is comply with the cases list below:
1.Function has 2 return entries.
2.The first return entry is used to return the error code of
checking variable whether is valid.

Fix the violations in "if else" format.

Tracked-On: #861
Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-27 14:43:16 +08:00
Shiqing Gao
06efc58a7e hv: assign: clean up HV_DEBUG usage related to vuart pin
replace HV_DEBUG with CONFIG_COM_IRQ which is more reasonable

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Reviewed-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-27 13:09:24 +08:00
Mingqiang Chi
c380ee9eeb hv:Revise sanitized page size
now the size of sanitized_page is 32KB,
revise it to 4KB.

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-11-27 13:09:04 +08:00
Zide Chen
b627c2c979 hv: switch IA32_TSC_AUX between host/guest through VM Controls
Currently guest IA32_TSC_AUX MSR is loaded manually right before VM
entry, and saved right after VM exit.

This patch enables VM-Entry Control and VM-Exit Control to switch
MSR IA32_TSC_AUX between host and guest automatically. This helps to
keep vcpu_thread() function and struct acrn_vcpu cleaner.

Also it removes the dead code of intercepting IA32_TSC_AUX.

Tracked-On: #1867
Signed-off-by: Zide Chen <zide.chen@intel.com>
Reviewed-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-27 09:26:29 +08:00
Shiqing Gao
b1047224aa hv: assign: clean up HV_DEBUG usage related to shell
remove the usage of HV_DEBUG related to shell command in assign.c

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-23 12:21:02 +08:00
Shiqing Gao
a931229888 hv: irq: clean up HV_DEBUG usage
remove the usage of HV_DEBUG in irq.c

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-23 12:21:02 +08:00
Shiqing Gao
dfe48811d4 hv: vcpu: clean up HV_DEBUG usage
remove the usage of HV_DEBUG in vcpu.c

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-23 12:21:02 +08:00
Shiqing Gao
e49929a776 hv: ioapic: clean up HV_DEBUG usage
remove the usage of HV_DEBUG in ioapic.c

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-23 12:21:02 +08:00
Li, Fei1
02a89dd473 hv: lapic: fix a theoretic infinite loop when clear lapic isr
In theory, there would have 256 pending interrupts on lapic ISR.
Add this check to avoid theoretic infinite loop for clearing
lapic isr. Leave the potentially hardware issue to machine check.

Tracked-On: #861
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2018-11-22 12:44:21 +08:00
Li, Fei1
dbe3d986c0 hv: lapic: save lapic base MSR when suspend
Although the lapic base MSR have the same value in per-cpu except that the BSP bit.
However, we would enter s3 on the BSP cpu. After the resume from s3, the BSP bit was
clear on the BSP cpu. This patch fix this bug.

Tracked-On: #861
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-22 12:44:21 +08:00
Li, Fei1
b8a553d16a hv: lapic: remove union apic_lvt
Since it's unused.

Tracked-On: #861
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2018-11-22 12:44:21 +08:00
Mingqiang Chi
538ba08c2b hv:Add vpin to ptdev entry mapping for vpic/vioapic
Now if the vmexit reason is virtulized EOI for level triggered
interrupts, HV will loop all the ptdev entries, it is time-consuming,
this patch add vpin to ptdev entry mapping for vpic and vioapic
when add intx entry for a vm,it can use the ptdev entry directly
according to the mapping for vpin and ptdev entry when EOI vmexit.

v3-->v4:
  -- add check vpin in remove_intx_remapping
  -- move check vpin from ptdev_add_intx_remapping to add_intx_remapping

Tracked-On: #861
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Reviewed-by: Binbin Wu <binbin.wu@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
2018-11-22 11:26:04 +08:00
Mingqiang Chi
297a264a74 hv:Cleanup ptdev lock
Move ptdev lock out from add_intx_remapping/add_msix_remapping
/remove_intx_remapping/remove_msix_remapping and make it protect
the whole add entry/remove entry process

v3-->v4:
  --move ptdev lock out

v2-->v3:
  -- still use ptdev lock for add/remove ptdev entry
Tracked-On: #861
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Reviewed-by: Binbin Wu <binbin.wu@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
2018-11-22 11:26:04 +08:00
Mingqiang Chi
b7bbf81287 hv:Replace dynamic memory with static for ptdev
-- Config MAX_PT_IRQ_ENTRIES 64 in Kconfig
-- Remove ptdev list
-- Add alloc_ptdev_entry_id api

v3-->v4:
  -- move is_entry_active from assign.c to ptdev.h
  -- Add clear active flag in release_entry
v2-->v3:
  -- Remove redundancy active check for ptdev entry
     in release_all_entries and get_ptdev_info
v1-->v2:
  -- split to small patches

Tracked-On: #861
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Reviewed-by: Binbin Wu <binbin.wu@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
2018-11-22 11:26:04 +08:00
dongshen
b0e1657b4f HV: Adding partition mode support for cb2_dnv
Adding partition mode support for cb2_dnv.

Tracked-On: #1853
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
2018-11-21 15:21:37 +08:00
dongshen
664bc1bace HV: Partition mode source code file layout reorg
Put partition mode board specific files under partition/$(CONFIG_BOARD)/

Tracked-On: #1852
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
2018-11-21 15:21:37 +08:00
Shuo Liu
e8296dce05 hv: Add IO request completion polling feature
This patch introduce a new mode of IO request completion, polling mode.

Now, the sketch of ioreq process can be,
  A. UOS vcpu0 generate PIO/MMIO ->
   B. pcpu1(vcpu0 of UOS) trap into HV ->
    C. pcpu1 build ioreq, send IPI and enter idle ->
     D.1 pcpu0(vcpu0 of SOS) response IPI,
     D.2 pcpu0 handle the ioreq in HV, kernel, DM,
     D.3 pcpu0 mark ioreq as complete,
     D.4 pcpu0 hypercall to enter HV ->
       E.1 pcpu0 send IPI to wake pcpu1 up
       E.2 UOS vcpu0 continue running

With this change, it skips D.4, E.1 steps. In step C, pcpu1 will enter a
polling ioreq state idle after send out the IPI.
It can save about ~5000 cpu cycles.

In polling mode, we do the polling in idle instead of pause cpu all the
time. It will consume more power. A better way is to use monitor/mwait
instructions which can put cpu into a sleep state with monitoring a
memory address. Unfortunately, APL has bug with monitor. We can gather
all ioreqs state into one monitorable memory and take advantage of
monitor/mwait for future platform.

The way polling or notification is per VM. We can config VMs in
different mode. By default, IO request completion will use notification
mode for all VMs. We can switch it by Kconfig.

Tracked-On: #1821
Signed-off-by: Shuo Liu <shuo.a.liu@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-11-21 14:35:12 +08:00
Minggui Cao
e350abe40d HV: handle adding ptdev entry failure cases
handle adding pass-through device entry failure cases,
instead of calling ASSERT, to avoid hypervisor crash.

Tracked-On: #1860
Signed-off-by: Minggui Cao <minggui.cao@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-11-21 12:40:23 +08:00
Binbin Wu
973c616ab3 doc: passthru: add structure and API docs
This patch adds more comments to describe the structures and functions of vtd
that are public to the other components in the hypervisor. The comments are in
doxygen-style for document generation.

Tracked-On: #1595
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Reviewed-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
2018-11-21 09:27:51 +08:00
Binbin Wu
29f9502152 hv: vtd: error handling revisit
1. use error code defined in errno.h instead of 1.
2. panic if error occured while adding devices to VM0 domain.
3. panic if failed to reqeust irq for iommu.

The two panic added would only occurs before any VM starts running.

Tracked-On: #1855
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-11-20 13:30:13 +08:00
Binbin Wu
c449002846 hv: vtd: defer dma remapping enabling until vm creation
In current code, DMA remapping is enabled at very early stage, when there is no
device added.
Devices are added to VT-d context table when creating VMs.
There is potential risk that there may be device DMA transactions when DMA remapping is
enabled, but the device is not added to the VT-d context table. (Eg. this could happen in UEFI
enviroment when USB keyboard use in efi intenal shell.)

This patch defers DMA remapping enabling until vm creation.

Tracked-On: #1855
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-11-20 13:30:13 +08:00
Binbin Wu
42e0e169c3 hv: vtd: init interrupt config when resume
Current code doesn't init interrupt config when resume from S3.
The related register contect will be lost during S3.
This patch re-init these regiters.

Tracked-On: #1855
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-11-20 13:30:13 +08:00
Binbin Wu
830b3aa07c hv: vtd: check vtd enabling status with spinlock
Check vtd translation enabling status when enable/disable translation
inside dmar_enable/disable_translation with spinlock.

Tracked-On: #1855
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-11-20 13:30:13 +08:00
Binbin Wu
a2cb9c2b6a hv: vtd: add do_action_for_iommus
Add an internal API to do action according to action function provided,
which can simplify the code.

Tracked-On: #1855
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
2018-11-20 13:30:13 +08:00
Binbin Wu
32ed3d1a76 hv: vtd: move public API to the bottom part of the file
Move move public API to the bottom part of the file.

Tracked-On: #1855
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-20 13:30:13 +08:00
Binbin Wu
efb249235a hv: vtd: merge lines for a statement if needed.
Becuase the number of character of a line is 120.
Merge lines for a statement if needed.

Tracked-On: #1855
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-20 13:30:13 +08:00
Binbin Wu
e35a8e8cff hv: vtd: typo fix
dmar_uint -> dmar_unit
remove i in line 756 added by accident.

Tracked-On: #1855
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-20 13:30:13 +08:00
Shiqing Gao
119eccfea1 hv: hypercall: clean up HV_DEBUG usage
remove the usage of HV_DEBUG in hypercall.c and vmcall.c

TO-DO:
Enhance Makefile to compile debug/release into 2 libraries

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-20 10:01:50 +08:00
Chen, Gang G
fc9ec5d88f hv: Derive decryption key from Seed for Trusty to decrypt attestation keybox
CSE FW uses an AEK (Attestation keybox Encryption Key) to encrypt the keybox
with AES-256-GCM algorithm before sending it to Android/Trusty. This key is
derived from the latest platform Seed by CSE FW with KDF (key derivation function)
HMAC-SHA256. After Trusty retrieves this encrypted keybox over HECI/MEI driver,
Trusty needs the same AEKkey to decrypt it. Hence, before Trusty launches,
Hypervisor derives the same AEK key from Platform Seed with the same algorithm
and the same derivation parameters, then sends this AEK along with Trusty vSeed
to Trusty world memory.

Since Platform Seed is only visible to Hypervisor and it must not be
sent to any guest VM, only Hypervisor can derive this AEK from this
Platform Seed, just like previous per-Trusty virtual Seed derivation.
Please note that Android Attestation Keybox is shared in a single hardware
platform, so all the Trusty instance/world can get the same AEK for
decryption even if there are multiple Android User OS/VMs running
on top of Hypervisor.

v1 --> v2:
	Add detailed description why we need the patch to derive an extra key

v2 --> v3:
	Convert API descriptions to Doxygen

Tracked-On: #1812
Reviewed-by: Bing Zhu <bing.zhu@intel.com>
Reviewed-by: Kai Wang <kai.z.wang@intel.com>
Signed-off-by: Chen Gang G <gang.g.chen@intel.com>
Acked-by: Bing Zhu <bing.zhu@intel.com>
2018-11-20 09:22:37 +08:00
Zide Chen
8b4f395683 hv: PIO emulation handler is attached to I/O port number only
An I/O handler is not linked to the I/O access size, so in searching for
the registered I/O handler, don't need to check the I/O request's access
size.

In struct vm_io_handler_desc, change fields addr and len to port_start and
port_end respectively to adapt to this change.

Tracked-On: #1815
Signed-off-by: Zide Chen <zide.chen@intel.com>
Reviewed-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-11-19 09:34:34 +08:00
Jason Chen CJ
2c581751de vmx: tiny fix for MACRO name and print format
1. CPU_SEG_WRITE->CPU_SEG_READ: it's actually seg read
2. 0x%hu -> 0x%x: it need print hex format

Tracked-On: #1833
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
2018-11-16 15:30:20 +08:00
dongshen
e56a6b588a HV: For MRB, use 0x3E8/IRQ6 as the vuart port base address/IRQ.
Tracked-On: #1817
Change-Id: Ib2e375a1e23eff1f1326728a023147db48fe4d5c
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
2018-11-16 10:24:48 +08:00
dongshen
3b87e7c67f HV: Add vuart port base address/IRQ Kconfig options
Adding Kconfig option to define the vuart port base address/IRQ.
By default, use 0x3F8/IRQ4. For MRB, use 0x3E8/IRQ6.
We are experiencing problems on NUC after changing from 0x3F8/IRQ4
to 0x3E8/IRQ6.

Tracked-On: #1817
Change-Id: Ie407e51a7bc25ac0bb4c61453c969f1466fa33ca
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
2018-11-16 10:24:48 +08:00
Zheng, Gen
b32e689a64 hypervisor: use "wbinvd" carefully in RT environment
Due to the side-effect to cache of "wbinvd" instruction, just apply it
in case of noncoherent DMA.

Tracked-On: #1824
Signed-off-by: Zheng, Gen <gen.zheng@intel.com>
Reviewed-by: Binbin Wu <binbin.wu@intel.com>
2018-11-16 10:24:23 +08:00
Shuo Liu
61e6c1f054 hv: reset VM ioreqs in reset_vm
ioreqs acrossing VM reset is meaningless. So we reset their status when
VM reset.
Please note, device model and service os need to handle various ioreqs
pending status in emergency reset condition carefully. Otherwises, the
post processing of such ioreqs might overwrite this reset.

Tracked-On: projectacrn#1821
Signed-off-by: Shuo Liu <shuo.a.liu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-16 09:14:26 +08:00
Shuo Liu
8fa16211f6 hv: partition mode also needs free vm id when shutdown vm
Even in partition mode, we also need to clear vmid in vmid_bitmap to
indicate the VM is not present.

Tracked-On: projectacrn#1821
Signed-off-by: Shuo Liu <shuo.a.liu@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-11-15 16:40:43 +08:00
Shiqing Gao
6971cc832a hv: fix '(void) missing for discarded return value'
MISRA-C requires that the function call in which the returned
value is discarded shall be clearly indicated using (void).

This patch fixes the violations related to the following
function calls.
- instr_check_gva
- vlapic_set_local_intr
- prepare_vm
- enter_s3
- emulate_instruction
- ptdev_intx_pin_remap
- register_mmio_emulation_handler

v1 -> v2:
 * discard the return value of enter_s3

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
2018-11-15 10:54:42 +08:00
Shiqing Gao
d97224a4b5 hv: fix integer violations
fix the following integer violations:
1. Signed/unsigned conversion without cast
2. Literal value requires a U suffix
3. Implicit conversion of underlying type

v3 -> v4:
 * change the type of npk_loglevel/mem_loglevel/console_loglevel
   from uint32_t to uint16_t

v2 -> v3:
 * discard the return value of update_ept
 * discard changes related to npk loglevel

v1 -> v2:
 * remove the unnecessary changes related to the false positive
   issues caused by scanning tool
 * change the type of the local variable 'vlapic_id' from uint8_t
   to uint32_t in function 'vlapic_build_id'
 * change the type of the struct member 'flags' in shared_buf from
   uint64_t to uint32_t

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-14 12:46:34 +08:00
Shiqing Gao
0a9d6841f7 hv: instr_emul: clean up mmio_read/mmio_write
clean up mmio_read/mmio_write in instr_emul.c
- make these two functions inline
- discard the return value and add the pre condition
- rename these two functions to vie_mmio_read/vie_mmio_write

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-14 09:18:40 +08:00
Binbin Wu
2c7c909e38 hv: vtd: fix the pre-allocated context table number
In current code, there is an out of range access to the array buses defined in struct struct context_table.
This patch defines CONFIG_IOMMU_BUS_NUM to replace CONFIG_IOMMU_INIT_BUS_LIMIT, which is clearer.
CONFIG_IOMMU_BUS_NUM equals to (CONFIG_IOMMU_INIT_BUS_LIMIT + 1).

Tracked-On: #1807
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-14 09:18:18 +08:00
Shiqing Gao
3731b4c0ac hv: fix '(void) missing for discarded return value'
MISRA-C requires that the function call in which the returned
value is discarded shall be clearly indicated using (void).

This patch fixes the violations related to the following
function calls.
- vlapic_set_intr
- vlapic_intr_edge

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
2018-11-13 19:24:54 +08:00