Commit Graph

663 Commits

Author SHA1 Message Date
Victor Sun
649406b049 HV: refine location of platform_acpi_info header
platform_acpi_info.h should be BOARD specific so move the header file
to configs/$(CONFIG_BOARD)/ folder.

So the target acpi info file detect process is:

Compiler search for $(CONFIG_BOARD)_acpi_info.h under
hypervisor/arch/x86/$(CONFIG_BOARD)/ first (the file is supposed to be
generated by offline tool so it is not included in original source), if
found, then the file is the target acpi info file. If not and at the
same time the ENFORCE_VALIDATED_ACPI_INFO Kconfig was set, the compiler
will stop and hint user to add target acpi info file by offline tool.
If ENFORCE_VALIDATED_ACPI_INFO was unset, then compiler will continue to
search for platform_acpi_info.h as target acpi info file under
hypervisor/arch/x86/$(CONFIG_BOARD) folder (with this file we could bypass
ENFORCE_VALIDATED_ACPI_INFO check and benifit for development). If this
file is not exist, then hypervisor/arch/x86/configs/platform_acpi_info.h
will be included as final target acpi info.

The process should work for UEFI path also, with a valid platform acpi
info file, S3/S5 should work on UEFI platform.

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-08 10:34:14 +08:00
Mingqiang Chi
55f52978db hv:move several tsc APIs to timer.c
-- change 'tsc_khz' to static
-- move these APIs from rtl.h to timer.c
   us_to_ticks()
   ticks_to_us()
   ticks_to_ms()
   rdtsc()

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-07 20:23:22 +08:00
Yan, Like
741501c2e3 hv: refine vlapic_calc_dest()
This commit extracts the common logic of vlapic_calc_dest() and vlapic_calc_dest_lapic_pt()
to static inline functions, in order to make vlapic_calc_dest() clean and easy to read.

Tracked-On: #1842
Signed-off-by: Yan, Like <like.yan@intel.com>
2019-03-06 11:43:51 +08:00
Li, Fei1
ca3d4fca55 hv: vlapic: move LVT IRQ vector check to vlapic_fire_lvt
We could simple the vector check for LVT IRQ by move this check to
vlapic_fire_lvt when the IRQ is fixed mode.

Tracked-On: #1842
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2019-03-05 13:33:36 +08:00
Li, Fei1
473d31c073 hv: vlapic: add vector check for x2apic SELF IPI
Set when the local APIC detects an illegal vector (one in the range 0 to 15)
in the message that it is sending. This occurs as the result of a write to the
ICR (in both xAPIC and x2APIC modes) or to SELF IPI register (x2APIC mode only)
with an illegal vector.

Tracked-On: #1842
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-05 13:33:36 +08:00
Li, Fei1
e5d3a49894 hv: vlapic: call vlapic_accept_intr directly in vlapic_set_error
LVT ERROR is an edge and fixed mode interrupt. We could call vlapic_accept_intr
to fire it directly. Otherwise, if LVT ERR vector is invalid, an invalid
interrupt will be accepted in IRR.

Tracked-On: #1842
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2019-03-05 13:33:36 +08:00
Zide Chen
2b35c07857 hv: do EPT mapping only for physical memory backed GPA on pre-launched VMs
Currently for pre-launched VMs, HV intends to do EPT mapping for all GPA
space, which implies that it wastes HPA to back PCI hole and other vE820
entries that are not backed by physical memory.

This patch solves this issue and fixes ve820 entries whose length is not
aligned to 4K, and changes the lowmem entry's start GPA from 1MB to 2MB.

Tracked-On: #2587
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2019-03-05 10:05:24 +08:00
Shiqing Gao
da14c96135 hv: simplify get_primary_vcpu and vcpu_from_vid
This patch simplifies `get_primary_vcpu` and `vcpu_from_vid`.
The target_vcpu could be get from the index directly.

Tracked-On: #1842
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-04 13:45:02 +08:00
Li, Fei1
3d0d8609cc hv: vlapic: correct wrong use of vector
Correct wrong use of vector where lvt_index should be used.

Tracked-On: #1842
Signed-off-by: Min He <min.he@intel.com>
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2019-03-04 13:44:15 +08:00
Xinyun Liu
0943a836bd [hv] set ECX.bit31 to indicate the presence of a hypervisor
ECS.bit31 is not used and always return 0 in SDM Vol.2A 3-195. It's a
standard way to indicate whether there is a hypervisor.

Tracked-On: #2490
Ref: https://lwn.net/Articles/301888/
Signed-off-by: Xinyun Liu <xinyun.liu@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2019-03-04 13:43:48 +08:00
Victor Sun
0d90515bf6 HV: refine is_lapic_pt
- Do not refer vm_configs[] directly in vm module;

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-01 10:32:49 +08:00
Victor Sun
1bb15c64a6 HV: modularization vm config code
- move sanitize_vm_config() from vm.c to vm_config.c;

- move get_vm_config() from vm.h to vm_config.h;

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-01 10:32:49 +08:00
yuhong.tao@intel.com
3b2784ec1b HV: CAT: support config CAT from acrn_vm_config
When CAT is supported, UOS can setup acrn_vm_config.clos, to use CAT
feature. Eg.,

struct acrn_vm_config vm_configs[CONFIG_MAX_VM_NUM] = {
    {
        .guest_flags |= CLOS_REQUIRED,
        .clos = 1,
    },
};

sanitize_vm_config() will check if CAT is supported and
vm_configs.clos is valid.

Tracked-On: #2462
Signed-off-by: Tao Yuhong <yuhong.tao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-02-28 11:22:29 +08:00
Li, Fei1
2e60adef7c hv: vmcs: simplify update EOI-exit bitmap
1) The previous implementaion will recalculate the whole EOI-exit bitmap for
each RTE once the destination, trigger mode, delivery mode or vector of a RTE
has changed and update the EOI-exit bitmap for each vcpu of the VM.
In this patch, only set the corresponding bit of EOI-exit bitmap for
a vcpu when a level triggered interrupt has accepted in IRR or clear the
corresponding bit of EOI-exit bitmap for a vcpu when a dege triggered interrupt
has accepted in IRR which means only update a bit of EOI-exit bitmap in a vcpu
when updating TMR.
2) Rename set eoi_exit related API to set eoi_exit_bitmap.

Tracked-On: #1842
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-02-27 15:28:37 +08:00
Mingqiang Chi
511d4c158b hv:cleanup console.h
--move several uart API declarations from console.h to uart16550.h
 --move several shell API declarations from console.h to shell.h
 --add dbg_cmd.h, move 'handle_dbg_cmd' declaration from console.h
   to dbg_cmd.h
 --move debug/uart16550.h to include/debug/uart16550.h since some
   uart APIs will be called by external files

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>

	modified:   arch/x86/guest/vm.c
	modified:   arch/x86/init.c
	modified:   bsp/uefi/cmdline.c
	modified:   debug/console.c
	modified:   debug/dbg_cmd.c
	modified:   debug/uart16550.c
	modified:   debug/vuart.c
	modified:   hw/pci.c
	modified:   include/arch/x86/multiboot.h
	modified:   include/debug/console.h
	new file:   include/debug/dbg_cmd.h
	new file:   include/debug/shell.h
	renamed:    debug/uart16550.h -> include/debug/uart16550.h
2019-02-27 11:12:48 +08:00
Zide Chen
94e1227559 hv: code style fix for partition mode specific code
There are still some misra-c violations when CONFIG_PARTITION_MODE is defined.

arch/x86/configs:
- remove the unused macro: PRE_LAUNCH_VM_NUM
- pt_dev.c: VMx_CONFIG_PCI_PTDEV_NUM has been defined in partition_config.h,
  should not hard code them again in pt_dev.c.
- ve820.c: use "UL" suffix instead of "U" for 64 bits variables.

vmid is uint16_t in ACRN, so vuart_vmid should be uint16_t as well.

Fix another few other miscellaneous misra-c violations.

Tracked-On: #861
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-02-26 14:00:32 +08:00
Li, Fei1
987ddafa6b hv: vlapic: refine apicv_post_intr to internal function
Rename vlapic_post_intr to apicv_post_intr and move it to internal function
since it's only used in vlaic.c.

Tracked-On: #1842
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2019-02-25 14:17:27 +08:00
Li, Fei1
5dd6e79fe7 hv: vlapic: refine vlapic_enabled to internal function
Since it's only used in vlaic.c

Tracked-On: #1842
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-02-25 14:17:27 +08:00
Li, Fei1
e218efd576 hv: vm: move vm_active_cpus to vm.h
Move vm_active_cpus from vlapic.c to vm.h since it's vm related
not vlapic related.

Tracked-On: #1842
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-02-25 14:17:27 +08:00
Mingqiang Chi
ac7a8a7249 hv:merge MACROs E820_MAX_ENTRIES and NUM_E820_ENTRIES
merge E820_MAX_ENTRIES and NUM_E820_ENTRIES
to E820_MAX_ENTRIES.

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
2019-02-22 13:14:36 +08:00
Binbin Wu
02ae775bfa hv: pae: fix a issue of loading pdptrs when handle cr4
PDPTE registers should be loaded in PAE paging mode.
However, current code load PDPTE registers in long mode.

Tracked-On: #2561
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-02-21 18:54:22 +08:00
Binbin Wu
253852419a hv: pae: fix bug when calculate PDPT address
There are two bugs related to PDPT address calculation for PAE mode.

1. Current code doesn't ignore the "Ignored" fileds when load pdpt registers.
Mask the "Ignored" fileds according to SDM Figure 4-7 Vol3.

2. Current code only ignores 4bits instead of 5bits in low "Ignored" filed when
calculate PDPT address in PAE mode for guest memory address translation.

Tracked-On: #2561
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-02-21 18:54:22 +08:00
Mingqiang Chi
b24a8a0f59 hv:cleanup header file for guest folder
cleanup arch/x86/guest, only include some necessary
header files, doesn't include hypervisor.h

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
	modified:   arch/x86/guest/assign.c
	modified:   arch/x86/guest/ept.c
	modified:   arch/x86/guest/guest_memory.c
	modified:   arch/x86/guest/instr_emul.c
	modified:   arch/x86/guest/io_emul.c
	modified:   arch/x86/guest/pm.c
	modified:   arch/x86/guest/trusty.c
	modified:   arch/x86/guest/ucode.c
	modified:   arch/x86/guest/vcpu.c
	modified:   arch/x86/guest/vcpuid.c
	modified:   arch/x86/guest/virq.c
	modified:   arch/x86/guest/virtual_cr.c
	modified:   arch/x86/guest/vlapic.c
	modified:   arch/x86/guest/vm.c
	modified:   arch/x86/guest/vmcall.c
	modified:   arch/x86/guest/vmcs.c
	modified:   arch/x86/guest/vmexit.c
	modified:   arch/x86/guest/vmsr.c
	modified:   arch/x86/guest/vmtrr.c
	modified:   arch/x86/pm.c
	modified:   include/arch/x86/guest/assign.h
	modified:   include/arch/x86/guest/ept.h
	modified:   include/arch/x86/guest/guest_memory.h
	modified:   include/arch/x86/guest/instr_emul.h
	modified:   include/arch/x86/guest/io_emul.h
	modified:   include/arch/x86/guest/trusty.h
	modified:   include/arch/x86/guest/vcpu.h
	modified:   include/arch/x86/guest/vmcs.h
	modified:   include/arch/x86/io_req.h
	modified:   include/arch/x86/irq.h
	modified:   include/arch/x86/lapic.h
	modified:   include/arch/x86/mmu.h
	modified:   include/arch/x86/pgtable.h
	modified:   include/common/ptdev.h
	modified:   include/debug/console.h
2019-02-21 10:38:30 +08:00
Mingqiang Chi
75f6cab554 hv:cleanup header file for per_cpu.h
remove hypervisor.h from per_cpu.h

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
2019-02-21 10:38:30 +08:00
Mingqiang Chi
04c30fb380 hv:move 2 APIs from hypervisor.h to guest_memory.c
move gva2hva() & hva2gpa() to guest_memory.c,
we will remove hypervisor.h in the future.

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
2019-02-21 10:38:30 +08:00
Binbin Wu
827fffedda hv: exception: fault type exception should set resume flag in rflags
According to SDM 17.3.1.1, for any fault-class exception except a
debug exception generated in response to an instruction breakpoint,
the value pushed for RF is 1.

This patch set Resume Flag for fault class exceptions.

Tracked-On: #2405
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-02-20 13:21:45 +08:00
Peter Fang
caab595ed4 hv: vlapic: properly initialize DCR
DCR is initialized to 0 which means divisor shift is 1. Currently, both
are initialized to 0 which result in incorrect APIC timer counts if the
vLAPIC's DCR is never programmed.

This bug was exposed by OVMF because OVMF does not program DCR during
LAPIC initialization.

Tracked-On: #2543
Signed-off-by: Peter Fang <peter.fang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-02-19 09:43:55 +08:00
Binbin Wu
2fd6e119ca hv: vmcall: hv should not change guest RAX vmcall is undefined
HV passes the return value of vmcall by register RAX unconditionally.
However, if the vmcall is undefined for a guest, RAX value of guest vcpu
should not be changed.

According to SDM Vol. 3C 30-9, VMCALL is allowed from any CPL in guest.
VMCALL is NOT allowed from  CPL > 0 in vmx root mode.
ACRN hypervisor doesn't call VMCALL in vmx root mode, though.

In current code, ACRN also deny VMCALL from CPL > 0 in guest.
So for this case, #GP will not be injected, instead, modify the RAX to
notify the return value.

Tracked-On: #2405
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-02-18 11:56:42 +08:00
Binbin Wu
3e0c0550a4 hv: vmcall: unsupported vmcall from UOS should be handle first.
ACRN HV hide VMX capability from guest. Only vmcall from SOS or some
specific vmcall from UOS are allowed.
Unsupported vmcall from UOS should be considered a "not in VMX operation" case,
and should be handled first according to SDM Vol. 3C 30-9.

Tracked-On: #2405
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-02-18 11:56:42 +08:00
Arindam Roy
f660d9cf80 HV: Remove snoopy_mem from iommu
Removed the remaining reference of acrn vm from
inside of vtd.c.
Removed usage of snoopy_mem, and added code to achieve
the same using iommu_snoop.
Initialize iommu_snoop to true in create deault iommu.

Tracked-On: #2496
Signed-off-by: Arindam Roy <arindam.roy@intel.com>
2019-02-14 10:16:21 +08:00
Arindam Roy
de8d85753e HV: Modularize vtd.c to remove acrn_vm usage
This patch is a modified one. It removes the usage
of acrn_vm struct from inside vtd.c.
It also puts struct iommu_domain inside vtd.h,
from vtd.c.
It modifies the signature of init_iommu_domain
in order to remove dependency on acrn_vm from
inside vtd.c.
Incorporated comments from Jason and Eddie.
Changed the name of sos_vm_domain to
fallback_iommu_domain
Removed any reference of sos_vm from vtd.[c|h]
files, including comments.

Tracked-On: #2496
Signed-off-by: Arindam Roy <arindam.roy@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
2019-02-06 08:53:46 +08:00
Mingqiang Chi
229fbdd81d hv:cleanup header file for vcpu.c & vcpu.h
For vcpu.c and vcpu.h,only include some necessary
header files, doesn't include hypervisor.h

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-02-03 13:50:42 +08:00
Mingqiang Chi
3d878a9123 hv:cleanup header file for vm.c & vm.h
-- now hypervisor.h is the universal set of header file,
   this patch doesn't include hypervisor.h, only include
   some necessary header files for vm.c and vm.h
-- move 'struct vcpuid_entry' from vm.h to vcpuid.h
-- remove dead code 'enum vm_privilege_level'
-- move 'enum vpic_wire_mode' from vm.h to vpic.h

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-02-03 13:50:42 +08:00
Shiqing Gao
b5f4757650 hv: refine guest.h
- move functions related vmexit from `guest.h` to `vmexit.h`
- move functions related msr from `guest.h` to `msr.h`
- move functions related vm_sw_loader from `guest.h` to `vm.h`
- move function `vmx_vmrun` from `guest.h` to `vcpu.h`
- move MACROs related to vcpu from `guest.h` to `vcpu.h`
- move MACRO `E820_MAX_ENTRIES` from `guest.h` to `e820.h`
- move MACROs related to irq from `guest.h` to `irq.h`
- rename `guest.h` to `guest_memory.h`

Tracked-On: #2503
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-02-03 13:00:42 +08:00
Mingqiang Chi
af1e5d5742 hv:remove several redundancy variables related memory
Remove redundancy code since they are not used now.
-- remove 'max_ram_blk_base' & 'max_ram_blk_size' in
   struct e820_mem_params
-- remove 'gpa_lowtop' in struct vm_hw_info
-- remove MACRO 'UOS_DEFAULT_START_ADDR'

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-02-02 22:59:34 +08:00
Victor Sun
0f745b4d15 HV: e820 refinement
- add e820 info in struct acrn_vm;

- rename rebuild_sos_vm_e820() to create_sos_vm_e820();

- add create_prelaunched_vm_e820() for partition mode;

- rename create_e820_table() to create_zeropage_e820() and merge for
  both sharing mode and partition mode;

- move create_xxx_vm_e820() to vm.c;

- move create_zeropage_e820() to vm_load.c;

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-02-02 11:53:37 +08:00
Li, Fei1
ce19dd423e hv: vlapic: make vlapic deliver interrupt related functions more readable
Rename vlapic_deliver_intr to vlapic_receive_intr: ioapic/msi device
deliver an interrupt to lapic.
Rename vlapic_pending_intr to vlapic_find_deliverable_intr: find a
deliverable interrupt which pending in irr and its priority large than ppr.
Rename vlapic_intr_accepted to vlapic_get_deliverable_intr: get the deliverable
interrupt from irr and set it in isr (which also raise ppr update)

Tracked-On: #1842
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2019-02-02 09:31:49 +08:00
Yonghua Huang
123c2b5fa4 hv: rename MACROs 'VMX_CRx_MASK"
CRx 'guest/host mask' is widely used when talking
  about CR0/CR4 virtualization in SDM spec,
  rename them to 'VMX_CRx_GUEST_HOST_MASK'.

Tracked-On: #861
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-02-01 16:49:39 +08:00
Shiqing Gao
49623fc073 hv: refine guest.c
- move `vcpumask2pcpumask` from `guest.c` to `vcpu.c`
- move `prepare_sos_vm_memmap` from `guest.c` to `vm.c`
- rename `guest.c` to `guest_memory.c`

Tracked-On: #2484
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-02-01 16:30:55 +08:00
Sainath Grandhi
970821462b hv: Use Interrupt Remapping format for programming interrupt sources
When a corresponding IOMMU is found for the device, this patch adds
support to program Interrupt Remapping hardware RTEs and the original
interrupt sources (MSI or IOAPIC) with IR format.

Tracked-On: #2426
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
Reviewed-by: Binbin Wu <binbin.wu@intel.com>
2019-02-01 15:54:55 +08:00
Yonghua Huang
0f5c6e2c18 HV: fix address type violation for MSR_LOAD/STORE
According to SDM 24.7.2, these two MSRs should be
  configured with physical address.

Tracked-On: #861
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-31 22:23:41 +08:00
Yan, Like
17f4cd18a3 hv: fix dest of IPI for CPU with lapic_pt
With lapic_pt based on vlapic, guest always see vitual apic_id.
We need to convert the virtual apic_id from guest to physical apic_id
before writing ICR.

SMP for VM with lapic_pt is supported with this fix.

Tracked-On: #2351
Signed-off-by: Yan, Like <like.yan@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-31 18:18:44 +08:00
Tw
39ffd29aa3 schedule: add magic number at the bottom of schedule stack
Add this magic number to prevent potential overflow when dumping
host stack.

Tracked-On: #2455
Signed-off-by: Tw <wei.tan@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-31 11:28:29 +08:00
Li, Fei1
2474c60141 hv: replace improper use of panic with ASSERT
Panic should only be used when system booting. Once the system boot done,
it could never be used. While ASSERT could be used in some situations, such
as, there are some pre-assumption for some code, using ASSERT here for debug.

Tracked-On: #861
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@inte.com>
2019-01-31 11:09:39 +08:00
Mingqiang Chi
7da9161d7d hv:no need to use lock for the bit operations of local variable
Use bitmap_set_nolock/bitmap_clear_nolock instead of
bitmap_set_lock/bitmap_clear_lock for the local variable.

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-31 08:25:33 +08:00
Mingqiang Chi
2b2dbe43d7 hv:move some files to guest folder
move the following files to guest folder:
renamed:    arch/x86/assign.c -> arch/x86/guest/assign.c
renamed:    arch/x86/ept.c -> arch/x86/guest/ept.c
renamed:    arch/x86/io_emul.c -> arch/x86/guest/io_emul.c
renamed:    arch/x86/trusty.c -> arch/x86/guest/trusty.c
renamed:    arch/x86/virq.c -> arch/x86/guest/virq.c
renamed:    arch/x86/virtual_cr.c -> arch/x86/guest/virtual_cr.c
renamed:    arch/x86/vmcs.c -> arch/x86/guest/vmcs.c
renamed:    arch/x86/vmexit.c -> arch/x86/guest/vmexit.c
renamed:    arch/x86/vmx_asm.S -> arch/x86/guest/vmx_asm.S
renamed:    include/arch/x86/assign.h ->
	    include/arch/x86/guest/assign.h
renamed:    include/arch/x86/io_emul.h ->
	    include/arch/x86/guest/io_emul.h
renamed:    include/arch/x86/trusty.h ->
            include/arch/x86/guest/trusty.h
renamed:    include/arch/x86/virtual_cr.h ->
            include/arch/x86/guest/virtual_cr.h
renamed:    include/arch/x86/vmcs.h -> include/arch/x86/guest/vmcs.h
renamed:    include/arch/x86/vmexit.h ->
            include/arch/x86/guest/vmexit.h

After these files movement, all the files in arch/x86 are native
hardware related, and all the files in arch/x86/guest are
virtualiztion related.

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
2019-01-30 20:43:04 +08:00
Minggui Cao
723ff1f4ee HV: modularization improve UEFI macro control code
1. in UEFI bsp code, not need UEFI macro; it is controlled in makefile.
2. in vm/acpi/interrupt code, unify the API name for SBL & UEFI.
3. remove unnecessary header including and unused code.

Tracked-On: #1842
Signed-off-by: Minggui Cao <minggui.cao@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
2019-01-30 16:11:39 +08:00
Binbin Wu
c6d2908f70 hv: vmexit: add handler for vmexit not supported for guest
Acrn doesn't support nested virtualization, so vmx operations should be
undefined opcode for guest.
Current code handle vmx operations with unhandled_vmexit_handler.
According to the spec, if guest execute vmx operation instruction, a #UD
exception should be inject.
This patch inject a #UD exception when guest execute vmx operation instruction.

Tracked-On: #2405
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2019-01-29 13:13:38 +08:00
Mingqiang Chi
cc2c0c3a9a hv:Move several inline APIs from vm.h to *.c
-- move vm_pic() from vm.h to vpic.c since it is
   only used in vpic.c
-- move vm_ioapic() from vm.h to vioapic.c
   change vioapic_reset(struct acrn_vioapic *vioapic) -->
          vioapic_reset(struct acrn_vm *vm)
   then vm_vioapic() is only used in vioapic.c
-- move vm_vuart() from vm.h to vuart.c,
   now this api is used in vuart.c and shell.c

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
2019-01-29 11:29:59 +08:00
Yan, Like
b038ade21c hv: fix misra-c violations in reused partition mode functions
Fixed violations in vlapic_x2apic_pt_icr_access()
- Procedure has more than one exit point;
- Value is not of appropriate type;
- Narrower init conversion without cast;
- Implicit conversion: actual to formal param (MR)
Fixed violation in switch_apicv_mode_x2apic()
- No space between if, while, for and expresn.

Tracked-On: #861
Signed-off-by: Yan, Like <like.yan@intel.com>
2019-01-29 09:50:07 +08:00