Commit Graph

1134 Commits

Author SHA1 Message Date
Junjie Mao
87f2d4c042 HV: vlapic: add suffix 'U' when necessary
For constants used in unsigned contexts, a 'U' suffix is required per MISRA C
standard.

Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Dong Eddie <eddie.dong@intel.com>
2018-07-13 10:02:44 +08:00
Arindam Roy
1af8586cd1 HV: Fix missing brackets for MISRA C Violations
Patch 7 of 7.
Added changes to make sure Misra C violations are fixed
for rules 11S and 12S.

Signed-off-by: Arindam Roy <arindam.roy@intel.com>
2018-07-13 09:09:12 +08:00
Arindam Roy
af806a93bd HV: Fix missing brackets for MISRA C Violations
Patch 6 of 7.
Added changes to make sure Misra C violations are fixed
for rules 11S and 12S.

Signed-off-by: Arindam Roy <arindam.roy@intel.com>
2018-07-13 09:09:12 +08:00
Arindam Roy
4aa6cdacf7 HV: Fix missing brackets for MISRA C Violations
Patch 5 of 7
Added changes to make sure Misra C violations are fixed
for rules 11S and 12S.

Signed-off-by: Arindam Roy <arindam.roy@intel.com>
2018-07-13 09:09:12 +08:00
Arindam Roy
d16d9e5751 HV: Fix missing brackets for MISRA C Violations
Patch 4 of 7.
Added changes to make sure Misra C violations are fixed
for rules 11S and 12S.

Signed-off-by: Arindam Roy <arindam.roy@intel.com>
2018-07-13 09:09:12 +08:00
Arindam Roy
82e0cdb808 HV: Fix missing brackets for MISRA C Violations
Patch 3 of 7.
Added changes to make sure Misra C violations are fixed
for rules 11S and 12S.

Signed-off-by: Arindam Roy <arindam.roy@intel.com>
2018-07-13 09:09:12 +08:00
Arindam Roy
dbfd0e5b67 HV: Fix missing brackets for MISRA C Violations
Patch 2 of 7.
Added changes to make sure Misra C violations are fixed
for rules 11S and 12S.

Signed-off-by: Arindam Roy <arindam.roy@intel.com>
2018-07-13 09:09:12 +08:00
Arindam Roy
88a3205d3c HV: Fix missing brackets for MISRA C Violations
Patch 1 of 7.
Added changes to make sure Misra C violations are fixed
for rules 11S and 12S.

Signed-off-by: Arindam Roy <arindam.roy@intel.com>
2018-07-13 09:09:12 +08:00
David B. Kinder
b4a6b93d5c doc: add v0.1 doc choice
Normal publication is to the /latest/ folder.  With the tagged 0.1
release, we now have an alternative frozen version of the docs.

Also, tweaked the code for collecting version information from the
VERSION file to create document version number, and Makefile needed to
create the publish directory for a new tagged version.

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2018-07-12 07:20:36 -07:00
Jack Ren
3fe0fed122 version: 0.2-unstable
Signed-off-by: Jack Ren <jack.ren@intel.com>
2018-07-12 12:14:33 +00:00
Binbin Wu
b4fb261b18 hv: fix bug in some embedded assembly code in vmx
The patch fixes the issue when SOS can't boot using HV release version.

In current code, the assembly code for "sgdt" & "sidt" is not right.
The operand is output, not input.

Also, current code use "rdmsr" instruction to read MSR_IA32_SYSENTER_CS,
which doesn't sepcify the clobbered registers it uses.
This patch uses API msr_read to read MSR_IA32_SYSENTER_CS.

Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Reviewed-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-12 17:32:51 +08:00
Yonghua Huang
83361018b5 DM: Fix potential buffer overflow and uninitialized variable
- @'rpmb_check_frame()', avoid buffer overflow access
    when calling 'memcmp()'

Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
2018-07-12 17:32:20 +08:00
Shiqing Gao
194fd8ba1e hv: irq: fix 'Pointer arithmetic is not on array'
- Define the array for 'struct irq_desc' with its size
  The array size for 'struct irq_desc' is constant and will not be
   changed.

- Use array rather than a pointer to avoid the pointer arithmetic.

Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
2018-07-12 17:32:09 +08:00
Victor Sun
401ffd1e39 HV: pm: cleanup for misra integral type violations
The patch fixes integral type related violations on HV pm part.

Signed-off-by: Victor Sun <victor.sun@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
2018-07-12 17:31:11 +08:00
Qi Yadong
202bc541b6 HV: trusty: revise trusty_boot_param structure
Per new design of trusty memory allocation: VHM will reserve contiguous
memory for trusty when DM launch guest with trusty enabled. And OSloader
will relocate trusty to 511G directly and pass trusty's base/entry to HV
by trusty_boot_param when call HC_INIITIALIZE_TRUSTY.

So in this patch:
  1. Extend trusty_boot_param to support addr/entry above 4G.
  2. Remove size check for old version compatibility.

Signed-off-by: Qi Yadong <yadong.qi@intel.com>
Acked-by: Zhu Bing <bing.zhu@intel.com>
2018-07-12 17:30:26 +08:00
Liu, Xinwu
b30ba3db15 tools:acrn-crashlog: Detect and classify the crash in ACRN and kernel
Since ACRN has the capability to reboot and reboot reason is available
in SOS, acrnprobe could detect the crash of acrn and SOS kernel.

List of added crash types:

1. ACRNCRASH            - crashed in hypervisor, this detection depends on
                          files in /tmp/acrnlog_last(provided by acrnlog).
2. IPANIC               - crashed in SOS kernel, this detection depends on
                          pstore.
3. SWWDT_IPANIC         - crashed in SOS kernel and reboot reason is wdt.
4. HWWDT_UNHANDLE       - only recognize reboot reason is global, there is no
                          further clues that it's a SOS kernel crash or a
                          hypervisor crash.
5. SWWDT_UNHANDLE       - only recognize reboot reason is wdt, there is no
                          further clues that it's a SOS kernel crash or a
                          hypervisor crash.
6. UNKNOWN              - only recognize reboot reason is warm, there is no
                          further clues that it's a SOS kernel crash or a
                          hypervisor crash.

Signed-off-by: Liu, Xinwu <xinwu.liu@intel.com>
Acked-by: Chen Gang <gang.c.chen@intel.com>
2018-07-12 17:29:51 +08:00
Liu, Xinwu
a5853d6d8a tools:acrn-crashlog: Improve the process of crash reclassify
1. Reload the trigger file(s) of subcrash while doing crash reclassify.
2. Support simple format for trigger file.

Signed-off-by: Liu, Xinwu <xinwu.liu@intel.com>
Acked-by: Chen Gang <gang.c.chen@intel.com>
2018-07-12 17:29:51 +08:00
Liu, Xinwu
0683b16573 tools:acrn-crashlog: Get reboot reason in acrnprobe
Get system reboot reason from kernel commandline.

Signed-off-by: Liu, Xinwu <xinwu.liu@intel.com>
Acked-by: Chen Gang <gang.c.chen@intel.com>
2018-07-12 17:29:51 +08:00
Mingqiang Chi
2d03706dd5 hv:change shell_puts to void type
Change this function to void type
Remove some parameters check, add these checks as preconditions

Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
2018-07-12 17:28:16 +08:00
Minggui Cao
4cab8b9cc5 HV: code cleanup as MISRA-C report for guest/vmsr
like: constant of unsigned int need add U/UL as surfix.
enum value can't use to give or compare with int directlly.
unsigned and signed mis-matched

Signed-off-by: Minggui Cao <minggui.cao@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-07-12 17:27:53 +08:00
Ying Liu
8c43ad54bf HV: add the missing brackets to loop body
MISRA-C requires the use of brackets, even when there is only one
statement in the loop body.

Signed-off-by: Ying Liu <ying2.liu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-12 17:27:29 +08:00
Ying Liu
fd81655e60 HV: add the missing brackets to loop body
MISRA-C requires the use of brackets, even when there is only one
statement in the loop body.

Signed-off-by: Ying Liu <ying2.liu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-12 17:27:29 +08:00
Kaige Fu
df038fc0db HV: vmx: Change variable field to uint32_t
With field defined as uint64_t, there are some implicit type conversions when
calling exec_vmwrite/read functions which takes a uint32_t for the first parameter.

This patch fixes it by change field to uint32_t.

v1 - > v2:
  - Keep the field as it is and change the defination of field to uint32_t.

Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
2018-07-12 17:26:42 +08:00
Jack Ren
43e4bd4f7a version: v0.1
Signed-off-by: Jack Ren <jack.ren@intel.com>
2018-07-12 09:12:40 +00:00
David B. Kinder
11e997a70e doc: update release v0.1 release notes
Include developer comments, add commit change log,
update conf.py to include url shortcuts for references to GitHub issues
and commits.

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2018-07-11 20:48:01 -07:00
Geoffroy Van Cutsem
5a7ccc87b1 Dockerfile: remove security by-pass in Clear Linux Dockerfile
"RUN git config --global http.sslVerify false" was needed with
a cloud-based CI system else it failed to clone the repository.

The project does not use that cloud-based CI system and hence
this workaround (security by-pass) is not needed.

Signed-off-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
2018-07-11 21:35:31 +08:00
Xiangyang Wu
4dc39fdb8e HV:treewide:Add 16-bit atomic operations and update vpid type
There are some integer type conversions reported by static
analysis tool for vcpu id, number of created vcpus, and
vpid, to reduce these type conversions, redesign vcpu id,
number of created vcpus, and vpid type as uint16_t as per
their usage, related 16-bit atomic operations shall be
added in HV.
MISRA C requires that all unsigned constants should have the suffix 'U'
(e.g. 0xffU), but the assembler may not accept such C-style constants.

Add 16-bit atomic add/dec/store operations;
Update temporary variables type and parameters type of
related caller;
Update vpid type as uint16_t;
Replace Macro with constant value for CPU_PAGE_SIZE.

Note: According to SDM A.10, there are some bits defined
in the IA32_VMX_EPT_VPID_CAP MSR to support the INVVPID
instruction, these bits don't mean actual VPID, so
the vpid field in the data struct vmx_capability doesn't
be updated.

V1--V2:
	update comments for assembly code as per coding style;

Signed-off-by: Xiangyang Wu <xiangyang.wu@intel.com>
2018-07-11 21:27:08 +08:00
Junjie Mao
a23549aa91 HV: build: make relocation-related code configurable
The relocation feature relies on the ld option "-z noreloc-overflow" which is
only available for binutils >= 2.27, while on Ubuntu 16.04 or older the default
version of binutils is 2.26.

This patch wraps the relocation code with a configurable macro and make it
undefined by default to avoid default build failures.

NOTE: This is just a hotfix. The code dropped with undefined CONFIG_RELOC needs
to be reviewed by the original author of this feature. Checks to the binutils
version will also follow up.

Signed-off-by: Junjie Mao <junjie.mao@intel.com>
2018-07-11 19:18:26 +08:00
Abdul Rehman
057a384f8e HV: bug fix update RTE if trigger mode or polarity is updated
Signed-off-by: Abdul Rehman <abdulrehmanee010@gmail.com>
2018-07-11 11:12:03 +08:00
Mingqiang Chi
a9d04cc5ce [REVERT-ME]:handle discontinuous hpa for trusty
This is a temp solution to handle discontinuous hpa
when create/destroy secure world ept.

Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
2018-07-11 11:11:24 +08:00
Yonghua Huang
5603afb2be HV: remove execute access attribute in trusty EPT table
- this patch is to prevent secure world(trusty) from
   fetching instructin from normal world memory.

 - copy valid PDPTEs from normal world EPT to secure
   world EPT, and remove 'IA32E_EPT_X_BIT' attribute in
   these entries.

Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-11 10:26:33 +08:00
Shiqing Gao
4446864eff hv: fix 'Pointer arithmetic is not on array'
Violation 'Pointer arithmetic is not on array' occurs in following
statement:
        *flags |= fl[pos - flagchars];

char flagchars[] is a well defined array.
It could be used directly to avoid the pointer arithmetic.

v1 -> v2:
 * use uint32_t rather than uint8_t for the index in order to let the
    type aligned with sizeof(flagchars)
 * add brackets to the then-block

Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
2018-07-11 10:26:10 +08:00
Zide Chen
5cb9972919 hv: cleanup cpu.c and cpu.h
- move all relocatoin code from cpu.c and cpu.h to reloc.c and reloc.h
- no any logic changes

Signed-off-by: Zide Chen <zide.chen@intel.com>
Reviewed-by: Yin fengwei <fengwei.yin@intel.com>
2018-07-11 10:25:16 +08:00
Zide Chen
6c9e451b41 hv: EFI can load Hypervisor to address other than COMNFIG_RAM_START
- UEFI: change __emalloc() function to allocate from any available memory
  under 4G
- Define CONFIG_RAM_START to the lowest possible address 1M, making sure
  HV can only be relocated to higher address

Signed-off-by: Zheng Gen <gen.zheng@intel.com>
Signed-off-by: Zide Chen <zide.chen@intel.com>
Reviewed-by: Yin fengwei <fengwei.yin@intel.com>
2018-07-11 10:25:16 +08:00
Zide Chen
84d9da1d6a hv: build hypervisor as PIE (position-independent executable)
Build and link hypervisor with "-pie" and remove static linking so that
it generates .rela sections for relocation

Signed-off-by: Zheng Gen <gen.zheng@intel.com>
Signed-off-by: Zide Chen <zide.chen@intel.com>
Reviewed-by: Yin fengwei <fengwei.yin@intel.com>
2018-07-11 10:25:16 +08:00
Zide Chen
92cd2612fc hv: fixup addresses in the c code for relocation
- Trampoline code doesn't have the same relocation delta with HV,
  Need to manually patch them when referenced from HV
- replace all references to CONFIG_RAM_START with the actual HV load
  address

Signed-off-by: Zheng Gen <gen.zheng@intel.com>
Signed-off-by: Zide Chen <zide.chen@intel.com>
Reviewed-by: Yin Fengwei <fengwei.yin@intel.com>
2018-07-11 10:25:16 +08:00
Zide Chen
bc8b3a40f8 hv: fixup addresses in the assembly code for relocation
In cpu_primary.S
- Assign %rsp in cpu_primary_start_64(), so we can call _relocate()
  before any references to the symbols that need to be patched
- Move lidtq instruction and the IDT fixup code after _relocate() call
- In code64 part, replace 'mov' with 'lea' for correct addressing
- No relocation is needed in code32 part

In trampoline.S:
- add trampoline_spinlock_ptr pointer, so we may be able to fixup
  trampoline code in HV

Signed-off-by: Zheng Gen <gen.zheng@intel.com>
Signed-off-by: Zide Chen <zide.chen@intel.com>
Reviewed-by: Yin Fengwei <fengwei.yin@intel.com>
2018-07-11 10:25:16 +08:00
Zide Chen
ca728fb3c5 hv: add code to fixup ELF relocation sections
For UEFI boot, currently EFI application loads hypervisor to the
hard coded COMNFIG_RAM_START, which may cause it fail to boot if
this address is not available in the target.

This patch series resolve this issue by allocating memory for hypervisor
at run time, and do relocation fixup if the allocated address is
different from the base address that the hypervisor is built.

The summary of the first patch [1/6] in this series:

In x86_64 ELF, .rela sections hold information of symbols which must be
relocated before being referenced.

This patch adds code to fixup .rela sections with the relocated offset,
also, it provides utilities to assist address fixup

Signed-off-by: Zheng Gen <gen.zheng@intel.com>
Signed-off-by: Zide Chen <zide.chen@intel.com>
Reviewed-by: Yin Fengwei <fengwei.yin@intel.com>
2018-07-11 10:25:16 +08:00
Kaige Fu
b52be90a2f tools: acrntrace: Fix wrong event id in vmexit_analyze.py
Value of VMEXIT_XXX must have the same as TRACE_VMEXIT_XXX defined in
./hypervisor/include/debug/trace.h. This patch fix the events with wrong event id.

Fixes: 8a233ee (tools: acrntrace: Refactor vmexit_analyzer based on new trace format)

Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Reviewed-by: Yan, Like <like.yan@intel.com>
2018-07-11 09:24:44 +08:00
Kaige Fu
636515aac2 tools: acrntrace: Remove use of binary "mkdir"
The tools currently rely on the availability of binary "mkdir" to be available
in the $PATH on the Service OS. This creates an obscure dependency. The patch
changes the code to use standard C APIs to perform the same functionality which
makes the code more self-contained.

Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Reviewed-by: Yan, Like <like.yan@intel.com>
2018-07-11 09:24:07 +08:00
Kaige Fu
e699462161 tools: acrntrace: Remove use of binary "ls"
The tools currently rely on the availability of binary "ls" to be available in
the $PATH on the Service OS. This create an obscure dependency. The patch changes
the code to use standard C APIs to perform the same functionality which makes
the code more self-contained.

Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Reviewed-by: Yan, Like <like.yan@intel.com>
2018-07-11 09:24:07 +08:00
Kaige Fu
a2a412244c tools: acrntrace: Remove unused function get_cpu_freq
Function get_cpu_freq is not used anymore. This patch remove it.

Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Reviewed-by: Yan, Like <like.yan@intel.com>
2018-07-11 09:24:07 +08:00
Xiangyang Wu
f81fcf2f07 HV:MM:add 'U/UL' suffix for unsigned contant value
In the current memory module, there are many constatn value
without U/UL suffix, it is reported as MISRA C violations by
static analysis tool.

Add 'U/UL' suffix for unsigned contant value in memory module
as needed.

Note:In the most case, CPU_PAGE_SIZE(0x1000) is used as
unsigned integer contant value, so CPU_PAGE_SIZE is defined
as unsigned integer contant value, and it is safety converted
into unsigned long type according to MISRA C standard.

Signed-off-by: Xiangyang Wu <xiangyang.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-11 09:23:03 +08:00
David B. Kinder
b25caad29e doc: add API-GVT-g high level design doc
Transcode and publish HLD document.  Moved glossary terms to the
project-wide glossary.

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2018-07-10 16:42:22 -07:00
David B. Kinder
2c706b21a1 doc: add ACPI virtualization HLD
Transcribe and publish the reviewed ACPI virtualization HLD as another
developer guide.

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2018-07-10 14:18:07 -07:00
David B. Kinder
1707fc370a doc: add memory management HLD
Transcribe and publish the reviewed memory managment HLD into the ACRN
doc set as a developer guide

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2018-07-10 10:29:43 -07:00
Jason Chen CJ
b3690987bd [REVERT-ME]: disable turbo mode
there is a bug for system hang on SBL bootloader after we enabled turbo mode.
so add tmp patch to disable turbo mode as the work-around.
after SBL fixed it, we revert this patch.

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-10 16:37:40 +08:00
Mingqiang Chi
3fed57bb9f hv:fix return value violation in prepare_vm0
Check the return value for prepare_vcpu/start_vm

Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-10 16:36:05 +08:00
Mingqiang Chi
f01e6efdf5 hv:fix return value violation in vmexit handler
Check return value for the called functions in vmexit handler

Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-10 16:35:20 +08:00
Mingqiang Chi
2686fe76bc hv: no need to return error when inject GP
GP fault is a normal case,no need to return error.

Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-10 16:35:20 +08:00