Commit Graph

137 Commits

Author SHA1 Message Date
Yang, Yu-chu
91337da5a1 HV: logical and high level precedence expression needs brackets
Added brackets for expression to make it easy to understand and
reduce the mistake of precedence. The rule is applied to the
mixed same level of prevedence opeartors, high level presedence
operators and logical expression.

Signed-off-by: Yang, Yu-chu <yu-chu.yang@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-07-24 10:10:39 +08:00
Huihuang Shi
c0b55cdf1b HV:vtd:fix all integer related violations
Fix vtd.h and vtd.c all integer violations.

Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
2018-07-23 10:22:32 +08:00
Huihuang Shi
a17653b3cc HV:transfer DMAR_[GS]ET_BITSLICE to inline function
Transfer DMAR_[GS]ET_BITSLICE to inline function
to limit the parameter type and return type.

Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
2018-07-23 10:22:32 +08:00
Mingqiang Chi
aa2b2d80d4 hv: change several APIs to void type
Change these 6 APIs to void type:
  init_default_irqs
  interrupt_init
  early_init_lapic
  init_lapic
  init_iommu
  destroy_iommu_domain
It has checked the argument of destroy_iommu_domain in shutdown_vm,
then no need to check it again inside destroy_iommu_domain.

Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-18 12:30:37 +08:00
Huihuang Shi
8017ebdf82 HV:vtd:dma change the macro to the inline function
Function like macro changed to be inline function to limit
the return type and parameter type.

V1->V2:change the apis to letter case.
Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-17 15:42:26 +08:00
Huihuang Shi
d8c376503f HV:vtd:cap change the macro to the inline function
Function like macro changed to be inline function to limit
the return type and parameter type.

Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-17 15:42:26 +08:00
Huihuang Shi
aa5027a30c HV:misc:fix "signed/unsigned conversion with cast"
Signed/unsigned conversion should add cast explicitily
or change the type of them to the same.

V1->V2:Fixed the 0U to 0UL because of the mistakes.
V2->V3:remove unsed macro

Signed-off-by: HuiHuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-16 15:45:40 +08:00
Arindam Roy
944776f238 HV: Fix new MISRAC violations for brackets
Fix remaining 11S and 12S violations. These
are after the 7 patches submitted earlier.

Signed-off-by: Arindam Roy <arindam.roy@intel.com>
2018-07-16 11:02:38 +08:00
Huihuang Shi
680c64de13 HV:transfer vmid's type to uint16_t
vmid's type prefered to be uint16_t.

V1->V2:vmid from uint32_t transfer to uint16_t
V2->V3:add range check to hcall's vmid parameter
V3->V4:seperate the declaration and actual code.
V4->V5:remove range check from hcall's vmid parameter

Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-13 14:13:38 +08:00
Arindam Roy
4aa6cdacf7 HV: Fix missing brackets for MISRA C Violations
Patch 5 of 7
Added changes to make sure Misra C violations are fixed
for rules 11S and 12S.

Signed-off-by: Arindam Roy <arindam.roy@intel.com>
2018-07-13 09:09:12 +08:00
Ying Liu
fd81655e60 HV: add the missing brackets to loop body
MISRA-C requires the use of brackets, even when there is only one
statement in the loop body.

Signed-off-by: Ying Liu <ying2.liu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-12 17:27:29 +08:00
Yang, Yu-chu
dd695f3cfa HV: Moving operators out from conditions
To follow the Misra-c standard, any operators should be done outside
the conditions. Removed the prefix, postfix and bitwise shift from
conditions.

Signed-off-by: Yang, Yu-chu <yu-chu.yang@intel.com>
2018-07-09 13:10:34 +08:00
Huihuang Shi
96372ed09c HV:misc:add suffix U to the numeric constant
Add suffix U to the numeric constant

Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-05 11:29:46 +08:00
Jason Chen CJ
6ca99713dd Revert "hv: More changes to enable GPU passthru"
This reverts commit 8d50d40ff8.
2018-07-05 11:06:47 +08:00
Huihuang Shi
5c75f29a2d modified the lapic_id type to uint8_t
According intel mannual and ACPI mannual,lapic_id length is 1 byte.

V1->V2:
  Add U suffix to the numeric when do arithmetic operation on lapic.

Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-29 13:16:02 +08:00
Anitha Chrisanthus
8d50d40ff8 hv: More changes to enable GPU passthru
Snoop control is not supported in the graphics VT-d engine and so should
be disabled in the PTEs. Also enabled iommu for graphics in the
dmar_drhd array.

v2: removed disable iommu in handle_one_drhd and combined if cond.
v3: minor code review changes
v4: moved the snoop control change to ept.c to accomodate upstream changes
Signed-off-by: Anitha Chrisanthus <anitha.chrisanthus@intel.com>
Reviewed-by: Gong Zhipeng <zhipeng.gong@intel.com>
2018-06-29 00:50:01 +08:00
Huihuang Shi
c5c338aecc vtd:fix "negative shift"
MISRA C doesn't allowed negative shift, changed any potential signed value
to unsigned value.

Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-22 12:18:45 +08:00
Junjie Mao
d705970eb2 HV: vmx: convert hexadecimals used in bitops to unsigned
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
2018-06-21 13:12:39 +08:00
Huihuang Shi
be0f5e6c16 HV:treewide:fix "expression is not Boolean"
MISRA C explicit required expression should be boolean when
in branch statements (if,while...).

Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-20 14:19:47 +08:00
Kaige Fu
1f8f1a4ecb HV: fix unused warning at RELEASE version
We will get following warnings when build acrn as release version. This patch
fix those warnings.

No functional change.

...
arch/x86/cpu.c: In function ‘stop_cpus’:
arch/x86/cpu.c:727:20: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
   if (get_cpu_id() == i) /* avoid offline itself */
                    ^~
arch/x86/vtd.c: In function ‘dmar_enable_translation’:
arch/x86/vtd.c:84:12: warning: unused variable ‘start’ [-Wunused-variable]
   uint64_t start = rdtsc();                       \
...
arch/x86/guest/instr_emul.c: In function ‘get_gla’:
arch/x86/guest/instr_emul.c:615:6: warning: variable ‘error’ set but not used [-Wunused-but-set-variable]
  int error;
...

Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-20 12:27:58 +08:00
Huihuang Shi
977c4b20b5 fix parted of "missing for discarded return value"
MISRA C required that return value should be used, missing for it should
add "(void)" prefix before the function call.
Some function can be declared without return value to avoid this problem.

Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-19 16:21:45 +08:00
Kaige Fu
359b93f4cc HV: Remove misuesed __unused
There are some __unused attached to variables. But, those variables
are used by the function actually.

This patch remove them. No functional change.

Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-06-14 13:42:42 +08:00
Yin Fengwei
8eaf4d2ab6 hv: Add suspend/resume callback for vtd
To handle S3 enter/exit for vtd.

Signed-off-by: Edwin Zhai <edwin.zhai@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-14 13:41:45 +08:00
Junjie Mao
8c4a5987e3 irq: convert irq/vector numbers to unsigned
Currently irq and vector numbers are used inconsistently.

    * Sometimes vector or irq ids is used in bit operations, indicating
      that they should be unsigned (which is required by MISRA C).

    * At the same time we use -1 to indicate an unknown irq (in
      common_register_handler()) or unavailable irq (in
      alloc_irq()). Also (irq < 0) or (vector < 0) are used for error
      checking. These indicate that irq or vector ids should be signed.

This patch converts irq and vector numbers to unsigned 32-bit integers, and
replace the previous -1 with IRQ_INVALID or VECTOR_INVALID. The branch
conditions are updated accordingly.

Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-12 10:21:58 +08:00
David B. Kinder
f4122d99c5 license: Replace license text with SPDX tag
Replace the BSD-3-Clause boiler plate license text with an SPDX tag.

Fixes: #189

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2018-06-01 10:43:06 +08:00
Junjie Mao
16152fad79 HV: debug: stop using ## __VA_ARGS__
It is an extension of GCC CPP to:

* allow omitting a variable macro argument entirely, and
* use ## __VA_ARGS__ to remove the the comma before ## __VA_ARGS__ when
  __VA_ARGS__ is empty.

The only use of ## _VA_ARGS__ is to define the pr_xxx() macros, with the first
argument being the format string and the rest the to-be-formatted arguments. The
format string is explicitly spelled out because another macro pr_fmt() is used
to add to the format string a prefix which is customizable by defining what
pr_fmt() expands to.

For C99 compliance, this patch changes the pr_xxx() macros in the following
pattern.

    - #define pr_fatal(fmt, ...)				\
    -     do_logmsg(LOG_FATAL, pr_fmt(fmt), ## __VA_ARGS__);	\
    + #define pr_fatal(...)					\
    +     do_logmsg(LOG_FATAL, pr_prefix __VA_ARGS__);		\

Reference:

* https://gcc.gnu.org/onlinedocs/gcc/Variadic-Macros.html#Variadic-Macros

Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
2018-05-29 14:13:44 +08:00
Zide Chen
8f16faab04 HV: further cleanup of header inclusions
According to the comments in hypervisor:
 " This file includes config header file "bsp_cfg.h" and other
	hypervisor used header files.
	It should be included in all the source files."

this patch includes all common header files in hypervisor.h
then removes other redundant inclusions

Signed-off-by: Zide Chen <zide.chen@intel.com>
2018-05-25 10:45:56 +08:00
Zheng, Gen
c5f860e1cb MMU: bug fix on operating va <=> pa convertion
Before referencing to physical address of devs such as lapic, ioapic,
vtd, and uart, switch to virtual address.
Use a phisical address of pml4 to write CR3.

Signed-off-by: Zheng, Gen <gen.zheng@intel.com>
2018-05-15 17:25:55 +08:00
Zheng, Gen
d02f4d4a5f refine: change the address arguments type of mmio access api
Change the address arguments type of mmio access api from uint64_t
to void*.

Signed-off-by: Zheng, Gen <gen.zheng@intel.com>
2018-05-15 17:25:55 +08:00
Jason Chen CJ
1e2c201827 vtd: add page allocation check for root_table & context_table
if failed to allocate page structure for root_table or context_table,
ASSERT system and return.

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Tian, Kevin <kevin.tian@intel.com>
2018-05-15 17:25:27 +08:00
Jason Chen CJ
4ea7588241 vtd: context_table_addr should be hpa
add necessary HPA2HVA/HVA2HPA transition for context_table_addr

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Tian, Kevin <kevin.tian@intel.com>
Acked-by: Xu, Anthony <anthony.xu@intel.com>
2018-05-15 17:25:27 +08:00
Jason Chen CJ
403076e6b9 vtd: dmar_uint->root_table_addr should be hpa
add necessary HPA2HVA/HVA2HPA transition for root_table_addr

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Tian, Kevin <kevin.tian@intel.com>
Acked-by: Xu, Anthony <anthony.xu@intel.com>
2018-05-15 17:25:27 +08:00
Binbin Wu
d0c773f22d vtd: fix memory coherency issue of vtd table
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Kevin Tian <kevin.tian@intel.com>
2018-05-15 17:25:26 +08:00
Jason Chen CJ
bf36022ce9 ept: change eptp to PA
eptp should be record as PA.

this patch changed nworld_eptp, sworld_eptp and m2p eptp to PA type,
necessary HPA2HVA/HVA2HPA transition is used for them after the change.

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-15 17:25:25 +08:00
yechunliang
b11460f7f6 replace malloc and memset with calloc
malloc: allocate a block of memory, the contents of the block are undefined.
calloc: allocate a block of memory for an array of num elements and initializes all its bits to zero.

Signed-off-by: yechunliang <yechunliangcn@163.com>
2018-05-15 17:25:24 +08:00
Qi Yadong
8d67f292ef Rename TIME_MS_DELTA to CYCLES_PER_MS
TIME_MS_DELTA is not clear enough, rename it to CYCLES_PER_MS.

Signed-off-by: Qi Yadong <yadong.qi@intel.com>
2018-05-15 17:19:39 +08:00
Eddie Dong
7a3a539b17 initial import
internal commit: 14ac2bc2299032fa6714d1fefa7cf0987b3e3085

Signed-off-by: Eddie Dong <eddie.dong@intel.com>
2018-05-11 14:44:28 +08:00