We could use container_of to get vm structure pointer from vpci. So vm
structure pointer is no need in vpci structure.
Tracked-On: #4550
Signed-off-by: Li Fei1 <fei1.li@intel.com>
There're some PCI devices need special handler for vendor-specical feature or
capability CFG access. The Intel GPU is one of them. In order to keep the ACRN-HV
clean, we want to throw the qurik part of PCI CFG asccess to DM to handle.
To achieve this, we implement per-device policy base on whether it needs quirk handler
for a VM: each device could configure as "quirk pass through device" or not. For a
"quirk pass through device", we will handle the general part in HV and the quirk part
in DM. For a non "quirk pass through device", we will handle all the part in HV.
Tracked-On: #4371
Signed-off-by: Li Fei1 <fei1.li@intel.com>
To avoid information leakage, we need to ensure that the device is
inaccessble when it does not exist.
For SR-IOV disabled VF device, we have the following operations.
1. The configuration space accessing will get 0xFFFFFFFF as a
return value after set the device state to zombie.
2. The BAR MMIO EPT mapping are removed, the accesssing causes
EPT violation.
3. The device will be detached from IOMMU.
4. The IRQ pin and vector are released.
Tracked-On: #4433
Signed-off-by: Yuan Liu <yuan1.liu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
change vmsi_read_cfg to read_vmsi_cfg, same applies to writing
change vmsix_read_cfg to read_vmsix_cfg, same applies to writing
Tracked-On: #4433
Signed-off-by: Yuan Liu <yuan1.liu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
The VF BARs are initialized by its PF SRIOV capability
Tracked-On: #4433
Signed-off-by: Yuan Liu <yuan1.liu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
Add _v prefix for some function name to indicate this function wants to operate
on virtual CFG space or virtual BAR register.
Tracked-On: #4371
Signed-off-by: Li Fei1 <fei1.li@intel.com>
Removed the pci_vdev_write_cfg_u8/u16/u32 APIs and only used
pci_vdev_write_cfg as the API for writing vdev's cfgdata
Tracked-On: #4433
Signed-off-by: Yuan Liu <yuan1.liu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
Add cfg_header_read_cfg and cfg_header_write_cfg to handle the 1st 64B
CFG Space header PCI configuration space.
Only Command and Status Registers are pass through;
Only Command and Status Registers and Base Address Registers are writable.
In order to implement this, we add two type bit mask for per 4B register:
pass through mask and read-only mask. When pass through bit mask is set, this
means this bit of this 4B register is pass through, otherwise, it is virtualized;
When read-only mask is set, this means this bit of this 4B register is read-only,
otherwise, it's writable. We should write it to physical CFG space or virtual
CFG space base on whether the pass through bit mask is set or not.
Tracked-On: #4371
Signed-off-by: Li Fei1 <fei1.li@intel.com>
reduce the use of similar APIs (particularly the name confusion) for
CFG space read/write.
Tracked-On: #4433
Signed-off-by: Yuan Liu <yuan1.liu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
create new pdev and vdev structures for a SRIOV VF device initialization
Tracked-On: #4433
Signed-off-by: Yuan Liu <yuan1.liu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
All SRIOV VF physical devices don't have bars in configuration space,
they are from the VF associated PF's VF_BAR registers of SRIOV capability.
Adding a vbars data structure in pci_cap_sriov data structure to store
SRIOV VF_BAR information, so that each VF bars can be initialized directly
through the vbars instead multiple accessing of the PF VF_BAR registers.
Tracked-On: #4433
Signed-off-by: Yuan Liu <yuan1.liu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
To support SRIOV capability initialization, add a new parameter
is_sriov_pf_vdev for init_vdev_pt function.
If parameter is_sriov_pf_vdev of function init_vdev_pt is true,
then function init_vdev_pt initializes the vdev's SRIOV capability.
Tracked-On: #4433
Signed-off-by: Yuan Liu <yuan1.liu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
Introduce SRIOV capability field for pci_vdev and add SRIOV capability
interception entries.
Tracked-On: #4433
Signed-off-by: Yuan Liu <yuan1.liu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
Before we assign a PT device to post-launched VM, we should reset the PCI device
first. However, ACRN hypervisor doesn't plan to support PCIe hot-plug and doesn't
support PCIe bridge Secondary Bus Reset. So the PT device must support FLR or PM
reset. This patch do this check when assigning a PT device to post-launched VM.
Tracked-On: #3465
Signed-off-by: Li Fei1 <fei1.li@intel.com>
When PCIe does Conventinal Reset or FLR, almost PCIe configurations and states will
lost. So we should save the configurations and states before do the reset and restore
them after the reset. This was done well by BIOS or Guest now. However, ACRN will trap
these access and handle them properly for security. Almost of these configurations and
states will be written to physical configuration space at last except for BAR values
for now. So we should do the restore for BAR values. One way is to do restore after
one type reset is detected. This will be too complex. Another way is to do the restore
when BIOS or guest tries to write the Command Register. This could work because:
1. The I/O Space Enable bit and Memory Space Enable bits in Command Register will reset
to zero.
2. Before BIOS or guest wants to enable these bits, the BAR couldn't be accessed.
3. So we could restore the BAR values before enable these bits if reset is detected.
Tracked-On: #3475
Signed-off-by: Li Fei1 <fei1.li@intel.com>
Name vmsi and vmsix function with verb-object style:
For external APIs, using MODULE_NAME_verb-object style;
For internal APIs, using verb-object style.
Tracked-On: #3475
Signed-off-by: Li Fei1 <fei1.li@intel.com>
After reshuffle pci_bar structrue we could write ~0U not BAR size mask to BAR
configuration space directly when do BAR sizing. In this case, we could know whether
the value in BAR configuration space is a valid base address. As a result, we could
do BAR re-programming whenever we want.
Tracked-On: #3475
Signed-off-by: Li Fei1 <fei1.li@intel.com>
The current code declare pci_bar structure following the PCI bar spec. However,
we could not tell whether the value in virtual BAR configuration space is valid
base address base on current pci_bar structure. We need to add more fields which
are duplicated instances of the vBAR information. Basides these fields which will
added, bar_base_mapped is another duplicated instance of the vBAR information.
This patch try to reshuffle the pci_bar structure to declare pci_bar structure
following the software implement benefit not the PCI bar spec.
Tracked-On: #3475
Signed-off-by: Li Fei1 <fei1.li@intel.com>
Concurrent access on PCI device may happened if UOS try to access PCI configuration
space on different vCPUs through IO port. This patch just adds a global PCI lock for
each VM to prevent the concurrent access.
Tracked-On: #3475
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
When assgined a PCI PTDev to post-launched VM from SOS, using a pointer to point to
the real struct pci_vdev. When post-launched VM access its PTDev configure space in
SOS address space, using this real struct pci_vdev.
Tracked-On: #3475
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Now almost the vPCI device information could be obtain from PCI device configure
in VM configure. init_vdevs could make things more easier.
And rename init_vdevs to vpci_init_vdevs, init_vdev to vpci_init_vdevs to avoid
MISRA-C violations.
Tracked-On: #3475
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
Reviewed-by: Dongsheng Zhang <dongsheng.x.zhang@intel.com>
The functions always return 0 so it makes sense to make them void functions
Tracked-On: #3475
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
The caller function has already done the checking to make sure the req is targeted
for the called functions, so there is no need to do the same checking in called
functions.
Remove calling of is_bar_offset() in vdev_pt_read_cfg/vdev_pt_write_cfg:
In vpci.c's vpci_read_pt_dev_cfg and vpci_write_dev_cfg, vbar_access is called
first to make sure the req is targed for vdev pt (vbar emulation) before
dispatching the request to vdev_pt_read_cfg/vdev_pt_write_cfg, so there is no
need to call is_bar_offset() again to do the same checking in vdev_pt_read_cfg/vdev_pt_write_cfg.
The same goes for msicap_access/msixcap_access
vbar_access should only check if the req is for bar access, it should not care
about whether the bar access is 4 bytes or 4 bytes aligned. The called function
vdev_pt_write_vbar will check and ignore the write access if it is not 4 bytes or 4 bytes
aligned, although this is counted as a bar access.
vdev_pt_read_vbar will check if the read access is 4 bytes or 4 bytes
aligned, although this is counted as a bar access, set read value (*val) to
-1 if the access is not 4 bytes (or aligned).
Tracked-On: #3475
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
And use vhostbridge for both SOS and pre-launched VM.
Tracked-On: #3241
Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
Rename vbdf to bdf for the following reasons:
Use the same coding style as struct pci_pdev, as pci_pdev uses bdf instead of pbdf
pci_vdev implies the its bdf is virtual, no need to prefix bdf with the v
prefix (redundant)
Tracked-On: #3241
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
For sos, its vbar base address is set to pbar base address (vbar gpa = pbar
hpa)
For pre-launched VMs, vbar base address is pre-assigned in vm_config
Rename vdev_pt_remap_msix_table_bar to vdev_pt_remap_msix_table_vbar and make it
a static function
Remove unused function prototye vdev_pt_remap_msix_table_bar() in vpci_priv.h
Tracked-On: #3241
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
Add @pre for some functions, and fix outdated @pre statements
Tracked-On: #3056
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
Put the cfgwrite code in write_cfg() for both sos and pre-launched VMs, and
remove sharing_mode_cfgwrite() and partition_mode_cfgwrite().
Rename functions used by write_cfg():
vhostbridge_cfgwrite --> vhostbridge_write_cfg
vdev_pt_cfgwrite --> vdev_pt_write_cfg
vmsi_cfgwrite --> vmsi_write_cfg
vmsix_cfgwrite --> vmsix_write_cfg
Fix @pre for functions
Tracked-On: #3056
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
Reviewed-by: Yin Fengwei <fengwei.yin@intel.com>
Put the cfgread code in read_cfg() for both sos and pre-launched VMs, and
remove sharing_mode_cfgread() and partition_mode_cfgread().
Rename functions used by read_cfg():
vhostbridge_cfgread --> vhostbridge_read_cfg
vdev_pt_cfgread --> vdev_pt_read_cfg
vmsi_cfgread --> vmsi_read_cfg
vmsix_cfgread --> vmsix_read_cfg
Tracked-On: #3056
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
Reviewed-by: Yin Fengwei <fengwei.yin@intel.com>
Put the deinit code in deinit_prelaunched_vm_vpci() for both sos and pre-launched VMs, and
remove sharing_mode_vpci_deinit() and partition_mode_vpci_deinit().
Rename functions used by deinit():
vhostbridge_deinit --> deinit_vhostbridge
vmsi_deinit --> deinit_vmsi
vmsix_deinit --> deinit_vmsix
post_launched_vm_vpci_deinit --> deinit_post_launched_vm
Tracked-On: #3056
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
Put the init code in init_vdev_for_pdev for both sos and pre-launched VMs, and
remove sharing_mode_vpci_init() and partition_mode_vpci_init().
Rename functions used by init_vdev_for_pdev:
vhostbridge_init --> init_vhostbridge
vmsi_init --> init_vmsi
vmsix_init --> init_vmsix
Tracked-On: #3056
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
Currently host bridge emulation and bar emulation are only for pre-launched vms,
use is_prelaunched_vm to check if it is for pre-launched vms when calling
init/deinit/cfgread/cfgwrite, also use is_hostbridge() to check if the access if
for host bridge, so that these functions can be unified for sos and pre-launched
vm in subsequent commits.
Move is_hostbridge function to vpci_priv.h so that it can be used by multiple
files.
vhostbridge_cfgread/vhostbridge_cfgwrite: return -ENODEV if the pci cfg access is not
targeted for vhostbridge so that cfgread/cfgwrite functions can be unified for sos and
pre-launched vm in subsequent commits
Fix @pre for functions
Tracked-On: #3056
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
Create the init_vdev_pt() function to host bar emulation initialization code
Add design philosophy for bar emulation
Move common functions to pci.h as they are generic and can be used by other
files.
Rename is_valid_bar to is_bar_supported and keep it as a private local function
in pci_pt.c
Tracked-On: #3056
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
ACRN cleans up the IOMMU domain and other data structures that
represents the state of device assigment to POST_LAUNCHED_VM. This is
with the help of hypercalls from SOS DM. Under scenarios where DM
execution can get terminated abruptly or due to bugs in DM, hypercalls
responsible for cleaning up ACRN cannot happen. This leaves ACRN
device representation/resource assignment in an incorrect state.
This patch cleans up the IOMMU resource and other data structures
upon shutdown of POST_LAUNCHED_VM.
Tracked-On: #2700
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
In the presence of SOS, ACRN uses fallback_iommu_domain which is the same
used by SOS, to assign domain to devices during ACRN init. Also it uses
fallback_iommu_domain when DM requests ACRN to remove device from UOS domain.
This patch changes the design of assign/remove_iommu_device to avoid the
concept of fallback_iommu_domain and its setup. This way ACRN can commonly
treat pre-launched VMs bringup w.r.t. IOMMU domain creation.
Tracked-On: #2965
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
For pre-launched VMs MSI/MSI-x configuration writes are not intercepted by ACRN.
It is pass-thru and interrupts land in ACRN and the guest vector is injected into
the VM's vLAPIC. With this patch, ACRN intercepts MSI/MSI-x config writes and take
the code path to remap interrupt vector/APIC ID as it does for SOS/UOS.
Tracked-On: #2879
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
Delete the 2 files and merge their code into vpci.c:
hypervisor/dm/vpci/partition_mode.c
hypervisor/dm/vpci/sharing_mode.c
And change the Makefile accordingly
Change PCI_PRIV_H_ to VPCI_PRIV_H_ in vpci_priv.h
Some misra c fix:
Add @pre for functions
Add const to function parameters
Tracked-On: #2534
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
