Sainath Grandhi 1bf3163d08 hv: Hypervisor access to PCI devices with 64-bit MMIO BARs ... PCI devices with 64-bit MMIO BARs and requiring large MMIO space can be assigned with physical address range at the very high end of platform supported physical address space. This patch uses the board info for 64-bit MMIO window as programmed by BIOS and constructs 1G page tables for the same. As ACRN uses identity mapping from Linear to Physical address space physical addresses upto 48 bit or 256TB can be supported. Tracked-On: #4586 Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>		2020-04-15 10:54:39 +08:00
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boot	hv: update the hypervisor 64-bit entry address for efi-stub	2020-03-06 08:27:46 +08:00
configs	hv: Add HI_MMIO_START and HI_MMIO_END macros to board files	2020-04-15 10:54:39 +08:00
guest	hv: fix for waag 2 core reboot issue	2020-04-15 10:20:01 +08:00
lib	hv: refine retpoline speculation barriers	2020-02-26 09:24:54 +08:00
seed	HV: init and sanitize acrn multiboot info	2020-02-26 09:24:16 +08:00
cpu_caps.c	hv:enable gpu iommu except APL platforms	2020-02-24 11:47:10 +08:00
cpu_state_tbl.c	HV: add board specific cpu state table to support Px Cx	2019-07-29 20:25:16 +08:00
cpu.c	hv: Reserve space for VMs' EPT 4k pages after boot	2020-04-13 11:39:58 +08:00
e820.c	hv: Reserve space for VMs' EPT 4k pages after boot	2020-04-13 11:39:58 +08:00
gdt.c	hv:cleanup header files for arch folder	2019-02-22 13:14:36 +08:00
idt.S	HV: Install a NMI handler in acrn IDT	2019-12-13 10:13:09 +08:00
init.c	HV: init and sanitize acrn multiboot info	2020-02-26 09:24:16 +08:00
ioapic.c	hv: vioapic init for SOS VM on platforms with multiple IO-APICs	2020-04-13 11:39:58 +08:00
irq.c	hv: Handle holes in GSI i.e. Global System Interrupt for multiple IO-APICs	2020-04-13 11:39:58 +08:00
Kconfig	hv: Server platforms can have more than 8 IO-APICs	2020-04-13 11:39:58 +08:00
lapic.c	HV: clean up redundant macro in lapic.h	2019-12-27 12:27:08 +08:00
mmu.c	hv: Hypervisor access to PCI devices with 64-bit MMIO BARs	2020-04-15 10:54:39 +08:00
notify.c	hv: fix pcpu_id mask issue in smp_call_function()	2020-01-17 09:20:53 +08:00
page.c	hv: Hypervisor access to PCI devices with 64-bit MMIO BARs	2020-04-15 10:54:39 +08:00
pagetable.c	hv: mmu: minor fix about add_pte	2020-03-09 10:03:01 +08:00
pm.c	pm: S5: update the system shutdown logical in ACRN	2019-12-23 15:15:09 +08:00
rdt.c	HV: Add MBA support in ACRN	2020-03-04 17:33:50 +08:00
sched.S	hv: sched: rename schedule related structs and vars	2019-10-16 10:25:53 +08:00
security.c	hv: config: add an option to disable mce on psc workaround	2019-12-03 09:17:04 +08:00
sgx.c	hv: sgx: add basic support to init sgx resource for vm	2019-05-29 11:24:13 +08:00
timer.c	hv: rename BOOT_CPU_ID to BSP_CPU_ID	2020-02-25 09:08:14 +08:00
trampoline.c	hv: refine 'uint64_t' string print format in x86 moudle	2019-11-09 11:42:38 +08:00
vmx.c	hv:fix "no prototype for non-static function"	2019-07-09 10:36:03 +08:00
vtd.c	hv: change GPU passthru translation mode to TT_PASSTHROUGH	2020-03-20 10:56:36 +08:00
wakeup.S	hv: pm: correct the function name	2019-09-11 17:30:24 +08:00