Zide Chen 6801d826e2 hv: intercept IA32_PAT MSR ... Preparing for emulating guest's CR0.CD and CR0.NW bits: - Intercept both rdmsr and wrmsr for IA32_PAT - Track guest's IA32_PAT MSR with vcpu.arch_vcpu.contexts.ia32_pat Signed-off-by: Zide Chen <zide.chen@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>		2018-07-02 12:33:06 +08:00
..
guest.c	HV: treewide: convert suffix ULL to UL	2018-06-29 00:50:01 +08:00
instr_emul_wrapper.c	HV: Minor refactor to get_guest_paging_info	2018-07-02 10:46:41 +08:00
instr_emul_wrapper.h	HV: treewide: convert hexadecimals used in bitops to unsigned	2018-06-21 13:12:39 +08:00
instr_emul.c	fix "negative shift"	2018-06-22 12:18:45 +08:00
instr_emul.h	instr_emul: remove unnecessary params in __decode_instruction	2018-06-11 12:14:43 +08:00
pm.c	hv: trap vm0 write/read pm1a/pm1b registers	2018-06-29 00:50:01 +08:00
ucode.c	HV:guest:fix "expression is not Boolean"	2018-06-20 14:19:47 +08:00
vcpu.c	HV:treewide:Cleanup the type for parameters of bitmap	2018-07-02 10:46:11 +08:00
vioapic.c	fix "negative shift"	2018-06-22 12:18:45 +08:00
vlapic_priv.h	hv:merge struct lapic and lapic_regs to lapic_regs	2018-07-02 10:49:14 +08:00
vlapic.c	hv:merge struct lapic and lapic_regs to lapic_regs	2018-07-02 10:49:14 +08:00
vm.c	HV: Remove vm->attr.name	2018-07-02 10:48:36 +08:00
vmcall.c	HV: Make all trace event prefix consist with TRACE	2018-07-02 10:46:41 +08:00
vmsr.c	hv: intercept IA32_PAT MSR	2018-07-02 12:33:06 +08:00
vpic.c	HV: vpic: add suffix 'U' to constants in unsigned contexts	2018-06-29 14:23:16 +08:00