Commit Graph

429 Commits

Author SHA1 Message Date
Jason Chen CJ
15030f6f2c io_emul: reshuffle io emulation path
This is the following patch after removing pending_pre_work, it make sure
all io emulation is done on its own cpu.

For hv emulated request, it follows the steps:
	hv_emulate_pio->emulate_pio_complete
	hv_emulate_mmio->emulate_mmio_complete

For dm emulated request, it follows the steps:
	acrn_insert_request->dm_emulate_io_complete
while in acrn_insert_request, it could trigger scheduling out then resume by
hcall_notify_ioreq_finish, or busy wait for ioreq completion if polling mode
is enabled.

Tracked-On: #2394
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Xu, Anthony <anthony.xu@intel.com>
2019-01-23 16:21:17 +08:00
Jason Chen CJ
fb41ea5cfb io_emul: remove pending_pre_work
Now we do not need pending_pre_work anymore, as we can make sure IO request
VCPU resume from where it paused.

Now only three fixed points will try to do schedule:
- vcpu_thread: before vm entry, will check reschedule flag and to it if needed
- default_idle: loop check reschedule flag to see if need switch out
- io request: if IO REQ need DM's handle, it will schedule out

Tracked-On: #2394
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Xu, Anthony <anthony.xu@intel.com>
2019-01-23 16:21:17 +08:00
Jason Chen CJ
4fc54f952e schedule: add full context switch support
this patch added full context switch support for scheduling, it make sure
each VCPU has its own stack, and added host_sp field in struct sched_object
to record host stack pointer for each switch out object.

Arch related function arch_switch_to is added for context switch.

To benefit debugging, a name[] field is also added into struct sched_object.

Tracked-On: #2394
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Xu, Anthony <anthony.xu@intel.com>
2019-01-23 16:21:17 +08:00
Jason Chen CJ
21092e6f6d schedule: use per_cpu idle object
To support full context switch scheduling, each physical
CPU must have its own idle sched_obj.

Tracked-On: #2394
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Xu, Anthony <anthony.xu@intel.com>
2019-01-23 16:21:17 +08:00
Victor Sun
2e32fba536 HV: remove sworld_supported in acrn_vm_config
We will use guest_flags of SECURE_WORLD_ENABLED to check wthether
sworld is supported.

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-21 18:03:31 +08:00
Victor Sun
ec199d9609 HV: add get_sos_vm api
This patch creates a new get_sos_vm() api to replace get_vm_from_vmid(0U)
because VM 0 might not be SOS VM now;

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-21 18:03:31 +08:00
Victor Sun
e6117e0d5b HV: refine launch vm interface
When pcpu enter guest mode, it will call launch_vms() function to launch
VMs in global vm_configs array.

In launch_vms() function, current pcpu will go through vm_config array list
and check whether it is a bsp of configured VM, if yes then it will prepare
corresponding VM and start it. The index of vm_config array will be specified
to VM id.

The first least significant bit in pcpu_bitmap means the bsp of the VM.

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-21 18:03:31 +08:00
Victor Sun
49e6deaf26 HV: rename the term of vm0 to sos vm
Under sharing mode, VM0 is identical with SOS VM. But the coupling of
SOS VM and VM 0 is not friendly for partition mode.

This patch is a pure term change of vm0 to sos VM, it does not change
any code logic or senmantic.

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-21 18:03:31 +08:00
Mingqiang Chi
de4ab6fdfa hv:modulization for IO Emulation
-- rename io.c to io_emul.c, add io_emul.h
-- rename io_request.c to io_req.c,rename ioreq.h to io_req.h
-- move some APIs declaration from ioreq.h to io_emul.h
   related IO emulation

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
	modified:   ../doc/acrn.doxyfile
	modified:   Makefile
	renamed:    arch/x86/io.c -> arch/x86/io_emul.c
	renamed:    common/io_request.c -> common/io_req.c
	modified:   include/arch/x86/hv_arch.h
	modified:   include/arch/x86/io.h
	new file:   include/arch/x86/io_emul.h
	renamed:    include/arch/x86/ioreq.h -> include/arch/x86/io_req.h
2019-01-21 13:49:54 +08:00
Minggui Cao
808d0af2c8 HV: check to avoid interrupt delay timer add twice
to edge interrupt, like eth device, it can triger the interrupt again
when its IRQ in softirq entry queue or in timer list.

in current design, for sofrirq entry, it calls "list_del" before
"list_add_tail", to avoid the entry added twice.

so for interrupt delay timer, add to check if it is started
then just drop the next one; to avoid it enqueue twice.

Tracked-On: #2365
Signed-off-by: Minggui Cao <minggui.cao@intel.com>
Reviewed-by: Li, Fei1 <fei1.li@intel.com>
2019-01-21 11:18:08 +08:00
Victor Sun
c4a230f313 HV: rename the term of vm_description to vm_config
This patch is a pure term change of vm_description to vm_config,
the struct name of vm_description is changed to acrn_vm_config.

The patch does not change any code logic or senmantic.

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-18 11:50:00 +08:00
Zhao Yakui
e4a3a63496 acrn/vhm: change the default notification vector to 0xF3
Currently the SOS kernel will call hcall_set_callback_vector to config
the expected up-notification vector(0xF3) and then hypervisor uses the
passed vector to raise the interrupt to SOS when needed.
As sos kernel already switches to 0xF3 notification vector, the default 
notification vector can be changed from 0xF7 to 0xF3. In such case it still
can work well even when the SOS kernel doesn't reconfigure the notification
vector. 

Tracked-On: projectacrn/acrn-hypervisor#2355 
Acked-by: Eddie Dong <eddie.dong@intel.com>
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
2019-01-18 11:04:22 +08:00
Mingqiang Chi
8265770f05 hv:Change acrn_vhm_vector to static
-- Change acrn_vhm_vector to static, only used in io_request.c
-- Add set_vhm_vector() api, it will call this api instead of
   acrn_vhm_vector except io_request.c

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Anthony Xu <anthony.xu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-18 08:29:36 +08:00
Zhipeng Gong
7c56243225 hv: hv_main: adjust vm exit trace position
When we use script to analyze the latency between vm_exit and vm_entry,
it does not include the duration of vm_exit handler.

The patch moves the vm_exit trace before vmexit_handler.

v2: move vm_exit trace right after run_vcpu.

Tracked-On: #2341
Signed-off-by: Zhipeng Gong <zhipeng.gong@intel.com>
Reviewed-by: Yan, Like <like.yan@intel.com>
2019-01-16 10:24:33 +08:00
Shiqing Gao
e2971ebc98 hv: vlapic: code clean-up
* rename `vlapic_set_intr_ready` to `vlapic_accept_intr`
 * replace calling of `vlapic_intr_edge` with `vlapic_set_intr`
 * remove `vlapic_intr_level` and `vlapic_intr_edge`

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-11 09:44:10 +08:00
Huihuang Shi
e966828cd2 hv: clean the "Procedure has more than one exit point".
Misra C requires Function must have only 1 return entry.
Fixed it by use "if ... else ..." format.

Tracked-On: #861
Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-08 14:47:01 +08:00
Mingqiang Chi
7907fef59e hv:Rename several APIs for vpic and vioapic
vpic:
   vpic_set_irq         --> vpic_set_irqline
   vpic_get_irq_trigger --> vpic_get_irqline_trigger_mode
vioapic:
   vioapic_set_irq_nolock --> vioapic_set_irqline_nolock
   vioapic_set_irq        --> vioapic_set_irqline_lock
   vioapic_send_intr      --> vioapic_generate_intr

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
2019-01-08 14:32:20 +08:00
Mingqiang Chi
682824de6d hv:Change phys_cpu_num to static
-- change phys_cpu_num to static
-- add get_pcpu_nums() and is_pcpu_active() APIs
-- replace phys_cpu_num with get_pcpu_nums() except cpu.c

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-12-28 23:26:31 +08:00
Huihuang Shi
d89ce8aeb4 hv: schedule: fix "Procedure has more than one exit point"
Misra C requires Function must have only 1 return entry.
Fixed it by use "if ... else ..." format.

Tracked-On: #861
Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
2018-12-27 13:38:41 +08:00
Shuo A Liu
952943c3ea hv: decouple IO completion polling from idle thread
IO completion polling will access vcpu and vm structs. If doing it in
idle thread, there might be some race issues between vm destroying and
idle thread. They are running on different cores.
Got suggestion from Fengwei, decouple the polling action from idle
thread and just do it in vcpu thread, then we can guarantee idle thread
in really idle status.

Tracked-On: #1821
Signed-off-by: Shuo A Liu <shuo.a.liu@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
Reviewed-by: Yin Fengwei <fengwei.yin@intel.com>
2018-12-27 12:35:40 +08:00
Shuo A Liu
a0154223f6 hv: clear NEED_RESCHEDULE flag in schedule
Now, need_reschedule will test_and_clear the bit NEED_RESCHEDULE in
schedule context, then call schedule. It is not a exact match with the
name.
This patch move the flag clearing into scheudle, and need_reschedule
just check and return.

Tracked-On: #1821
Signed-off-by: Shuo A Liu <shuo.a.liu@intel.com>
Reviewed-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-27 12:35:40 +08:00
Huihuang Shi
2d3f510dbe hv: tursty_hypercall: fix "Procedure has more than one exit point"
Misra C requires Function must have only 1 return entry.
Fixed it by use "if ... else ..." format.

Tracked-On: #861
Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-27 09:04:32 +08:00
Huihuang Shi
5aa7e29f0b hv: hypercall: fix "Procedure has more than one exit point"
Fix "Procedure has more than one exit point" by split the function into
two parts.
V1->V2:
    compact the multiple lines into one.

Tracked-On: #861
Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-27 09:04:15 +08:00
Huihuang Shi
d6a2268282 hv: hypercall: fix complicated violations of "Procedure has more than one exit point"
Fix the complicated violations by methods list below:
1.if ... else ... fmt.
2.add status in proper position.
    example:
        bool bdf_valid;(could find this variable in this patch).

V1->V2:
    merge branches.

Tracked-On: #861
Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-27 09:04:15 +08:00
Huihuang Shi
f680ed5d6a hv: hypercall: fix simple violations of "Procedure has more than one exit point"
This patch fix the violations by the "if ... else ..." fmt.

V1->V2:
    merge branches.

Tracked-On: #861
Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-27 09:04:15 +08:00
Huihuang Shi
20d0e666ff hv: fix sprintf and hypercall violations
Fix the violations list below:
1.Procedure has more than one exit point.
2.Use of sizeof on an array parameter.
3.Expression needs brackets.

Tracked-On: #861
Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-25 16:33:13 +08:00
huihuang.shi
277c7ec8ba hv: hypercall: fix "Procedure has more than one exit point"
Misra C requires Function must have only 1 return entry.
Fixed it by use "if ... else ..." format.

Tracked-On: #861
Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-25 16:06:16 +08:00
Jason Chen CJ
ff0703dd40 scheduler: make scheduling based on struct sched_object
use struct sched_object as the main interface of scheduling, then
make scheduler as an independent module to vcpu:
- add struct sched_object as one field in struct vcpu
- define sched_object.thread for switch_to thread
- define sched_object.prepare_switch_out/in for prepare_switch before
  switch_to
- move context_switch_out/context_switch_in into vcpu.c as
  vcpu.sched_obj.prepare_switch_out/in
- make default_idle as global idle.thread for idle_thread
- make vcpu_thread as vcpu.sched_obj.thread for each vcpu thread
- simplify switch_to based on sched_object

Tracked-On: #1842
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <edide.dong@intel.com>
2018-12-21 10:34:15 +08:00
Jason Chen CJ
8aae0dff87 scheduler: refine make_reschedule_request
just use pcpu_id for make_reschedule_request is enough

Tracked-On: #1842
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
Acked-by: Eddie Dong <edide.dong@intel.com>
2018-12-21 10:34:15 +08:00
Jason Chen CJ
6d67364881 scheduler: refine runqueue related functions
add struct sched_object, and use it as input param instead of vcpu for
below functions:
- add_to_cpu_runqueue renamed from add_vcpu_to_runqueue
- remove_from_cpu_runqueue renamed from remove_vcpu_from_runqueue
- get_next_sched_obj added to get next sched object

Tracked-On: #1842
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <edide.dong@intel.com>
2018-12-21 10:34:15 +08:00
Li, Fei1
1dca17cd29 hv: coding style: refine initialize_trusty to one exit
1) Move data copy out of initialize_trusty
2) Fix procedure has more than one exit point

Tracked-On: #2120
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2018-12-20 21:53:51 +08:00
Li, Fei1
8a55f03823 hv: coding style: refine hcall_initialize_trusty to one exit
Fix procedure has more than one exit point.

Tracked-On: #2120
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2018-12-20 21:53:51 +08:00
Huihuang Shi
1caf58f221 hv:clean io_request.c misra violations
Clean the io_request.c's violations reported by the misra tools.
V1->V2:
    remove violations which checked with NULL.

Tracked-On: #861
Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-20 09:10:02 +08:00
Binbin Wu
83ebd43239 hv: ptdev: fix MISRAC violations
This patch fixs MISRAC violations in common/ptdev.c and include/common/ptdev.h

Tracked-On: #861
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-12-20 09:08:57 +08:00
Mingqiang Chi
64a463000f hv:refine prepare_vm0 api
-- fix MISRA-C violation "procedure has more than one exit point"
   for this api
-- change start_vm to void type since it is always return 0

Tracked-On: #861
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-19 09:16:37 +08:00
Yonghua Huang
b8ffac8bac hv:fix possible buffer overflow in 'ptirq_get_intr_data()'
- 'buffer'with size of 'buffer_cnt',  will overflow in
    next loop if 'index == buffer_cnt - 1'.

Tracked-On: #1252
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-18 20:07:36 +08:00
Huihuang Shi
6aa4227277 fix "Procedure has more than one exit point."
Misra C requires Function must have only 1 return entry.
Fixed it by use "if ... else ..." format.

Tracked-On: #861
Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-18 20:04:20 +08:00
Jason Chen CJ
d2bac7cc5d cpu_dead should only run on current pcpu
no need for input param pcpu_id.

Tracked-On: #1842
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-17 14:31:52 +08:00
Yonghua Huang
57bf26dc17 hv: fix possible buffer overflow issues
- cpu_secondary_init() @cpu.c
 - ptirq_intx_pin_remap() @ assign.c
   etc.

Tracked-On: #1252
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-14 20:38:15 +08:00
Yonghua Huang
4fc5dcfc3e hv: enable SMAP in hypervisor
With SMAP enabled, hypervisor can't access pages that
owned by guest(either SOS or UOS), and an override is
is provided: stac()/clac() to enable/disable access to
guest's memory pages.

 Pre-conditon:
    Mark hypervisor owned pages as supervisor mode (U/S = 0),
       and set all othter memory pages as user mode (U/S = 1).

Tracked-On: #2056
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-12-14 15:24:26 +08:00
Yonghua Huang
57dfc7de05 hv: refine IOREQ state operation functions in hypervisor
1) add functions to set/get VHM request state.
2) modify 'complete_ioreq()' in io.c
3) update the caller code

Tracked-On: #2056
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-12-14 15:24:26 +08:00
Min Lim
9e917057e9 profiling: split profiling_vmexit_handler into two functions
This patch fixes incorrect vm_id captured when sampling PMU data. Currently,
the vm_id gets attributed to ACRN hypervisor, rather than actual guest vm_id.

The issue is identified that the existing code captures the guest vm info
after vmexit_hander function is completed, in which the profiling module
points its context to VMM. When the vmexit happens by PMI, the guest context
should be captured so that the attribution to proper guest vm can happen.

This change will also allow to capture more accurate TSC when vmexit happens.

Tracked-On: #2043
Signed-off-by: Min Lim <min.yeol.lim@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-14 08:54:30 +08:00
Li, Fei1
29c8494fd0 hv: replace strcpy_s with strncpy_s
They're some duplicated and strcpy_s is not safety as strncpy_s.

Tracked-On: #861
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
Reviewed-by: Huang, Yonghua <yonghua.huang@intel.com>
2018-12-13 09:08:32 +08:00
Li, Fei1
e3fc6c3c79 hv: use int32_t replace int
Since it's typedef in "include/lib/types.h"

Tracked-On: #861
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2018-12-12 13:08:10 +08:00
Li, Fei1
e8f3a2d42c hv: use uint64_t replace "unsigned long"
Since it's typedef in "include/lib/types.h"

Tracked-On: #861
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2018-12-12 13:08:10 +08:00
Minggui Cao
9b58b9d11d HV: improve e820 interfaces and their usages
1. change its APIs as more indepentent, and modify the callers' code
2. limit its global variables as static, and return const to the callers
3. remove unused code in "CONFIG_CMA"

Tracked-On: #1842
Signed-off-by: Minggui Cao <minggui.cao@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-12-12 09:12:12 +08:00
Minggui Cao
b69d24b1d4 HV: separate e820 related code as e820.c/h
1. e820 is modulized as separated files.
2. move boot_regs into multiboot.h as it's related with
multiboot info header

Tracked-On: #1842
Signed-off-by: Minggui Cao <minggui.cao@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-12-12 09:12:12 +08:00
Li, Fei1
ae9d4361fd hv: minimize the case of "identifier reuse"
Identifier reuse may arise confusion. So should minimize the case of it
as much as possible. This patch is try to do this except the PCI related
module.

Tracked-On: #861
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2018-12-07 15:21:39 +08:00
Li, Fei1
9bb16bce77 hv: fix type conversion without cast with explicit conversion
Implicit conversion may result in loss of information or undefined behaviour.
So make it with explicit conversion.

Tracked-On: #861
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2018-12-05 13:17:38 +08:00
Li, Fei1
79463fd5ce hv: avoid using of mixed mode arithmetic
Avoid using of mixed mode arithmetic by using explicit casts

Tracked-On: #861
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2018-12-05 13:17:38 +08:00
Li, Fei1
7a62154e36 hv: remove the theoretic infinite loop
There may the theoretic infinite loop with some code. But actually it doesn't.
This patch make these code more obvious it's not a potentially infinite loop.

Tracked-On: #861
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2018-12-05 13:17:38 +08:00
Shiqing Gao
b38629b85e hv: fix 'Space missing before or after binary operator'
This patch adds the necessary space before or after binary operator.

v1 -> v2:
 * minor fix related to integer
   [i - 1] ====> [i - 1U]

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
2018-12-04 09:16:04 +08:00
Shiqing Gao
2f15d3569c hv: replace CPU_PAGE_SIZE with PAGE_SIZE
replace CPU_PAGE_SIZE with PAGE_SIZE
These two MACROs are duplicated and PAGE_SIZE is a more reasonable name.

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-03 15:14:57 +08:00
Jason Chen CJ
aa9af27338 modularization: boot component
Boot component prepares the very basic platform boot env. It finally call
into platform initilization entries:

- bsp_boot_init & cpu_secondary_init for start up
- or restore_s3_context for wakeup

this patch is the final one, it did some code clean up and move some definition
from vm0_boot.h to boot_context.h.

after this patch, the boot component include files:
arch/x86/boot/cpu_primary.S
arch/x86/boot/trampoline.S
arch/x86/boot/cpu_save_boot_ctx.S
arch/x86/boot/idt.S
boot/reloc.c
boot/include/reloc.h
include/arch/x86/boot/idt.h
include/arch/x86/boot/boot_context.h

Tracked-On: #1842
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
2018-12-03 09:09:44 +08:00
Li, Fei1
bd1c0838d1 hv: trusty: reserve memory for trusty
The previous would reserve memory for trusty in SOS kernel. Howerer,
there would no available 16 MB continue memory any more after a long time.
This result in allocating memory for trusty failed. This patch will reserve
memory for trusty in ACRN hypervisor in which case the memory allocation
for trusty will never fail.

Tracked-On: #1942
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2018-11-30 16:49:27 +08:00
Junjie Mao
97eb72a4a0 doc: always use 'None' for functions not returning a value
It is preferred to state the absence of a return value explicitly in the
doxygen-stile comments. Currently there are different styles of doing this,
including:

  @return None
  @return NULL
  @return void
  @return N/A

This patch unifies the above with `@return None`.

Tracked-On: #1595
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
2018-11-30 14:55:17 +08:00
Mingqiang Chi
5dcfc1336b hv:Rename ptdev to ptirq for some APIs
-- Rename the fowllowing APIs:
  ptdev_intx_pin_remap --> ptirq_intx_pin_remap
  ptdev_msix_remap  --> ptirq_msix_remap
  ptdev_add_intx_remapping --> ptirq_add_intx_remapping
  ptdev_remove_intx_remapping --> ptirq_remove_intx_remapping
  ptdev_add_msix_remapping --> ptirq_add_msix_remapping
  ptdev_remove_msix_remapping --> ptirq_remove_msix_remapping
  ptdev_intx_ack  --> ptirq_intx_ack
  ptdev_lookup_entry_by_sid --> ptirq_lookup_entry_by_sid
  ptdev_lookup_entry_by_vpin --> ptirq_lookup_entry_by_vpin
  ptdev_build_physical_msi --> ptirq_build_physical_msi
  ptdev_build_physical_rte --> ptirq_build_physical_rte
  alloc_entry   --> ptirq_alloc_entry
  release_entry --> ptirq_release_one_entry
  ptdev_activate_entry --> ptirq_activate_entry
  ptdev_deactivate_entry --> ptirq_deactivate_entry
  ptdev_intr_handle_irq --> ptirq_handle_intx
  ptdev_softirq --> ptirq_softirq
  ptdev_enqueue_softirq --> ptirq_enqueue_softirq
  ptdev_dequeue_softirq --> ptirq_dequeue_softirq
  get_vm_ptdev_intr_data --> ptirq_get_intr_data
  alloc_ptdev_entry_id --> ptirq_alloc_entry_id
  ptdev_intr_delay_callback --> ptirq_intr_delay_callback
  ptdev_dequeue_softirq --> ptirq_dequeue_softirq
  ptdev_interrupt_handler --> ptirq_interrupt_handler

-- Merge 'ptdev_release_all_entries' and 'release_all_entries'
   to 'ptirq_release_all_entries'

v2-->v3:
   Rename ptirq_release_one_entry to ptirq_release_entry
v1-->v2:
   still use ptdev_init instead of ptirq_init

Tracked-On: #861
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-30 13:27:49 +08:00
Mingqiang Chi
5b43aa8a65 hv:Rename ptdev to ptirq for some variables and structures
ptdev_remapping_info --> ptirq_remapping_info
ptdev_msi_info --> ptirq_msi_info
ptdev_vpin_source --> ptirq_vpin_source
ptdev_irq_entries --> ptirq_entries
ptdev_entry_bitmaps --> ptirq_entry_bitmaps

v1-->v2:
   still use ptdev_lock instead of ptirq_lock
Tracked-On: #861
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-30 13:27:49 +08:00
Junjie Mao
10afa9bbbf HV: io: obsolete the valid field in vhm requests
As SOS has already adapted to the new state transition of VHM requests for a
month, the old `valid` field can now be safely obsoleted.

This patch changes the `valid` field as reserved and drops all the code that
reads or modifies this field for backward compatibility. The embedded comments
are updated accordingly, following the doxygen style.

Tracked-On: #875
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-30 13:14:59 +08:00
Li, Fei1
a1ac585b85 hv: add brackets to make operator expression more readable
v1-v2:
Bypass this case:
When binary arithmetic operators of different precedence (e.g. '+'
and '*') are mixed in an expression, parentheses are added to the
sub-expressions using the operator with a higher precedence.

v1:
The operator precedence rules are complicated and it is easy to make a mistake.
So add brackets to make operator expression more readable.

Tracked-On: #861
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2018-11-29 11:10:22 +08:00
Huihuang Shi
9f13a51e8a hv: hypercall: VM management fix "Procedure has more than one exit point"
IEC 61508,ISO 26262 standards highly recommend single-exit rule.

Reduce the count of the "return entries".
Fix the violations which is comply with the cases list below:
1.Function has 2 return entries.
2.The first return entry is used to return the error code of
checking variable whether is valid.

Fix the violations in "if else" format.
V1->V2:
    update the git comment to describe why comply with the
single-exit rule.

V2->V3:
    update the git comment title to give a scope declaration of this
patch.

Tracked-On: #861
Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Reviewed-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-27 09:27:00 +08:00
Huihuang Shi
a7398e8a2f hv: hypercall: general fix "Procedure has more than one exit point"
IEC 61508,ISO 26262 standards highly recommend single-exit rule.

Reduce the count of the "return entries".
Fix the violations which is comply with the cases list below:
1.Function has 2 return entries.
2.The first return entry is used to return the error code of
checking variable whether is valid.

Fix the violations in "if else" format.
V1->V2:
    update the git comment to describe why comply with the
rule(function's return entry should be only one).
V2->V3:
    update the git comment title to give a scope declaration of this
patch.

Tracked-On: #861
Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Reviewed-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-27 09:27:00 +08:00
Zide Chen
b627c2c979 hv: switch IA32_TSC_AUX between host/guest through VM Controls
Currently guest IA32_TSC_AUX MSR is loaded manually right before VM
entry, and saved right after VM exit.

This patch enables VM-Entry Control and VM-Exit Control to switch
MSR IA32_TSC_AUX between host and guest automatically. This helps to
keep vcpu_thread() function and struct acrn_vcpu cleaner.

Also it removes the dead code of intercepting IA32_TSC_AUX.

Tracked-On: #1867
Signed-off-by: Zide Chen <zide.chen@intel.com>
Reviewed-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-27 09:26:29 +08:00
Yonghua Huang
9d529fb9e6 hv:use copy of guest's memory block in 'hcall_set_vm_memory_regions()'
to avoid passing guest's memory block into hypervisor internal
process for security.

Tracked-On: #861
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-23 09:05:15 +08:00
Mingqiang Chi
297a264a74 hv:Cleanup ptdev lock
Move ptdev lock out from add_intx_remapping/add_msix_remapping
/remove_intx_remapping/remove_msix_remapping and make it protect
the whole add entry/remove entry process

v3-->v4:
  --move ptdev lock out

v2-->v3:
  -- still use ptdev lock for add/remove ptdev entry
Tracked-On: #861
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Reviewed-by: Binbin Wu <binbin.wu@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
2018-11-22 11:26:04 +08:00
Mingqiang Chi
b7bbf81287 hv:Replace dynamic memory with static for ptdev
-- Config MAX_PT_IRQ_ENTRIES 64 in Kconfig
-- Remove ptdev list
-- Add alloc_ptdev_entry_id api

v3-->v4:
  -- move is_entry_active from assign.c to ptdev.h
  -- Add clear active flag in release_entry
v2-->v3:
  -- Remove redundancy active check for ptdev entry
     in release_all_entries and get_ptdev_info
v1-->v2:
  -- split to small patches

Tracked-On: #861
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Reviewed-by: Binbin Wu <binbin.wu@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
2018-11-22 11:26:04 +08:00
Shuo Liu
e8296dce05 hv: Add IO request completion polling feature
This patch introduce a new mode of IO request completion, polling mode.

Now, the sketch of ioreq process can be,
  A. UOS vcpu0 generate PIO/MMIO ->
   B. pcpu1(vcpu0 of UOS) trap into HV ->
    C. pcpu1 build ioreq, send IPI and enter idle ->
     D.1 pcpu0(vcpu0 of SOS) response IPI,
     D.2 pcpu0 handle the ioreq in HV, kernel, DM,
     D.3 pcpu0 mark ioreq as complete,
     D.4 pcpu0 hypercall to enter HV ->
       E.1 pcpu0 send IPI to wake pcpu1 up
       E.2 UOS vcpu0 continue running

With this change, it skips D.4, E.1 steps. In step C, pcpu1 will enter a
polling ioreq state idle after send out the IPI.
It can save about ~5000 cpu cycles.

In polling mode, we do the polling in idle instead of pause cpu all the
time. It will consume more power. A better way is to use monitor/mwait
instructions which can put cpu into a sleep state with monitoring a
memory address. Unfortunately, APL has bug with monitor. We can gather
all ioreqs state into one monitorable memory and take advantage of
monitor/mwait for future platform.

The way polling or notification is per VM. We can config VMs in
different mode. By default, IO request completion will use notification
mode for all VMs. We can switch it by Kconfig.

Tracked-On: #1821
Signed-off-by: Shuo Liu <shuo.a.liu@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-11-21 14:35:12 +08:00
Minggui Cao
e350abe40d HV: handle adding ptdev entry failure cases
handle adding pass-through device entry failure cases,
instead of calling ASSERT, to avoid hypervisor crash.

Tracked-On: #1860
Signed-off-by: Minggui Cao <minggui.cao@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-11-21 12:40:23 +08:00
Shiqing Gao
119eccfea1 hv: hypercall: clean up HV_DEBUG usage
remove the usage of HV_DEBUG in hypercall.c and vmcall.c

TO-DO:
Enhance Makefile to compile debug/release into 2 libraries

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-20 10:01:50 +08:00
Shiqing Gao
9c025190a9 hv: hv_main: clean up HV_DEBUG usage
- Remove the usage of HV_DEBUG in hv_main.c
The usage of HV_DEBUG in hv_main.c is for the shell command 'vmexit'.
Since vmexit info has been captured by acrntrace, there is no need to
keep this duplicated feature in shell command.

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
Reviewed-by: Yin Fengwei <fengwei.yin@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
2018-11-16 14:47:24 +08:00
Shuo Liu
61e6c1f054 hv: reset VM ioreqs in reset_vm
ioreqs acrossing VM reset is meaningless. So we reset their status when
VM reset.
Please note, device model and service os need to handle various ioreqs
pending status in emergency reset condition carefully. Otherwises, the
post processing of such ioreqs might overwrite this reset.

Tracked-On: projectacrn#1821
Signed-off-by: Shuo Liu <shuo.a.liu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-16 09:14:26 +08:00
Shiqing Gao
d97224a4b5 hv: fix integer violations
fix the following integer violations:
1. Signed/unsigned conversion without cast
2. Literal value requires a U suffix
3. Implicit conversion of underlying type

v3 -> v4:
 * change the type of npk_loglevel/mem_loglevel/console_loglevel
   from uint32_t to uint16_t

v2 -> v3:
 * discard the return value of update_ept
 * discard changes related to npk loglevel

v1 -> v2:
 * remove the unnecessary changes related to the false positive
   issues caused by scanning tool
 * change the type of the local variable 'vlapic_id' from uint8_t
   to uint32_t in function 'vlapic_build_id'
 * change the type of the struct member 'flags' in shared_buf from
   uint64_t to uint32_t

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-14 12:46:34 +08:00
Zhao Yakui
3cbaf02830 HV: Use parameter directly to pass bdf for hcall_assign/deassign_ptdev
The the bdf(bus/dev/func) is used to determine which pass-through device should
be assigned/released. Now the hypervisor parses the corresponding bdf from the guest
physical address when hcall_assign_ptdev/hcall_deassign_ptdev is called.
As it is only uint16_t, it is unnecessary to use the GPA to pass the bdf parameter.
Instead the parameter can be used as the bdf directly.

In order to keep the compatibility, it still can get the bdf by using
copy_from_gpa when SOS passes the parameter based on the buffer. But this will
be depreciated.
This is based on the assumption that the GPA in SOS is greater than 0x10000
when one buffer is allocated to pass the corresponding hypercall parameter.
After the SOS uses the bdf to pass the hypercall paremeter, we can remove the code
that gets the bdf by using copy_from_gpa.

V1->V2: Add some comments for hcall_assign_ptdev/hcall_deassign_ptdev.

Tracked-on: #1751
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-08 14:36:46 +08:00
Li, Fei1
605738fc0c hv: hypercall: remove hcall_set_vm_memory_region
Since it's discarded.

Tracked-On: #1124
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-08 13:04:27 +08:00
Li, Fei1
121454c4bd hv: fix a minor bug of static checks
When a macro is expanded, the two tokens on either side of each ‘##’ operator
are combined into a single token, which then replaces the ‘##’ and the two
original tokens in the macro expansion. So we need use CAT__ to expand the
__LINE__ MACRO and use CAT_ to combine the expaneded MACRO.

Tracked-on: #1750
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-11-08 09:26:56 +08:00
Yin Fengwei
0fc47b5a7c hv: fix release build issue
The old doc update commit changed the code by accident and broke
release version build. This patch fix the release build issue.

Tracked-On: #1595
Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-07 15:39:01 +08:00
Shiqing Gao
366042cac2 hv: fix integer violations
- Fix the integer violations related to the following rules:
  1. The operands to shift operations (<<, >>) shall be unsigned
     integers.
  2. The operands to bit operations (&, |, ~) shall be unsigned
     integers.

- Replace 12U with CPU_PAGE_SHIFT when it is address shift case.

v1 -> v2:
 * use existed MACRO to get bus/slot/func values
 * update PCI_SLOT MACRO to make it more straightforward
 * remove the incorrect replacement of 12U with CPU_PAGE_SHIFT
   dmar_fault_msi_write

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-06 16:18:56 +08:00
Yin Fengwei
7f57a74fe7 hypercall doc: Sync the comments for each hypercall from .h to .c
For all the hypercalls, we sync the comments from .h to .c as
comments in .h file are used in architectural design and the
comments in .c are used in module design.

Tracked-On: #1595
Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
2018-11-06 09:12:40 +08:00
Xiangyang Wu
99586e32cc HV:treewide:rename vm data structure
For data structure types "struct vm", its name is identical
with variable name in the same scope. This is a MISRA C  violation.

Naming convention rule:If the data structure type is used by multi
modules, its corresponding logic resource is exposed to external
components (such as SOS, UOS), and its name meaning is simplistic
(such as vcpu, vm), its name needs prefix "acrn_".

The following udpates are made:
struct vm *vm-->struct acrn_vm *vm

Tracked-On: #861

Signed-off-by: Xiangyang Wu <xiangyang.wu@linux.intel.com>
2018-11-05 15:35:49 +08:00
Xiangyang Wu
ace4f48c9a HV:treewide:rename vcpu_arch data structure
For data structure types "struct vcpu_arch", its name
shall follow Naming convention.

Naming convention rule:If the data structure type is
used by multi modules, its corresponding logic resource
is exposed to external components (such as SOS, UOS),
and its name meaning is simplistic (such as vcpu, vm),
its name needs prefix "acrn_". Variable name can be
shortened from its data structure type name.

The following udpates are made:
struct vcpu_arch arch_vcpu-->struct acrn_vcpu_arch arch

Tracked-On: #861

Signed-off-by: Xiangyang Wu <xiangyang.wu@linux.intel.com>
2018-11-05 15:35:49 +08:00
Xiangyang Wu
fa26a16645 HV:treewide:rename vcpu data structure
For data structure types "struct vcpu", its name is identical
with variable name in the same scope. This is a MISRA C  violation.

Naming convention rule:If the data structure type is used by multi
modules, its corresponding logic resource is exposed to external
components (such as SOS, UOS), and its name meaning is simplistic
(such as vcpu, vm), its name needs prefix "acrn_".

The following udpates are made:
struct vcpu *vcpu-->struct acrn_vcpu *vcpu

Tracked-On: #861

Signed-off-by: Xiangyang Wu <xiangyang.wu@linux.intel.com>
2018-11-05 15:35:49 +08:00
Junjie Mao
e0fcb70daa HV: io: add structure and API docs
This patch adds more comments to describe the structures and functions that are
public to the other components in the hypervisor. The comments are in
doxygen-style for document generation.

v2 -> v3:

* Reformat the flow in the doc for vhm_io_request.

v1 -> v2:

* Fix typos and inconsistencies in the comments.
* Wrap the text-based diagram in the doc for vhm_request in @verbatim

Tracked-On: #1595
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
2018-11-04 20:30:38 -08:00
Li, Fei1
0391f84c83 hv: mmu: replace dynamic memory allocation in memory
Replace dynamic memory allocation in memory management with static memory allocation.
Since the static memory allocation can guarantee the allocation never failed, so
split_large_page and construct_pgentry don't need to return a errno any more.
Besides, the destroy_ept don't need to free page any more. Instead, it would memset
the eptp to 0 to make sure we can't walk this paging table again.

Tracked-On: #861
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2018-11-02 13:15:48 +08:00
Li, Fei1
dc9d18a868 hv: mmu: add static paging table allocation for hypervisor
Add static paging table allocation API for hypervisor.
Note: must configure PLATFORM_RAM_SIZE and PLATFORM_MMIO_SIZE exactly as the platform.

Rename RAM_START/RAM_SIZE to HV_RAM_START/HV_RAM_SIZE for HV.

Tracked-On: #861
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2018-11-02 13:15:48 +08:00
Minggui Cao
b048835c45 HV: fix bug "vmexit" cmd cause HV console hung
on KBL-NUC when input "vmexit" in hypervisor console,
the console or HV/SOS could be hung, the root cause is:
the log buffer is overflow for 8 CPU cores info.

to resolve the issue:
1. increase the shell log buffer size according to the
physical CPU max number
2. check the snprintf return value, if no buffer left,
just return.

Tracked-On: #1587
Signed-off-by: Minggui Cao <minggui.cao@intel.com>
Reviewed-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-02 09:13:57 +08:00
Zide Chen
0255e62798 hv: resolve the negative impacts to UOS MSI/MSI-X remapping
After enabling vPCI in hypervisor for vm0, UOS may not able be launched
successfully. Consider this scenario (take MSI-X for example):

- DM makes hypercall to hypervisor to do MSI-X remapping on behalf of
  UOS guests.
- After the hypercall, VHM module in SOS kernel updates the physical
  MSI-X table with the physical Message Data/Addr.
- These MMIO write requests are intercepted by hypervisor, which will
  call ptdev_msix_remap() to do MSI-S remapping.

It may fail due to 2 possible reasons:

1) wrong target VM because:
  hypervisor thinks it's a VM0 MSI-X device but they have been registered
  as UOS guests through HC_SET_PTDEV_INTR_INFO hypercall.

2) wrong ptdev_msi_info->vmsi_data because:
  The virtual MSI-X table is supposed to hold virtual Message data/addr
  but the SOS VHM writes the physical ones to it.

This patch resolves these problems by ignoring the HC_VM_PCI_MSIX_REMAP
hypercall, so virtual and physical Message Data are the same from SOS'
perspective and it won't mess up the virtual PCI device in HV.

Also in HC_SET_PTDEV_INTR_INFO handler, vpci updates the target VM
when the PCI devices are assigned to different VMs.

The UOS' MSI/MSI-X remapping is triggered by hypervisor when SOS (either
DM or VHM) updates the Message Data/Addr.

Tracked-On: #1568
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-11-01 21:22:10 +08:00
Yonghua Huang
05bb7aa212 hv: remove deprecated hypercalls
below hypercalls are wrapped to HC_SET_IRQLINE:
- HC_ASSERT_IRQLINE
- HC_DEASSERT_IRQLINE
- HC_PULSE_IRQLINE

Tracked-On: #861
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-10-30 09:59:27 +08:00
Chinthapally, Manisha
8ba333d275 HV: Added Initial support for SEP/SOCWATCH profiling
This patch adds support to sep/socwatch profiling
     Adds 2 new files include/arch/x86/profiling.h and arch/x86/profiling.c
     which contains most of the implementation for profiling,most of the functions
     in profiling.c have dummy implementation and will be implemented in next patches

     a. cpu.c, Initial profiling setup is done as part of bsp_boot_post
  and cpu_secondary_post flow
     b. vmcall.c, New ioctl is added for performing profiling related
  operations in vmcall_vmexit_handler
	ioctl - HC_PROFILING_OPS
        function - hcall_profiling_ops()
     c. common/hypercall.c, hcall_profiling_ops() implementation.
     d. hv_main.c, In vcpu_thread calling profiling related functions
  to save vm context
     e. acrn_hv_defs.h, list all the profiling command types

Tracked-On: projectacrn#1409
Acked-by: Eddie Dong <eddie.dong@intel.com>
Signed-off-by: Chinthapally, Manisha <manisha.chinthapally@intel.com>
2018-10-26 13:39:07 +08:00
Huihuang Shi
46d198244f HV:vcpu fix "Pointer param should be declared pointer to const"
Fix violations whose parameter can be read-only.
This patch only fix the parameter whose name is vcpu.

Tracked-On: #861
Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-10-25 13:45:14 +08:00
Huihuang Shi
ea32c34ae1 HV:fix "Pointer param should be declared pointer to const"
Fix violations for function whose parameter can be read-only.

Tracked-On: #861
Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-10-25 13:45:14 +08:00
Yin Fengwei
4f19b3b875 hv: Prepare the gdt table for VM
For VMs of partition mode, there is no guarantee 1:1 mapping
between gpa and hpa, we need to copy the native gdt table to
each VM's memory.

Tracked-On: #1565
Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-10-25 13:43:46 +08:00
Yonghua Huang
8f7fa50d5a hv: fix mapping between GSI Num#2 and PIC IRQ #0
route GSI number#2 to PIC IRQ#0, as by default IRQ for
 8254 timer is connected to I/O APIC Pin #2 and PIC Pin #0

Tracked-On: #861
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-10-25 13:42:45 +08:00
Minggui Cao
241d5a684e HV: fix bug by improving intr delay timer handling
1. it need delete intr delay timer when its ptdev entry
is deactivated to avoid the timer still active;

2. if the dequeued entry will be added by delay timer,
it need reset current variable "entry" to find next one,
or it could be returned and handled (if it is the last one)
, then the entry's IRQ can come again, and it'll cause its
timer added twice.

Tracked-On: #1476
Signed-off-by: Minggui Cao <minggui.cao@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-10-25 13:30:47 +08:00
Li, Fei1
49b476bb56 hv: vm_load: set zeropage just past boot args
Which should in Linux guest gpa, not in hypervisor HVA.

Tracked-On: #1124
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2018-10-23 09:12:51 +08:00
Huihuang Shi
60b216a460 HV:fixed "Pointer param should be declared pointer to const"
Pointer param should be declared pointer to const if
the parameter is keeped read-only.
This patch changes pointer param whose name is vm.

Tracked-On:#861
Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-10-19 22:49:38 +08:00
Mingqiang Chi
85ececd2d7 hv:Simplify for-loop when walk through the vcpu
-- Not return NULL for vcpu_from_vid
  We have replaced dynamic memory with static memory for vcpu,
  then if vcpu_id is valid, this API should not return NULL.
-- Simplify the for-loop when walk through the vcpu

Tracked-On: #861
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Li, Fei1 <fei1.li@intel.com>
Reviewed-by: Anthony Xu <anthony.xu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-10-19 14:23:08 +08:00
Huihuang Shi
c6c1e42b79 HV:fix 'missing for discarded return value' violations
Return value should be checked,fix it by add
"void" when the function return value is not used.

V1->V2:
    replace printf with pr_warn.
V2->V3:
    change the commit to make read easily.

Tracked-On:#861

Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-10-16 13:31:02 +08:00
Mingqiang Chi
1d725c89c0 hv:Replace dynamic memory with static for vcpu
-- Replace dynamic memory allocation with static memory
-- Remove parameter check if vcpu is NULL

Tracked-On: #861
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-10-15 13:44:25 +08:00
Yin Fengwei
b454a067be hv: remove the vm loader for UOS in hv.
Now, we make UOS to set BSP init state by using hypercall. We
could drop the old UOS loader in HV and make vm loader in HV
only for SOS.

Tracked-On: #1231
Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-10-15 09:04:10 +08:00
Yin Fengwei
3cfbc004f5 hv: add hypercall to set vcpu init state
DM will use this hypercall to initialize the UOS BSP state.

Tracked-On: #1231
Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-10-15 09:04:10 +08:00
Yin Fengwei
a5fc3e5eac hv: Add function to set UOS BSP init state
NOTE: this patch is only workaround patch for UOS BSP state init.
Eventually, the DM will call hypercall to init UOS BSP state.

We use this workaround patch here to simplify the init_guest_state.
Will make the caller of init_guest_state calls init_guest_vmx
directly.

Tracked-On: #1231
Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-10-12 16:27:45 +08:00
Yin Fengwei
08c13a9ea8 hv: Update SOS BSP to use new API to init BSP state
We move the SOS BSP state init to vm loader and drop
function init_guest_context_vm0_bsp.

Update the definition of vm0_boot_context to fix code
violations.

Tracked-On: #1231
Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-10-12 16:27:45 +08:00
Yonghua Huang
0c7e59f01e hv: fix NULL pointer dereference in "hcall_set_vm_memory_regions()"
'target_vm' returned from 'get_vm_from_vmid()' maybe NULL,
 passing to 'is_vm0()' without check.

Tracked-On: #861
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-10-11 19:11:46 +08:00
Shiqing Gao
0317cfb2b6 hv: fix 'No brackets to then/else'
- add missing brackets for 'if/else' statements based on MISRA-C
  requirements

v1 -> v2:
 * add brackets for each conditions in 'if' statements to improve
   the readability
 * modify 'ptdev_init' to make the logic clearer

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
2018-10-11 16:48:11 +08:00
Xiangyang Wu
a11a10fa4e HV:MM:gpa2hpa related error checking fix
In the current hypervisor design, when HPA is not
found for the specified gpa by calling gpa2hpa or
local_gpa2hpa, 0 will be returned as a error code,
but 0 may be a valid HPA for vm0; error checking
is missed when invoking gpa2hpa or local_gpa2hpa;
when invoking lookup_address, the caller guarantees
that parameter pointer pml4_page and pointer pg_size
is not NULL.

If local_gpa2hpa/gpa2hpa returns a invalid HPA,
it means that this function fails to find the
HPA of the specified gpa of vm. If local_gpa2hpa/gpa2hpa
return value is a valid HPA, it means that this
function have found the HPA of the specified gpa of vm.

Each valid vm's EPTP is initialized during vm creating,
vm's EPTP is valid until this vm is destroyed. So the caller
can guarantee parameter pointer pml4_page is not NULL.
The caller uses a temporary variable to store page size.
So the caller can guarantee parameter pointer pg_size
is not NULL.

In this patch, define a invalid HPA for gpa2hpa and
local_gpa2hpa;add some error checking when invoking
local_gpa2hpa/gpa2hpa;add precondition for lookup_address
function and remove redundant error checking.

V1-->V2:
	Define INVALID_HPA as a invalid HPA for gpa2hpa
	and local_gpa2hpa;
	Updated related error checking when invoking
	gpa2hpa or local_gpa2hpa;
V2-->V3:
	Add some debug information if specified gpa2hpa
	mapping doesn't exit and ept_mr_del is called;
	Update INVALID_HPA definition easier to be reviewed.
V3-->V4:
	Add vm->id and gpa into pr_error;
	Add precondition to ept_mr_del to cover [gpa,gpa+size)
	unmapping case.
V4-->V5:
	Update comments;
	Update pr_error message.

Tracked-On: #1258

Signed-off-by: Xiangyang Wu <xiangyang.wu@linux.intel.com>
Reviewed-by: Li, Fei1 <fei1.li@intel.com>
2018-10-11 15:16:11 +08:00
Li, Fei1
cc89e52d5b hv: mmu: make page table operation no fault
Page table operation would not fault except:
1. the hypervisor it out of memory to allcate a page for page table operation
2. there is a bug with page table operation in hypervisor or devicemodle
While we assue that these would not happened in our platform when release, so
there is no need to check whether there is a fault with page table operation. However,
for debug version, we would panic the hypervisor if we can't meet the conditions really.

Tracked-On: #1124
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2018-10-10 09:36:51 +08:00
Mingqiang Chi
b8e59e1638 hv:Replace dynamic memory with static for vm
-- Replace dynamic memory allocation with static memory
-- Remove the parameter check if the vm is NULL

Tracked-On: #861
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-10-09 13:24:21 +08:00
Junjun Shan
5c92329606 hv:clear up the usage of printf data struct
The printf related functions have been called by other various
functions, e.g. get_ptdev_info(), get_ioapic_info, etc. The patch
is used to clear up the usage.

Tracked-On: #861
Signed-off-by: Junjun Shan <junjun.shan@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-09-28 16:40:07 +08:00
Yonghua Huang
9a05fbea78 HV: remove IRQSTATE_ASSERT/IRQSTATE_DEASSERT/IRQSTATE_PULSE
- replace vpic/vioapic_xassert_irq() APIs
      with vpic/vioapic_set_irq()

   - unify the description of IRQ/PIN state in vpic. & vioapic.c

Tracked-On: #861
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-09-28 13:14:30 +08:00
Yonghua Huang
dd6a5fbe95 HV: Add hypercall to set/clear IRQ line
- wraps ASSERT/DEASSERT IRQ line hypercalls.
    - remove 'intr_type' from set/clear IRQ line interface.
    - deprecate "IRQ_ASSERT", "IRQ_DEASSERT" & "IRQ_PULSE".
    - new adding hypercall will support "GSI_SET_HIGH"/
      "GSI_SET_LOW"/ "GSI_RAISING_PULSE"/ "GSI_FALLING_PULSE"
      operations

Tracked-On: #861
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-09-27 16:49:52 +08:00
Yin Fengwei
3178ecea72 hv: Fix the warning for ACRN release build
Now, the warning is promoted to error. The warning break ACRN
release build.

Tracked-On: #1343
Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-09-27 15:46:47 +08:00
Zhao Yakui
a189be26ff HV: Add one hcall to set the upcall vector passed from sos_kernel
Currently the acrn-hypervisor is using the PLATFORM_IPI vector to notify
the sos_kernel. And then sos_kernel will handle the notification from acrn
hypervisor in PLATFORM_IPI ISR. But as the PLATFORM_IPI ISR can be registered
by the other modules, it will have the conflict when trying to register
acrn intr ISR. So the HYPERVISOR_CALLBACK_VECTOR will be used instead.

In order to switch the notification vector from PLATFORM_IPI to
HYPERVISOR_CALLBACK_VECTOR, one API is added so that sos can configure
the up-notifier interrrupt vector.

Tracked-On: https://github.com/projectacrn/acrn-hypervisor/issues/1325
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-09-26 11:23:34 +08:00
Zhao Yakui
a8e688eb72 HV: Use the variable to fire VHM interrupt
This is to do the preparation of switch the notifier vector from
PLATFORM_IPI to HYPERVISOR_CALLBACK_VECTOR.

Currently the acrn-hypervisor is using the PLATFORM_IPI vector to notify
the sos_kernel. And then sos_kernel will handle the notification from acrn
hypervisor in PLATFORM_IPI ISR. But as the PLATFORM_IPI ISR can be registered
by the other modules, it will have the conflict when trying to register
acrn intr ISR. So the HYPERVISOR_CALLBACK_VECTOR will be used instead.

Tracked-On: https://github.com/projectacrn/acrn-hypervisor/issues/1325
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-09-26 11:23:34 +08:00
Junjun Shan
89ca54cafa hv:Fix unused var value on all paths
MISRAC checks whether a variable is assigned a value not used in
all branches of a program. Var value which is unused on all paths
can be removed with a consequent improvement in the readability
and efficiency of the code. This patch is used to fix these
violations.

Tracked-On: #861
Signed-off-by: Junjun Shan <junjun.shan@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-09-26 11:10:21 +08:00
Shiqing Gao
8787c06d3b hv: arch: fix 'Unused procedure parameter'
MISRA-C requires that there should be no unused parameters in
functions.

In some cases, we will keep the unused parameters.
vmexit handler is one example. It is used as function pointer.
Some of the vmexit handlers use the input parameter 'vcpu', some of
them don't. We still need to keep the unused parameters 'vcpu' for
those handlers don't use 'vcpu'.

This patch removes the unused parameters that is not being used
unconditionally.

v1 -> v2:
 * remove the non-implemented API 'vlapic_id_write_handler'

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-09-26 10:48:55 +08:00
Minggui Cao
d123083fa9 HV: add hypercall to monitor UOS PTdev intr status
The hypercall can be used by SOS/DM to monitor UOS
pass-thru devices' interrupt data; and if an "interrupt
storm" happens in UOS, it can be used to delay the UOS
PTdev interrupt's injection for sometime.

The two functions are implemented by one hypercall with
two sub-commands, and with the data/params in the buffer.

Tracked-On: #866
Signed-off-by: Minggui Cao <minggui.cao@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-09-25 11:09:35 +08:00
Minggui Cao
918403f925 HV: modify code for intr storm detect & handling
This patch is to enhance the feature of "interrupt storm
mitigation"; when interrupt storm happens on one UOS
it should keep as smaller effect to SOS as possible.

Add variables in PTdev entry & VM, used to record one
UOS's pass-thru devices' interrupt data; add a function
to collect the data.

Also add a timer used to delay UOS pass-thru devices'
interrupt injection if an "interrupt storm" detected
by SOS.

Tracked-On: #866
Signed-off-by: Minggui Cao <minggui.cao@intel.com>
Reviewed-by: Li Fei1 <fei1.li@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-09-25 11:09:35 +08:00
Junjun Shan
eb8c4fb0d5 hv:Fix Implict conversion:actual to formal param
MISRAC has requirement about implict conversion: actual to formal
param. This patch is used to fix part of these violations.

1.Add a new structure seg_desc_vmcs to hold the VMCS field address of
segment selector to clean up seg_desc structure.

2.Add the definition of maximum MSI entry and the relevant judgement.

3.The violations in shell.c, logmsg.c will be fixed in other series of
patches with modification of function snprintf(), vsnprintf() and other
related usages.

v1->v2:
  *Move the definition of struct seg_desc_vmcs from instr_emul.h to
   instr_emul.c.
  *Modify the formal parameter type in function definition from uint8_t
   to char instead of using cast.
  *Drop the const declaration for char data in formal parameter.

v2->v3:
  *update the data missing conversion.
  *change type of internal parameter len to avoid casting in npklog.c.
  *change the conversion from signed char to unsigned int in
   uart16550_getc() to solve sign-extension.

Tracked-On: #861
Signed-off-by: Junjun Shan <junjun.shan@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-09-18 13:09:39 +08:00
Xiangyang Wu
bb0a2bc2ab HV:Hypercall:Remove redundant error checking
In the current hypervisor hypercall, first all vcpu is
allocated to SOS, vcpu's vm field is initialized to vm0.
When the vcpu is offlined, vcpu will be paused and vcpu's
vm field is set as NULL by DM. When UOS is created, vcpu's
vm field is set as UOS's vm. So when vmcall_vmexit_handler
is invoked, vcpu's vm filed is always non-NULL.
error checking for vm pointer is done in the function
"vmcall_vmexit_handler", vmcall_vmexit_handler will
guarantee that vm is vm0.

So all hypercall functions (these functions is just for handler
hypercall, except vmcall_vmexit_handler) don't need to check
whether invoking vm is NULL and don't need to check whether
invoking vm is vm0 or not.

Remove related invoking vm error checking for hypercall handling.

V1 --> V2:
	Add pre-condition for hypercall in the head file.
V2 --> V3:
	Add pre-condition for copy_from_gpa and copy_to_gpa.
V3 --> V4:
	Add pre-condition both in the head file and source file.

Tracked-On:#1258

Signed-off-by: Xiangyang Wu <xiangyang.wu@linux.intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-09-18 09:43:24 +08:00
Junjun Shan
83d1ddc6d8 hv:Delete the dead code
Delete the dead code get_irq_info(), local_get_irq_info() in io_request.c
and definition in guest.h.

v1->v2
 *the dead code used pointers which not checked before use, therefore it
  causes "pointer not checked for null before use". To make it clearly,
  modify the subject to "delete the dead code" directly.

 *remove dead code local_get_irq_info() in io_request.c and definition
  in guest.h together.

Tracked-On: #861
Signed-off-by: Junjun Shan <junjun.shan@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-09-17 09:52:02 +08:00
Junjun Shan
4fd5102edc hv:treewide:fix multiple MISRAC violations
MISRAC has requirements about literal value requires a U suffix and
signed/unsigned conversion with cast. This patch is used to solve
these violations.

v1->v2
 *Drop the cast of sz from uint32_t to int32_t, the signed/unsigned
  violation of nchars will be solved by other patch together with
  printf/sprintf/console/vuart/uart code.

 *Delete the unnecessary L suffix of shifting operand.

Tracked-On: #861
Signed-off-by: Junjun Shan <junjun.shan@intel.com>
Reviewed by: Junjie Mao <junjie.mao@intel.com>
2018-09-13 11:12:29 +08:00
Jason Chen CJ
00edd838c9 hypercall: no need check HV memory overlap for MR_DEL
in local_set_vm_memory_region, hpa is not used for MR_DEL, and it does
not need check HV memory overlap for a MR_DEL operation.

this is a bug exposed by remapping SOS first page, as the remap page whose
gpa = 0 actually fall into HV memory area; while during MR_DEL, the input
param vm0_gpa is set to 0 by default.

Tracked-On: #1124
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
2018-09-13 10:10:22 +08:00
Mingqiang Chi
60c05ace1a hv:Replace vlapic pointer with instance in vcpu_arch
-- update 'vlapic' in 'struct vcpu_arch' from pointer
   to instance
-- add inline function(vcpu_vlapic) in vcpu.h

Tracked-On: #861
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-09-12 09:20:07 +08:00
Jason Chen CJ
457ac7408d vcpu: replace start_vcpu with run_vcpu
run_vcpu should be a more suitable name

Tracked-On: #1199
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
2018-09-11 10:47:34 +08:00
Minggui Cao
99285f844a HV: improve pass-thru device interrupt process
for each pass-thru device and its entry owned by one VM, so
change the pass-thru device's softirq lock & entry list into
per VM, so one VM's PT device interrupt process will not
interfere with other VMs; especially in case one user OS
"interrupt storm" happens, it will have little effect on
service OS.

Tracked-On: #866
Signed-off-by: Minggui Cao <minggui.cao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-09-10 10:12:45 +08:00
Shiqing Gao
97aeb7f4ff hv: pgtable: fix 'Use of function like macro'
Convert HPA2HVA, HVA2HPA, GPA2HVA and HVA2GPA to inline functions.

v1 -> v2:
 * Modify the following statement.
   rsdp = biosacpi_search_rsdp((char *)hpa2hva((uint64_t)(*addr << 4)),
                                                                0x400);
   Instead of "(uint64_t)(*addr << 4)", "(uint64_t)(*addr) << 4U" would
   be clearer.

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
2018-09-07 11:11:06 +08:00
Shiqing Gao
67038794af hv: treewide: convert some MACROs to inline functions
MISRA-C requires that each parameter in the MACRO shall be in brackets.

In some cases, adding brackets for all of the parameters may not be a
perfect solution.
For example, it may affect the code readability when there are many
parameters used in the MACRO.
And duplicated brackets will appear when one MACRO called another MACRO
which is using same parameters.

This patch convert some MACROs to inline functions to avoid such cases.

v1 -> v2:
 * Remove the unnecessary changes in hypervisor/bsp/uefi/efi/boot.h

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
2018-09-04 12:27:18 +08:00
Cai Yulong
a4cb3913b3 hv: fixup format of log message in vm_load.c
Tracked-On: #1137
Signed-off-by: Cai Yulong <yulongc@hwtc.com.cn>
2018-09-04 10:08:32 +08:00
Shiqing Gao
54439ecae1 hv: treewide: fix 'Expression is not Boolean'
MISRA-C requires that the controlling expression of an if statement or
an iteration-statement shall be Boolean type.

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
2018-09-03 11:23:53 +08:00
Li, Fei1
06ab2b829f hv: mmu: add 1GB page capability check when CPU boot
Add 1GB large page support limit on our platform.

Tracked-On: #1124

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-09-03 09:32:49 +08:00
Li, Fei1
58fffcd3b9 hv: mmu: rename PTT_HOST to PTT_PRIMARY
Tracked-On: #1124

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-09-03 09:32:49 +08:00
Shiqing Gao
10c64a5fca hv: fix MISRA-C issues related to for loop
This patch fixes the following issues:
- Assignment operation in expression.
- For loop incrementation is not simple.
- No brackets to loop body.
- Use of comma operator.

v1 -> v2:
 * Replace &x->y with &(x->y) based on our new coding rule

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
2018-08-31 09:20:48 +08:00
Li, Fei1
4bb8456de8 hv: ept: refine ept_mr_add base on mmu_add
Refine ept_mr_add base on mmu_add. The old map_mem could be removed
once this was done.

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2018-08-23 11:10:26 +08:00
Li, Fei1
da57284ba5 hv: ptdev: simplify struct ptdev_msi_info
The virt_vector/phys_vector are only used for debugging.
Rename msix to is_msix.

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-08-23 11:10:04 +08:00
Li, Fei1
2371839cad hv: ptdev: remove vector index from structure ptdev_msi_info
Since it's stored in source id already.

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-08-23 11:10:04 +08:00
Li, Fei1
e8c0763de6 hv: ptdev: add source_id for ptdev to identify source
Then use the source id to lookup the ptdev remapping entry.
For msi interrupt ptdev: use bdf and vector_index to identify the id;
For intx interrupt ptdev: use pin and pin source to identify the id.

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-08-23 11:10:04 +08:00
Zhi Jin
dcae438306 hv: add a hypercall for the hypervisor NPK log
The hypercall HC_SETUP_HV_NPK_LOG is added to enable/disable/configure
the hypervisor NPK log.

Signed-off-by: Zhi Jin <zhi.jin@intel.com>
Signed-off-by: Zhonghua Sun <zhonghua.sun@intel.com>
Reviewed-by: CHEN Gang <gang.c.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-08-23 11:09:25 +08:00
Mingqiang Chi
c43d0e4f01 hv:Changed several APIs to void type
Since these APIs always return 0,
change them to void type,
vcpu_set_cr0()
vmx_write_cr0()
vcpu_set_cr4()
vmx_write_cr4()
kick_notification()
tsc_deadline_handler()
dmar_fault_handler()
ptdev_interrupt_handler()

Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
2018-08-23 08:54:54 +08:00
Yan, Like
a8cd6925fc hv: pirq: clean up irq handlers
There are several similar irq handlers with confusing function names and it's
not friendly to call update_irq_handler() to update a proper handler after
request_irq().

With this commit, a single generic irq handler is being used, in which, no lock
need to be acquired because our design could guarantee there is no concurrent
irq handling and irq handler request/free.
A flags field is added to irq_desc struct to select the proper processing flow
for an irq. Irqflags is defined as follows:
 IRQF_NONE       (0U)
 IRQF_LEVEL      (1U << 1U)       /* 1: level trigger; 0: edge trigger */
 IRQF_PT         (1U << 2U)       /* 1: for passthrough dev */

Because we have only one irq handler, update_irq_handler() should be replace by
set_irq_trigger_mode(), whichs set trigger mode flag of a certian irq.
Accordingly, the code where called update_irq_handler() need to be updated.

Signed-off-by: Yan, Like <like.yan@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-08-17 14:25:52 +08:00
Yan, Like
f77d885d7e hv: pirq: clean up unnecessary fields of irq_desc
This commit cleans up fiels of struct irq_desc:
- remove name, irq_desc_state, irq_cnt and irq_lost_cnt which are not used.
- remove irq_ prefix of irq_lock field of struct irq_desc;
- change enum irq_state to enum irq_use_state;

Signed-off-by: Yan, Like <like.yan@intel.com>
Reviewed-by: Li, Fei <fei1.li@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-08-17 14:25:52 +08:00
Sainath Grandhi
0c93a1388c hv: sw_loader for VMs in ACRN partition mode
ACRN in partition mode needs to boot VMs from HV. This patch make ACRN
treat all VMs in the same way (as vm0)  w.r.t. setting up the guest memory
for kernel, bootargs and zeropage

Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
2018-08-17 10:04:51 +08:00
Yonghua Huang
d030595194 HV: remove 'spinlock_rfags' declaration
- remove the global declaration of 'cpu_int_value'

Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-08-16 09:43:04 +08:00
Mingqiang Chi
de487fff2b hv:fix return value violations for vpic/vioapic
-- Change these APIs to void type, add pre-conditions,
   and move parameter-check to upper-layer functions.
   handle_vpic_irqline
   vpic_set_irqstate
   vpic_assert_irq
   vpic_deassert_irq
   vpic_pulse_irq
   vpic_get_irq_trigger
   handle_vioapic_irqline
   vioapic_assert_irq
   vioapic_deassert_irq
   vioapic_pulse_irq
-- Remove dead code
   vpic_set_irq_trigger

v1-->v2:
   add cleanup vpic
   change some APIs to void type, add pre-conditions,
   and move the parameter-check to upper-layer functions.

Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-08-16 09:01:08 +08:00
Jason Chen CJ
8ef072165f idle: enable IRQ in default idle
we should let cpu handle IRQ during idle

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
2018-08-15 12:05:18 +08:00
Junjie Mao
6e96243b01 HV: io: drop REQ_STATE_FAILED
Now the DM has adopted the new VHM request state transitions and
REQ_STATE_FAILED is obsolete since neither VHM nor kernel mediators will set the
state to FAILED.

This patch drops the definition to REQ_STATE_FAILED in the hypervisor, makes
''processed'' unsigned to make the compiler happy about typing and simplifies
error handling in the following ways.

* (dm_)emulate_(pio|mmio)_post no longer returns an error code, by introducing a
  constraint that these functions must be called after an I/O request
  completes (which is the case in the current design) and assuming
  handlers/VHM/DM will always give a value for reads (typically all 1's if the
  requested address is invalid).

* emulate_io() now returns a positive value IOREQ_PENDING to indicate that the
  request is sent to VHM. This mitigates a potential race between
  dm_emulate_pio() and pio_instr_vmexit_handler() which can cause
  emulate_pio_post() being called twice for the same request.

* Remove the ''processed'' member in io_request. Previously this mirrors the
  state of the VHM request which terminates at either COMPLETE or FAILED. After
  the FAILED state is removed, the terminal state will always be constantly
  COMPLETE. Thus the mirrored ''processed'' member is no longer useful.

Note that emulate_instruction() will always succeed after a reshuffle, and this
patch takes that assumption in advance. This does not hurt as that returned
value is not currently handled.

This patch makes it explicit that I/O emulation is not expected to fail. One
issue remains, though, which occurs when a non-aligned cross-boundary access
happens. Currently the hypervisor, VHM and DM adopts different policy:

* Hypervisor: inject #GP if it detects that the access crossed boundary

* VHM: deliver to DM if the access does not complete falls in the range of a
  client

* DM: a handler covering part of the to-be-accessed region is picked and
  assertion failure can be triggered.

A high-level design covering all these components (in addition to instruction
emulation) is needed for this. Thus this patch does not yet cover the issue.

Tracked-On: #875
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-08-15 12:04:12 +08:00
Kaige Fu
b5a233da9f HV: Enclose debug specific code with #ifdef HV_DEBUG
Thare some debug specific code which don't run on release version, such as vmexit_time,
vmexit_cnt, sbuf related codes, etc...

This patch encloses the codes with #ifdef HV_DEBUG.

Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-08-15 11:17:29 +08:00
Yan, Like
08dd698d99 hv: pirq: rename common irq APIs
This commit cleans up the irq APIs which are a bit confusing.
 - pri_register_handler(), normal_register_handler() and
   common_register_handler() into request_irq(), and removed
   the unnecessary struct irq_request_info;
 - rename the unregister_common_handler() to free_irq();

After the revision, the common irq APIs becomes:
 - int32_t request_irq(uint32_t irq,
                    irq_action_t action_fn,
                    void *action_data,
                    const char *name)

 - void free_irq(uint32_t irq)

Signed-off-by: Yan, Like <like.yan@intel.com>
Reviewed-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-08-15 10:40:43 +08:00
Yan, Like
f6e45c9b13 hv: pirq: remove unnecessary dev_handler_node struct
Since we don't support shared irq, dev_handler_node which works as action node,
is not needed anymore.

This commit removes the dev_handler_node struct and does some relevant changes,
including:
 - moves necessary fields to struct irq_desc: action, priv_data, name; and
   removes unused handler_data;
 - changes return type of pri_/normal_register_handler() from dev_handler_node*
   to int32_t, which is irq num (>= 0) on success, and errno (> 0) on failure.
 - changes unregister_irq_handler() to take argument unint32_t instead of
   dev_handler_node*;
 - changes are made to the places where these APIs are called.

Signed-off-by: Yan, Like <like.yan@intel.com>
Reviewed-by: Eddie Dong  <eddie.dong@intel.com>
2018-08-14 16:48:45 +08:00
Yan, Like
d773df9135 hv: pirq: remove support of physical irq sharing
Because multiple physical devices sharing a single physical pin would be
assigned to a same VM, so UOS could handle the irq sharing. So that we could
remove the physical irq sharing support in HV.

This commit removes the irq sharing support, changes including:
 - removed the dev_list field in irq_desc, and clean up codes for the list
   operation;
 - replace IRQ_ASSIGNED_SHARED and IRQ_ASSIGNED_NOSHARE with IRQ_ASSIGNED;
 - remove argument indicating irq is shared;
 - revise irq request flow for pt devices to remove dependency on irq sharing:
   register irq on adding remapping entery and unregister irq on removal an
   entry, and do not register/unregister at remapping an entry.

Signed-off-by: Yan, Like <like.yan@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-08-14 16:48:45 +08:00
Binbin Wu
a9151ff3fa hv: add compile time assert for static checks
Add two files to do compile time assert.
One is arch specific, and put in hypervisor/arch/x86/.
The other one is common, and put in hypervisor/common/.

If the statement is not true, there will be error during compile time.
The file will not increase the size of HV binary.

Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-08-14 13:05:06 +08:00
Yang, Yu-chu
2fbf70780e HV: Logical conjunction needs brackets
The bracket is required when the level of precedence of
the operators is less than 13. Add the bracket to logical
conjunctions. The commit applys the rule to the files under

Signed-off-by: Yang, Yu-chu <yu-chu.yang@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-08-14 09:53:32 +08:00
Minggui Cao
462284fa7d HV: add pcpu id check before send IPI
to avoid send IPI to self, also improve the related code:
1. get_cpu_id is uint16_t now
2. MISRA-C requirement. like add {}

Signed-off-by: Minggui Cao <minggui.cao@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-08-13 14:07:30 +08:00
Sainath Grandhi
c25a62e5b0 hv: Create E820 entries for OS in partitioning mode ACRN
1) This patch creates static E820 entries for VMs launced by ACRN in
partition mode.
2) Moves vm_description entries from bsp/sbl/ to partition/
3) Removes unused API get_vm_desc_base

Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
2018-08-13 13:58:32 +08:00
Yan, Like
c492a14e53 hv: pirq: do not indicate priority when allocate vector
It's not necessary to specify priority for dynamic allocated vector, because
nested irq is not supported on HV, and irq of any priority would cause VM exit.

This commit makes the following changes:
 - remove the argument indicating priority in struct irq_request_info and
   following functions:
    ptdev_activate_entry()
    find_available_vector()
    irq_desc_alloc_vector()
    normal_register_handler()
 - change the macro of vector ranges:
    VECTOR_DYNAMIC_START/END for dynamically allocable vectors;
    VECTOR_FIXED_START/END for fixed allocated vectors, such as vector for
    timer etc.

Signed-off-by: Yan, Like <like.yan@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-08-10 10:20:31 +08:00
Shiqing Gao
cdd19dc51b hv: treewide: fix 'Variable should be declared static'
Declare a variable with the static qualifier if it is of file scope and
not used in another file.

v1 -> v2:
 * remove the unnecessary change to the following variables, which is
    due to the report issue

   struct multiboot_info *mbi = (struct multiboot_info *)
                        (HPA2HVA((uint64_t)boot_regs[1]));
   struct multiboot_mmap *mmap =
                                (struct multiboot_mmap *)
                                HPA2HVA((uint64_t)mbi->mi_mmap_addr);

Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
2018-08-10 10:15:36 +08:00
Qi Yadong
2fc3bdec40 HV: trusty: new hypercall to save/restore context of secure world
New field in VM's structure:
    sworld_snapshot: save cpu_context of secure world.

New hypercall: HC_SAVE_RESTORE_SWORLD_CTX
    In UOS S3 suspend path: trusty kernel driver will call this hypercall
    to require Hypervisor save context of secure world.
    In UOS S3 resume path: virtual firmware will call this hypercall to
    require Hypervisor restore context of secure world.

New bit in secure_world_control.flag:
    ctx_saved: indicate whether cpu_context of secure world is saved.

Signed-off-by: Qi Yadong <yadong.qi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-08-09 15:09:15 +08:00
Qi Yadong
3225b16e5f HV: trusty: log printing cleanup
Replace some pr_err() with dev_dbg().

Signed-off-by: Qi Yadong <yadong.qi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-08-09 15:09:15 +08:00
Qi Yadong
b5b769f45a HV: trusty: refine secure_world_control
Define Bitmap flag to indicate secure world's state:
    supported: 0(not supported), 1(supported)
    active:    0(inactive), 1(active)

Refine secure_world_memory:
    base_gpa_in_sos: base_gpa from SOS's view
    base_gpa_in_uos: base_gpa from UOS's view, this is the original base_gpa
                     allocated by bootloader.
    Recording above GPA is for usage of trusty EPT destroy and re-create.
    There is an assumption: the secure world's memory address is contiguous
    in both SOS and physical side.

Signed-off-by: Qi Yadong <yadong.qi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-08-09 15:09:15 +08:00
Shiqing Gao
4106fadeb3 hv: treewide: fix 'Switch empty default has no comment'
This patch add some comments after the default and before the break
in the switch statement based on MISRA-C requirement.

Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
2018-08-08 16:01:57 +08:00
Jason Chen CJ
b1612e3072 add cpu_do_idle to handle idle
add wrap function cpu_do_idle in default_idle to handle arch cpu specific
idle operation.

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-08-08 10:00:51 +08:00
Jason Chen CJ
63ef1236de move global x2apic_enabled into arch dir
the x2apic_enabled should be x86 specific field.

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Xu, Anthony <anthony.xu@intel.com>
2018-08-07 09:55:13 +08:00
Jason Chen CJ
3d5d6c96ec vcpu: add get/set register APIs
there will be 3 types of vcpu runtime contexts:
- runtime contexts always saved/restored during VM exit/entry, which
  include general registers rax/rcx/rdx/rbx/rbp/rsi/rdi/r8~r15, cr2 and
  msr for spectre control (ia32_spec_ctrl)
- runtime contexts on-demand cached/updated during VM exit/entry, which
  include frequently used registers rsp, rip, efer, rflags, cr0 and cr4
- runtime contexts always read/write from/to VMCS, which include left
  registers not in above

this patch add get/set register APIs for vcpu runtime contexts, and unified
the save/restore method for them according to above description.

v3:
- update vcpu_get/set_cr0/4 as unified interface to get/set guest cr0/cr4,
  use on-demand cache for reading, but always write to VMCS for writing.

v2:
- use reg_cached/reg_updated for on-demand runtime contexts
- always read/write cr3 from/to VMCS

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-08-07 09:55:13 +08:00
Mingqiang Chi
7345677bbb hv:cleanup vmid related code
Remove structure vm_attr
Wrap two APIs alloc_vm_id and free_vm_id

Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-08-06 12:27:53 +08:00
Yonghua Huang
2299926a88 HV: Refine 'hv_main()' function usage
'hv_main()' wraps several logic which has no dependencies
   each other(enable VMX, prepare to create service os VM..),
   in this case, split this function to make code logic clear.

   remove 'is_vm0_bsp()' & 'hv_main()'
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-08-06 10:34:43 +08:00
Arindam Roy
37026590c9 HV: Rename functions, variables starting with "_"
In order to comply with MISRA C rules, renamed vairables
and function names starting with "_".
The major changes invloves mostly static function
names, as they are being called inside the same file
by a wrapper function.

Signed-off-by: Arindam Roy <arindam.roy@intel.com>
2018-08-03 12:49:01 +08:00
Mingqiang Chi
a3b44a2fa8 hv:Replace 0(cpu_id) with BOOT_CPU_ID
Replace 0(pcpu_id/vcpu_id) with BOOT_CPU_ID

Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-08-03 11:27:52 +08:00
Li, Fei1
8f39a22961 hv: cpu: remove unnecessary cpu_id valid check
Remove unnecessary cpu_id valid check if the cpu_id comes from
get_cpu_id().

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2018-08-02 15:21:34 +08:00
Yin Fengwei
f576f97ea8 hv: add vm restart API
And export the API to DM. DM will do system reboot/S3 resume based
on this API.

Also add the pre-assumption description for some vm APIs.

Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-08-02 13:14:03 +08:00
Huihuang Shi
1664e0c842 HV:fix rest integer violations
Fix integer related violations.
V1->V2:
  clean all memset/calloc integer violations excpet bsp/boot directory

Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-08-02 09:51:58 +08:00
Victor Sun
00bfde3cde HV: rename resume_vm to start_vm in hypercall api
Currently we don't support resume VM in HC API, the real meaning
of the code is to start VM.

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-08-01 12:06:54 +08:00
Li, Fei1
457ecd6ef7 hv: softirq: refine softirq
1. add register_softirq to register a softirq handler
2. rename exec_softirq to do_softirq; raise_softirq to fire_softirq.
3. in do_softirq call registered softirq handler not call
the device softirq handle function directly
4. enable irq after vm exit and disable irq after the first
call do_softirq before vm enter.
5. call do_softirq again when irq disabled to handle the risk
unhandled softirq.
6. rename SOFTIRQ_DEV_ASSIGN to SOFTIRQ_PTDEV
7. remove SOFTIRQ_ATOMIC

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-08-01 11:36:27 +08:00
Li, Fei1
073583cc41 hv: softirq: move softirq.c to common directory
Softirq is not x86 architectural related.

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
2018-08-01 11:36:27 +08:00
Xiangyang Wu
2c95a8c4aa HV:treewide:rename struct pic and iommu_domain
For data structure types "struct pic and struct iommu_domain",
its name is identical with variable name in the same scope.
This MISRA C  violation is detected.

Naming convention rule:If the data structure type is used by only one
module and its name meaning is simplistic, its name needs prefix
shorten module name.
Naming convention rule:Variable name can be shortened from its
data structure type name.

The following udpates are made:
struct pic pic-->struct i8259_reg_state i8259
struct iommu_domain iommu_domain-->struct iommu_domain iommu

V1-->V2:
	Update "struct iommu_domain iommu_domain-->struct iommu_domain iommu"

Signed-off-by: Xiangyang Wu <xiangyang.wu@linux.intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
2018-07-31 10:33:22 +08:00
Junjie Mao
17771c0ac2 HV: io: refine state transitions of VHM requests
Instead of using two members for maintaining the state of a VHM request, this
patch replaces the transitions with a single state. Basically the lifecycle of a
VHM request shall be:

    FREE -> PENDING -> PROCESSING -> COMPLETE -> FREE -> ...

The structure header of vhm_request has more details of the transitions access
limitations under different states.

Also drop the set but unused member vcpu.ioreq_pending.

For backward-compatibility, the obsolete 'valid' member is still kept and
maintained before SOS and DM adapts to the new state transitions.

v2 -> v3:

    * Use complete_ioreq to mark an I/O request finished in
      dm_emulate_(pio|mmio)_post.

Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-31 10:22:03 +08:00
Junjie Mao
941eb9db02 HV: io: move I/O emulation post-work to io.c
There are some functions for the post work of I/O emulation. This patch moves
these functions to io.c for clarity. No functional change introduced.

Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-31 10:22:03 +08:00
Junjie Mao
d8179519b9 HV: io: add post-work for PCICFG and WP requests
Currently no post-work is done for I/O requests of type PCICFG or WP. The
impacts include:

    1. ''valid'' in VHM request buffers are left as 1 even after the I/O request
       completes. This violates the pre-condition of acrn_insert_request_wait()
       but does not cause failures since a new I/O request can never happen
       before the previous one completes.

    2. Values read from PCI configuration spaces are never passed to UOS.

This patch adds the post-work for these two kinds of I/O requests. The post-work
for port I/O is invoked for PCICFG since it is essentially a port I/O and the
request structure is compatible. No post-work is needed for WP as it is only
triggered for EPT violations on writes, while post-work is mainly for reads.

v2 -> v3:

    * Consistently use 0/1 (not false/true) for the ''valid'' member.
    * Add comments to suggest when the hypervisor can see REQ_PCICFG and why
      dm_emulate_pio_post also works in such cases.
    * Rename: mark_ioreq_done -> complete_ioreq
    * Rename: complete_request -> emulate_io_post
    * Rename: hcall_notify_req_finish -> hcall_notify_ioreq_finish

Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
2018-07-31 10:22:03 +08:00
Arindam Roy
a2fe964de8 HV: Rename functions beginning with "_"
V1:
In order to remove MISRA C violations for rule
219S, rename functions, macros whose name
starts with "_".
Also removed some __mmio functions because they are
duplicates and are not used anywhere.
Renamed functions like __assert, to asm_assert,
because they were only wrappers around asm calls.

V2:
Over and above the changes on V1, modified bitmap
functions names to lock (corresponding to unlock)
introduced in V1

Signed-off-by: Arindam Roy <arindam.roy@intel.com>
2018-07-30 10:11:54 +08:00
Huihuang Shi
59771ff461 HV:treewide:fix "Reference parameter to procedure is reassigned"
Parameter's type which is pointer should not be changed in the
scope of function,assign it's value to local variable to fixed
it out.

Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-27 12:17:12 +08:00
Junjie Mao
88f74b5dbb HV: io: unify vhm_request req and mem_io in vcpu
The current struct vcpu has two members, namely 'struct vhm_request req' and
'struct mem_io mmio', that hold similar info, including the address, direction, size,
value and status of mmio reqeusts.

As a step towards a unified framework for both MMIO/PIO, this patch unifies
these two members by a tailored version of vhm_reqeust, mostly with the reserved
fields dropped. The definitions to request types, directions and process status
are reused.

Handling errors during emulations will be revisited after the I/O emulation
paths are unified. Thus for this patch the mmio.mmio_status in inherited by
io_req.processed which is not yet properly processed.

Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-27 10:50:19 +08:00
Li, Fei1
236bb10e4d hv: mmu: refine delete page table mapping
Merge mmu_modify with mmu_del to mmu_modify_or_del(..., type).
While type is MR_MODIFY, the actual action is doing mmu_modify; while
type is MR_DEL, the actual action is doing mmu_del.

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-26 12:46:34 +08:00
Li, Fei1
34c6862a28 hv: hypercall: add support to change guest page write permission
Add hcall_change_vm_page_wp_perm to change guest one page write permission.

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-26 12:46:34 +08:00
Jason Chen CJ
2dca23c7c9 add hypercall hc_sos_offline_cpu support
SOS boot with all physicall cpus, before running UOS, it should free
CPU resource by offline not used cpus
- first do standard cpu offline flow
- then call hcall_sos_offline_cpu hypercall to release cpu resource really

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-25 17:18:14 +08:00
Jason Chen CJ
589c72382a add CONFIG_VM0_DESC support
if defined CONFIG_VM0_DESC, HV will use predefined vm0_desc to config
VM0, otherwise, HV will run VM0 with all physical cpus.

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-25 17:18:14 +08:00
Li, Fei1
502e3e2e65 hv: mmu: refine set guest memory region API
1. rename set_vm_memmap to set_vm_memory_region
2. split ept_mmap into ept_mr_add and ept_mr_del

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-24 12:48:45 +08:00
Yang, Yu-chu
91337da5a1 HV: logical and high level precedence expression needs brackets
Added brackets for expression to make it easy to understand and
reduce the mistake of precedence. The rule is applied to the
mixed same level of prevedence opeartors, high level presedence
operators and logical expression.

Signed-off-by: Yang, Yu-chu <yu-chu.yang@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-07-24 10:10:39 +08:00
Junjie Mao
f0a3585ebf HV: common: cleanup of remaining integral-type issues
This is the final cleanup of the integral type related issues, reported by the
static checker, under common/, mostly including

    * make explicit the narrowings of vm_ids passed by register.
    * work around the confusion of the static checker by abstracting
      sub-expressions to local variables.

The remaining reports that are not trivial to suppress will be in the scope of a
separate document.

v1 -> v2:

    * Instead of converting vm_ids inside hcall_xxx, update the prototypes of
      these functions and do the conversion in vmcall_vmexit_handler.

Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-23 10:23:49 +08:00
Junjie Mao
1a1ee93656 HV: hypercall: make hypercall functions return int32_t
The error code in the hypervisor is 32-bit signed integers. To reduce implicit
conversions, this patch make hcall_xxx returns int32_t, and finally converts it
to uint64_t when assigned to rax whose semantics is properly defined in C99.

Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-23 10:23:49 +08:00
Li, Fei1
1815a1bb01 hv: ept: store virtual address of EPT PML4 table
Most of the time, we use the virtual address of EPT PMl4 table,
not physical address.

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-20 10:40:32 +08:00
Xiangyang Wu
d28fff2b06 HV:treewide:Update the type of return value and parameters of atomic operations
There are many type conversions in the atomic
operations invoking reported by static analysis tool. These
type conversions voilate MISRA C.

To keep uniform naming convention, rename atomic operation
function names:
atomic_set_int/long --> atomic_set32/64;
atomic_clear_int/long --> atomic_clear32/64;
atomic_load --> atomic_load32;
atomic_store --> atomic_store32;
atomic_swap --> atomic_swap32;
atomic_readandclear --> atomic_readandclear32;
atomic_inc --> atomic_inc32;
atomic_dec --> atomic_dec32;
atomic_cmpxchg --> atomic_cmpxchg32;
atomic_xadd --> atomic_xadd32.
Update the type of atomic_load32/64, atomic_store32/64,
atomic_swap32/64, atomic_cmpxchg32/6.
Update related variables and callers.

Note: the type of return value and parameters of atomic_xadd32/64
still keep signed int/long since caller pass
negative variable to atomic_xadd32/64;

V1-->V2:
	Add comments for atomic_set/clear to differ from
	bitmap_set/clear.

Signed-off-by: Xiangyang Wu <xiangyang.wu@intel.com>
Reviewed-by: Junjie.Mao <junjie.mao@intel.com>
2018-07-19 14:39:47 +08:00
Junjie Mao
f691cab994 HV: treewide: terminate 'if .. else if' constructs with 'else'
MISRA C requires that a 'if' statement followed by one or more 'else if'
statement shall be terminated by an 'else' statement which contains either
side-effect or a comment, to ensure that conditions are considered
exhaustively.

Note that a simple 'if' statement is not required to be terminated by 'else'.

This patch fixes such violations by either refactoring the code or add the
'else' statement with either a comment (describing why this case can be skipped)
or logging the event. It may not be satisfactory for the release version where
logging is no-op, but properly handling these non-trivial cases is out of the
scope of this patch.

v1 -> v2:

    * Fix unintended semantic changes in add_(msix|intx)_remapping and
      io_instr_vmexit_handler.
    * Simplify boolean checks in vpic_ocw2.
    * Rephrase the comment in strtol_deci.

Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-19 14:09:36 +08:00
Xiangyang Wu
65437960a9 HV:treewide: Add exec_vmread16 and exec_vmwrite16 functions
In the hypervisor, VMCS fields include 16-bit fields,
32-bit fields, 64-bit fields and natural-width fields.
In the current implement, no exec_vmread16/exec_vmwrite16
is for accessing 16-bit fields. So there are many type
casting for the return value and parameters vmread/vmwrite
operations.

Create exec_vmread16 and exec_vmwrite16 functions to
access 16-bit fields in VMCS;
Update related variables type for vmread/vmwrite operations;
Update related caller according to VMCS fields size.

V1--V2:
	This is new part of this patch serial to only
	update 16-bit vmread/vmread opertions and related
	caller.
V2--V3:
	Add "hu" for uint16_t argument in log function;
	Add comments for function get_vmcs_field;
	Update related variables type for exec_vmread16;
	Rename temp variable 'low' into 'value'.
V3-->V4:
	Few updates for exec_vmread16.
V4-->V5:
	Few updates for coding style;
	Replace "hux" with "hu" in log function for 16-bit
	variable.
V5-->V6:
	CPU_REG_64BIT_LAST is used in the vm_get_register and
	vm_set_register to make condition statement more
	understandable.

Signed-off-by: Xiangyang Wu <xiangyang.wu@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
2018-07-18 12:31:42 +08:00
Huihuang Shi
f2774e496b HV:common:fix "integer type violations"
fix integer type violations,keep some violations which
related to hypcall and msix_entry_index.

V1->V2:1.modified API_MAJOR_VERSION from Makefile
       2.sync acrn_common.h changed to device model

Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-18 12:31:14 +08:00
Huihuang Shi
aa5027a30c HV:misc:fix "signed/unsigned conversion with cast"
Signed/unsigned conversion should add cast explicitily
or change the type of them to the same.

V1->V2:Fixed the 0U to 0UL because of the mistakes.
V2->V3:remove unsed macro

Signed-off-by: HuiHuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-16 15:45:40 +08:00
Arindam Roy
944776f238 HV: Fix new MISRAC violations for brackets
Fix remaining 11S and 12S violations. These
are after the 7 patches submitted earlier.

Signed-off-by: Arindam Roy <arindam.roy@intel.com>
2018-07-16 11:02:38 +08:00
Yang, Yu-chu
90b342bd53 HV: prototyping non-static function
Includes header file of non-static function, and declare the
in-file use function static.

Signed-off-by: Yang, Yu-chu <yu-chu.yang@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-07-16 10:35:54 +08:00
Yonghua Huang
b831120165 HV: coding style cleanup for TRACE_2L & TRACE_4I usage
to align the data type of parameters

Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
2018-07-16 10:32:14 +08:00
Junjie Mao
4627cd4de0 HV: build: drop useless files
This patch drops the following useless files in the hypervisor:

* bsp/*/include/: After commit c849bff850 ("HV: config: adapt to the generated
  config.h") these headers are obsolete for configuration. Drop the directories
  and move the generated version.h under $(HV_OBJDIR)/include.

* all_header.c: This is a temporary file for checking violations in headers,
  which is accidentally checked in by commit 3956ce1596 ("HV: io: spell out
  explicit narrowing of integers").

Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-13 14:53:27 +08:00
Huihuang Shi
680c64de13 HV:transfer vmid's type to uint16_t
vmid's type prefered to be uint16_t.

V1->V2:vmid from uint32_t transfer to uint16_t
V2->V3:add range check to hcall's vmid parameter
V3->V4:seperate the declaration and actual code.
V4->V5:remove range check from hcall's vmid parameter

Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-13 14:13:38 +08:00
Huihuang Shi
e3302e87e8 HV:transfer vm_hw_logical_core_ids's type and rename it
rename vm_hw_logical_core_ids to vm_pcpu_ids
and changed the type to uint16_t.

V1->V2:rename the vm_hw_logical_core_ids

Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-13 13:05:29 +08:00
Mingqiang Chi
1d628c640c hv:fix MISRA-C return value violation
1) Change these 5 APIs to void type:
   vcpu_inject_pf
   uart16550_calc_baud_div
   uart16550_set_baud_rate
   console_init
   ptdev_activate_entry
No need to return 'entry' for ptdev_activate_entry
since the input parameter is 'entry'.
2) no need to check return value for the caller
   such as sbuf_put/console_putc/serial_puts/serial_get_rx_data

Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
2018-07-13 13:04:39 +08:00