This patch updates CAT documentation as well as adds
documentation support for newly added MBA feature.
Signed-off-by: Vijay Dhanraj <vijay.dhanraj@intel.com>
Introduce Split Device Model feature for ACRN. Now we only implement pass through
PCI(e) device of it.
Tracked-On: #4371
Signed-off-by: Li Fei1 <fei1.li@intel.com>
This is a workaround for the issue in efi-stub: If the EFI option is loaded to a memory range which is not all zero filled,
it's possible the garbage string appended to bootloader name string.
Which could make system can't boot.
Add an extra space to the EFI option to make sure space could be used to detect the end of bootloader name string.
Once the fixing patch is merged, we don't need this extra space.
But to make old ACRN work, we'd like to keep the space here.
Signed-off-by: fuzhongl <fuzhong.liu@intel.com>
Reviewed-by: Yin Fengwei <fengwei.yin@intel.com>
Delete Redhad virtio drive, only keep Oracle as reference.
Delete "inject driver into ISO" part, and update to the latest workable
method.
In a word, QA just need maintain one latest workable method in GSG for creating WaaG image.
Signed-off-by: ffshen <fangfang.shen@intel.com>
Fix links in documentation that have moved (e.g.,
clearlinux.org/documentation moved to docs.01.org/clearlinux/latest).
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
Add ACRN Open Source Roadmap 2020 link to Intro/What is ACRN page
Add ACRN blog link to ACRN Intro page (under Roadmap)
Move ACRN Shell Commands to 'Tools' under Advanced Guides page
Signed-off-by: Deb Taylor <deb.taylor@intel.com>
This is a WA to fix the invisible cursor issue. The TT_PASSTHROUGH
mode will not use iommu to do the address translation.
Tracked-On: #4509
Signed-off-by: Xiaoguang Wu <xiaoguang.wu@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
To avoid information leakage, we need to ensure that the device is
inaccessble when it does not exist.
For SR-IOV disabled VF device, we have the following operations.
1. The configuration space accessing will get 0xFFFFFFFF as a
return value after set the device state to zombie.
2. The BAR MMIO EPT mapping are removed, the accesssing causes
EPT violation.
3. The device will be detached from IOMMU.
4. The IRQ pin and vector are released.
Tracked-On: #4433
Signed-off-by: Yuan Liu <yuan1.liu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
If the bus number is not 0, then malloc a virtual slot for the device,
meanwhile, it should be added to PT_SLOT for the next query, otherwise
the passthru parameter would be lost in the launch script.
Tracked-On: #4494
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
commit a68f655a11 added two extra header
include in pci_dev.c for logical_partition scenario but acrn-config did
not handle that.
This patch fix the issue.
Tracked-On: #4492
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
1. To keep align with acrn-hypervisor source code, remove a function
that generates ve820 file.
Tracked-On: #3854
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
Refine HV_RAM_START to keep 2M memory align for new board config.
Tracked-On: #3854
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
1. If the device configure space is not fixed by ACPI and its pbar address
is above 4G or lower than 2G, then remap the vbar address to high memory.
2. Due to GPU might have huge MMIO space which would result in
HV_RAM_SIZE overflow, skip its vBAR remapping for now when the size high
than 1GB.
Tracked-On: #4458
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
1. refine vm number macro from scenario config.
2. add sanity check for load order.
Tracked-On: #4458
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
As pci_devices.h is included by <page.h>, need to prepare pci_devices.h
for nuc6cayh and apl-up2 board.
Also the #error info in generic/pci_devices.h should be removed, otherwise
the build will be failed in sdc/sdc2/industry scenarios.
Tracked-On: #4458
Signed-off-by: Victor Sun <victor.sun@intel.com>
For a pre-launched VM, a region from PTDEV_HI_MMIO_START is used to store
64bit vBARs of PT devices which address is high than 4G. The region should
be located after all user memory space and be coverd by guest EPT address.
Tracked-On: #4458
Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
ve820.c is a common file in arch/x86/guest/ now, so move function of
create_sos_vm_e820() to this file to make code structure clear;
Tracked-On: #4458
Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
Remove useless per board ve820.c as arch/x86/guest/ve820.c is common for
all boards now;
Tracked-On: #4458
Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
hypervisor/arch/x86/configs/$(BOARD)/ve820.c is used to store pre-launched
VM specific e820 entries according to memory configuration of customer.
It should be a scenario based configurations but we had to put it in per
board foler because of different board memory settings. This brings concerns
to customer on configuration orgnization.
Currently the file provides same e820 layout for all pre-launched VMs, but
they should have different e820 when their memory are configured differently.
Although we have acrn-config tool to generate ve802.c automatically, it
is not friendly to modify hardcoded ve820 layout manually, so the patch
changes the entries initialization method by calculating each entry item
in C code.
Tracked-On: #4458
Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
Currently ept_pages_info[] is initialized with first element only that force
VM of id 0 using SOS EPT pages. This is incorrect for logical partition and
hybrid scenario. Considering SOS_RAM_SIZE and UOS_RAM_SIZE are configured
separately, we should use different ept pages accordingly.
So, the PRE_VM_NUM/SOS_VM_NUM and MAX_POST_VM_NUM macros are introduced to
resolve this issue. The macros would be generated by acrn-config tool when
user configure ACRN for their specific scenario.
One more thing, that when UOS_RAM_SIZE is less then 2GB, the EPT address
range should be (4G + PLATFORM_HI_MMIO_SIZE).
Tracked-On: #4458
Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
change vmsi_read_cfg to read_vmsi_cfg, same applies to writing
change vmsix_read_cfg to read_vmsix_cfg, same applies to writing
Tracked-On: #4433
Signed-off-by: Yuan Liu <yuan1.liu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
Move CFG read/write function for PCI-compatible Configuration Mechanism from
debug/uartuart16550.c to hw/pci.c and rename CFG read/write function for
PCI-compatible Configuration Mechanism to pci_pio_read/write_cfg to align with
CFG read/write function pci_mmcfg_read/write_cfg for PCI Express Enhanced
Configuration Access Mechanism.
Tracked-On: #4371
Signed-off-by: Li Fei1 <fei1.li@intel.com>
Currently the life_mngr daemon has supported:
listen from the SOS shutdown command,
this patch add support listen shutdown command from RTVM.
and this life_mngr daemon can also run on SOS for listening
shutdown commond from acrn-dm(triggered by RTVM).
Tracked-On: #4446
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Minggui Cao <minggui.cao@intel.com>
Reviewed-by: Yuhong, Tao <yuhong.tao@intel.com>
Acked-by: Yan, Like <like.yan@intel.com>
it will send shutdown command to life_mngr on SOS
after the UOS has poweroff itself
Tracked-On: #4446
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Minggui Cao <minggui.cao@intel.com>
Reviewed-by: Shuo A Liu <shuo.a.liu@intel.com>
Reviewed-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
when acrn-dm received shutdown command, it will call this api
to send shutdown command to life_mngr running on SOS via socket.
Tracked-On: #4446
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Minggui Cao <minggui.cao@intel.com>
Reviewed-by: Shuo A Liu <shuo.a.liu@intel.com>
Reviewed-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
