Commit Graph

607 Commits

Author SHA1 Message Date
Yonghua Huang
ee066a7f1c hv: fix possible buffer overflow in 'vcpu_set_eoi_exit()'
'vector' should be no greater than 0xff,else
 'eoi_exit_bitmap[]' will overflow.

Tracked-On: #1252
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-25 11:26:45 +08:00
Yonghua Huang
88eeae3f1f hv: remove unused fields in 'struct acrn_vcpu'
below fields are defined but not used.
- sync, pause_cnt & dbg_req_state.

Tracked-On: #861
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2019-01-25 11:26:33 +08:00
Victor Sun
d0eb83aa0c HV: move Kconfig IOREQ_POLLING to acrn vm config
Previously I/O emulation completion mode mode was configured in Kconfig:

	config IOREQ_NOTIFICATION
	       bool "Notification mode"
	       help
	         When I/O request is completed, SOS will mark the completion status and
	         notify hypervisor via hypercall. Hypervisor will finish the post work
	         when notification is received.

	config IOREQ_POLLING
	       bool "Polling mode"
	       help
	         When I/O request is completed, SOS will only mark completion status
	         without notifying hypervisor. Hypervisor will poll the completion
	         status and finish the post work.

Now move this configuration to guest_flags of acrn_vm_config struct.

	if ((vm_config->guest_flags & IO_COMPLETION_POLLING) != 0U) {
		I/O with polling;
	} else {
		I/O with notification;
	}

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-25 10:24:18 +08:00
Jason Chen CJ
fb41ea5cfb io_emul: remove pending_pre_work
Now we do not need pending_pre_work anymore, as we can make sure IO request
VCPU resume from where it paused.

Now only three fixed points will try to do schedule:
- vcpu_thread: before vm entry, will check reschedule flag and to it if needed
- default_idle: loop check reschedule flag to see if need switch out
- io request: if IO REQ need DM's handle, it will schedule out

Tracked-On: #2394
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Xu, Anthony <anthony.xu@intel.com>
2019-01-23 16:21:17 +08:00
Jason Chen CJ
4fc54f952e schedule: add full context switch support
this patch added full context switch support for scheduling, it make sure
each VCPU has its own stack, and added host_sp field in struct sched_object
to record host stack pointer for each switch out object.

Arch related function arch_switch_to is added for context switch.

To benefit debugging, a name[] field is also added into struct sched_object.

Tracked-On: #2394
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Xu, Anthony <anthony.xu@intel.com>
2019-01-23 16:21:17 +08:00
Shiqing Gao
5e94788689 hv: vlapic: remove calcvdest
- remove `calcvdest` and use `vlapic_calcdest` directly

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-23 13:43:09 +08:00
Minggui Cao
173b534b05 HV: modularization cleanup instr_emul header file
separate the private macro/structure/functions, which are just used
in instr_emul.c;

and move instr_emul.h to public include path.

Tracked-On: #1842
Signed-off-by: Minggui Cao <minggui.cao@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2019-01-22 10:50:30 +08:00
Victor Sun
18dbdfd5d7 HV: replace lapic_pt with guest flag in vm_config
The member of lapic_pt in acrn_vm_config will be replaced by
guest_flag of LAPIC_PASSTHROUGH;

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-21 18:03:31 +08:00
Victor Sun
23f8e5e598 HV: replace memory config with acrn_vm_mem_config
The member of mem_size and start_hpa in acrn_vm_config struct will
be replaced with the acrn_vm_mem_config struct;

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-21 18:03:31 +08:00
Victor Sun
253b25937b HV: remove vm_config pointer in acrn_vm struct
For each vm_array[] item, its config is located in corresponding
index of vm_configs[], so vm_config pointer is not needed any more.

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-21 18:03:31 +08:00
Victor Sun
7bf9b1be2c HV: enable pcpu bitmap config for partition mode
All the legacy cpu configration in vm_description.c are all cleaned up;

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-21 18:03:31 +08:00
Victor Sun
2e32fba536 HV: remove sworld_supported in acrn_vm_config
We will use guest_flags of SECURE_WORLD_ENABLED to check wthether
sworld is supported.

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-21 18:03:31 +08:00
Victor Sun
ec199d9609 HV: add get_sos_vm api
This patch creates a new get_sos_vm() api to replace get_vm_from_vmid(0U)
because VM 0 might not be SOS VM now;

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-21 18:03:31 +08:00
Victor Sun
f3014a3c89 HV: show correct vm name per config
The patch will show correct VM name per its configuration. As we do not
validate vm id when call get_vm_from_vmid() any more, we only show VM's
states which their VM type are defined;

If VM name is not configured in config file, then the name is specified
with vm id, i.e. "ACRN VM_(vm id)"

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-21 18:03:31 +08:00
Victor Sun
e6117e0d5b HV: refine launch vm interface
When pcpu enter guest mode, it will call launch_vms() function to launch
VMs in global vm_configs array.

In launch_vms() function, current pcpu will go through vm_config array list
and check whether it is a bsp of configured VM, if yes then it will prepare
corresponding VM and start it. The index of vm_config array will be specified
to VM id.

The first least significant bit in pcpu_bitmap means the bsp of the VM.

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-21 18:03:31 +08:00
Victor Sun
49e6deaf26 HV: rename the term of vm0 to sos vm
Under sharing mode, VM0 is identical with SOS VM. But the coupling of
SOS VM and VM 0 is not friendly for partition mode.

This patch is a pure term change of vm0 to sos VM, it does not change
any code logic or senmantic.

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-21 18:03:31 +08:00
Mingqiang Chi
1d98b7012d hv: move 'setup_io_bitmap' to vm.c
move this api from io_emul.c to vm.c to avoid reverse
dependency

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
2019-01-21 13:49:54 +08:00
Victor Sun
c4a230f313 HV: rename the term of vm_description to vm_config
This patch is a pure term change of vm_description to vm_config,
the struct name of vm_description is changed to acrn_vm_config.

The patch does not change any code logic or senmantic.

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-18 11:50:00 +08:00
Minggui Cao
f45605dd49 HV: modularization to separate CR related code
1. move the CR related code from vmcs/vcpu to vCR source files.
2. also add virtual_cr.h to acrn.doxyfile to avoid doc failure.

Tracked-On: #1842
Signed-off-by: Minggui Cao <minggui.cao@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
2019-01-18 10:50:18 +08:00
Mingqiang Chi
6372548e11 hv:Fix violation "Cyclomatic complexity greater than 20" in instr_emul.c
Split decode_prefixes() to 2 small APIs

v1-->v2:
    split decode_prefixes to 2 APIs

Tracked-On: #861
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-17 11:22:02 +08:00
Yan, Like
6641bc7949 hv: remove ACRN_REQUEST_TMR_UPDATE and unnecessary codes
Because ACRN_REQUEST_TMR_UPDATE is not needed anymore, this commit remove
the MACRO definition and its related logic, including following functions:
- apicv_batch_set_tmr()
- vlapic_apicv_batch_set_tmr()
- vlapic_set_tmr_one_vec()
- vioapic_update_tmr()

Tracked-On: #2343
Signed-off-by: Yan, Like <like.yan@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-17 08:48:22 +08:00
Yan, Like
fc61536b07 hv: rework EOI_EXIT_BITMAP update logic
This commit changes the EOI_EXIT_BITMAP as follows:
- add a eoi_exit_bitmap to vlapic structure;
- go through all the RTEs and set eoi_exit_bitmap in the vlapic structure when related RTE fields are modified;
- add ACRN_REQUEST_EOI_EXIT_UPDATE, if eoi_exit_bitmap changed, request the corresponding vcpu to write the bitmap
  to VMCS.

Tracked-On: #2343
Signed-off-by: Yan, Like <like.yan@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-17 08:48:22 +08:00
Yan, Like
f15cc7d6de hv: set/clear TMR bit like hardware behave
Current ACRN implementation update TMR bits one time only when related RTE fields changed,
which is not acting like actual hardware.

From SDM vol3 10.8.4:
"Upon acceptance of an interrupt into the IRR, the corresponding TMR bit is cleared for
edge-triggered interrupts and set for leveltriggered interrupts."

This commit change the ACRN implementation to set/clear corresponding TMR bit when inject
intr to vlapic.

Tracked-On: #2343
Signed-off-by: Yan, Like <like.yan@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-17 08:48:22 +08:00
Chaohong guo
dc6d1d5fa7 HV: fix MISRA issue in apicv_pending_intr()
Remove multi-return statement in apicv_pending_intr().

Tracked-On: #861
Signed-off-by: Chaohong guo <chaohong.guo@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-15 13:48:19 +08:00
Chaohong guo
aebb971d41 HV: misra clean for guest.c file
to meeting MISRA, add more bracks for if conditions; also a small
change to copy_gpa() to fix DD flow complaint from MISRA

Tracked-On: #861
Signed-off-by: Chaohong guo <chaohong.guo@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-15 13:48:19 +08:00
Chaohong guo
6a1c865671 HV: add empty else statement for if condition in vlapic.c
To meeting MISRA, add empty else {} for corresponding if-else-if {}.
Also, remove a DD flow violation in vlapic_free()

Tracked-On: #861
Signed-off-by: Chaohong guo <chaohong.guo@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-15 13:48:19 +08:00
Zide Chen
b30dfb1da8 hv: fix MISRA-C violations in vmsr.c
In enable_msr_interception(), by removing the local pointer declarations and
all pointer arithmetic operations, the following violations are fixed.

- Use of pointer arithmetic.
- Pointer arithmetic is not on array.
- Pointer not checked for null before use.

Tracked-On: #861
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2019-01-15 08:49:34 +08:00
Li, Fei1
65f3383d62 hv: coding style: remove unnecessary conditional operators
Condtional operators which will add code cyclomatic complexity. So replace the
unnecessary conditional operators.

Tracked-On: #861
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2019-01-14 15:33:05 +08:00
Zide Chen
92d7018249 hv: fix 2 minor MISRA-C violations in inst_emul.c
Signed integral type cast to unsigned. :  (unsigned long and long)

Tracked-On: #861
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2019-01-12 10:04:51 +08:00
Li, Fei1
f582556865 hv: instr_emul: add const qualifier for some function
Add `const` qualifier for is_desc_valid and vie_calculate_gla

Tracked-On: #861
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-11 21:53:41 +08:00
Li, Fei1
5e38e0ffd6 hv: instr_emul: refine decode_prefixes to one exit point
Misra C requires Function must have only one return entry.

Tracked-On: #861
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-11 21:53:41 +08:00
Li, Fei1
433a492a4e hv: instr_emul: remove goto in get_gva_di_check
remove goto statement in get_gva_di_check() routine

Tracked-On: #861
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-11 21:53:41 +08:00
Li, Fei1
cd85115ec9 hv: instr_emul: refine vie_calculate_gla to void
It always return zero, so there is no need to check the return vaule from it.
Just refine it to void.

Tracked-On: #861
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-11 21:53:41 +08:00
Shiqing Gao
e2971ebc98 hv: vlapic: code clean-up
* rename `vlapic_set_intr_ready` to `vlapic_accept_intr`
 * replace calling of `vlapic_intr_edge` with `vlapic_set_intr`
 * remove `vlapic_intr_level` and `vlapic_intr_edge`

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-11 09:44:10 +08:00
Zide Chen
10db11b00a hv: emulate IA32_FEATURE_CONTROL MSR
All features controlled by IA32_FEATURE_CONTROL are disabled from guests,
so set the Lock bit to prevent it from writing by guests.

Also hide the MSR_IA32_FEATURE_CONTROL_VMX_NO_SMX bit from guest.

Tracked-On: #1867
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-10 12:23:44 +08:00
Li, Fei1
40c5139ea3 hv: inst_emul: clean the "Procedure has more than one exit point"
Misra C requires Function must have only 1 return entry.

Tracked-On: #861
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2019-01-10 09:16:54 +08:00
Huihuang Shi
625e51d18a fix "goto detected:exception_inject"
V1->V2:
    rename is_exception_inject to has_exception.
V2->V3:
    remove the else statement and add new if statement to check
has_exception.

Misra C requires not allowed to use goto.

Tracked-On: #861
Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-09 23:06:25 +08:00
Zide Chen
86526cddc5 hv: disable more features from guest CPUID
Silicon Debug Feature: CPUID.01H.ECX[11]
- We can't allow guests to have direct access to silicon wide resources.

Machine Check Exception: CPUID.01H.EDX[5]
- Need HV support before exposing it to the guests.

Perfmon and Debug: CPUID.01H.ECX[15]
Debug Store: CPUID.01H.EDX[21], CPUID.01H.ECX[2], CPUID.01H.ECX[4]
- HV emulation is needed to separate host and guest monitoring data.
- guest CPUID.0AH is forced to all-zero in ACRN so it makes sense to clear
  these bits as well.

Tracked-On: #1867
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2019-01-09 23:04:41 +08:00
Huihuang Shi
e966828cd2 hv: clean the "Procedure has more than one exit point".
Misra C requires Function must have only 1 return entry.
Fixed it by use "if ... else ..." format.

Tracked-On: #861
Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-08 14:47:01 +08:00
Shiqing Gao
272439d37f hv: rename register_io_emulation_handler
This patch renames `register_io_emulation_handler` to
`register_pio_emulation_handler`.

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-08 11:28:13 +08:00
Minggui Cao
c5e072432a HV: modularization to refine boot/bsp related code.
1. add static for local functions and variables.
2. move vm_sw_loader from vcpu to vm
3. refine uefi.c to follow the code rules.
4. separate uefi.c for vm0 boot and bsp two parts. bsp layer just
access native HW related, can't access vm/vcpu, vm0 boot part can
access vm / vcpu data structure.

Tracked-On: #1842
Signed-off-by: Minggui Cao <minggui.cao@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
2019-01-08 08:46:15 +08:00
Mingqiang Chi
09ff94fc49 hv:Change structure boot_cpu_data to static
-- Change boot_cpu_data to static, only used in cpu_caps.c,
-- Add get_cpu_info() api, it will call this api instead of
   boot_cpu_data except cpu_caps.c

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
2019-01-07 11:23:22 +08:00
Mingqiang Chi
7c4dd0d277 hv:Move pm state structure to pm.h
-- move structure 'cpu_state_info' from cpu_caps.h to host_pm.h
-- add get_cpu_pm_state_info() api

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
2019-01-07 11:23:22 +08:00
Zide Chen
f4cce46605 hv: disable SMX (Safer Mode Extension) from guest CPUID
SMX should be disabled on guests.

Actually current code assumes SMX is disabled (no VM exit handler for GETSEC
and bit 2 of IA32_FEATURE_CONTROL is set), and this patch simply explicitly
clear guest CPUID.01H.ECX[6].

Since both CPUID.01H.ECX[5] and CPUID.01H.ECX[6] are cleared from guest CPUID,
MSR IA32_SMM_MONITOR_CTL is not available in guests.

Need to make sure CR4.SMXE is cleared in guests.

Tracked-On: #1867
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-04 16:05:50 +08:00
Zide Chen
a4b166d5e8 hv: add missing MSRs to unsupported_msrs[]
SMRR (System-Management Range Register) is disabled from vMTRR,
so treat IA32_SMRR_PHYSBASE and IA32_SMRR_PHYSMASK as unsupported.

IA32_SMBASE is available only when IA32_VMX_MISC[15] is set.

IA32_FIXED_CTR0/1/2 are available only when CPUID.0AH:EDX[4:0] is non-zero.

Intel Processor Trace feature has been disabled and the associated MSRs
need to be in unsupported_msr[] as well.

Tracked-On: #1867
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-04 16:05:50 +08:00
Chaohong guo
8ed393a03d HV: remove multi-returns in few routine in guest.c
To meet MISRA, remove multi-returns in routines

Tracked-On: #861
Signed-off-by: Chaohong guo <chaohong.guo@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-03 15:58:10 +08:00
Chaohong guo
e2c11c0c75 HV: remove multi returns in vlapic_set_apicbase
remove few calls to return statement in routines.

Tracked-On: #861
Signed-off-by: Chaohong guo <chaohong.guo@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-03 15:58:10 +08:00
Chaohong guo
9efbdc829d HV: Remove goto in vlapic_read()
remove goto statement in vlapic_read() routine

Tracked-On: #861
Signed-off-by: Chaohong guo <chaohong.guo@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-03 15:58:10 +08:00
Chaohong guo
7a04db7cd8 HV: remove multiple exits in vlapic_set_intr_ready()
To meet MISRA, remove multiple return in the func.

Tracked-On: #861
Signed-off-by: Chaohong guo <chaohong.guo@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-03 15:58:10 +08:00
Chaohong guo
0884397361 HV: cycomatic complexity 20 in vlapic_icrlo_write_handler
MISRA compaint that the vlapic_icrlo_write_handler 's cyclomatic
complexity is greater than 20. Try to remove multiple returns/exits.

Tracked-On: #861
Signed-off-by: Chaohong guo <chaohong.guo@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-02 16:22:11 +08:00