Commit Graph

275 Commits

Author SHA1 Message Date
Shiqing Gao
e2971ebc98 hv: vlapic: code clean-up
* rename `vlapic_set_intr_ready` to `vlapic_accept_intr`
 * replace calling of `vlapic_intr_edge` with `vlapic_set_intr`
 * remove `vlapic_intr_level` and `vlapic_intr_edge`

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-11 09:44:10 +08:00
Mingqiang Chi
1fc10d514c hv:Unify the MACRO name for invalid interrupt pin
There are the following definitions in hypervisor,
  define IOAPIC_INVALID_PIN      0xffU
  define VPIC_INVALID_PIN        0xffU
  define PTDEV_INVALID_PIN       0xffU
this patch unify them to:
  define INVALID_INTERRUPT_PIN   0xffffffffU

Tracked-On: #861
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
2019-01-10 23:52:25 +08:00
Mingqiang Chi
87afe65f86 hv: vioapici: Change interrupt pin to uint32_t
-- Change the type from uint8_t to uint32_t
-- Remove some typecast

Tracked-On: #861
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-10 23:52:25 +08:00
Mingqiang Chi
50deda8819 hv: vpic: Change interrupt pin to uint32_t
-- Change the type from uint8_t to uint32_t
-- Remove some typecast

Tracked-On: #861
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-10 23:52:25 +08:00
Zide Chen
10db11b00a hv: emulate IA32_FEATURE_CONTROL MSR
All features controlled by IA32_FEATURE_CONTROL are disabled from guests,
so set the Lock bit to prevent it from writing by guests.

Also hide the MSR_IA32_FEATURE_CONTROL_VMX_NO_SMX bit from guest.

Tracked-On: #1867
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-10 12:23:44 +08:00
Mingqiang Chi
7907fef59e hv:Rename several APIs for vpic and vioapic
vpic:
   vpic_set_irq         --> vpic_set_irqline
   vpic_get_irq_trigger --> vpic_get_irqline_trigger_mode
vioapic:
   vioapic_set_irq_nolock --> vioapic_set_irqline_nolock
   vioapic_set_irq        --> vioapic_set_irqline_lock
   vioapic_send_intr      --> vioapic_generate_intr

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
2019-01-08 14:32:20 +08:00
Minggui Cao
c5e072432a HV: modularization to refine boot/bsp related code.
1. add static for local functions and variables.
2. move vm_sw_loader from vcpu to vm
3. refine uefi.c to follow the code rules.
4. separate uefi.c for vm0 boot and bsp two parts. bsp layer just
access native HW related, can't access vm/vcpu, vm0 boot part can
access vm / vcpu data structure.

Tracked-On: #1842
Signed-off-by: Minggui Cao <minggui.cao@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
2019-01-08 08:46:15 +08:00
Chaohong guo
971eb84c20 HV: add const qualifier for functions' argments in vlapic.c
If a argment is not changed in function, MISRA recommends to add const
qualifier for that argement.

Tracked-On: #861
Signed-off-by: Chaohong guo <chaohong.guo@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-02 16:22:11 +08:00
Li, Fei1
6f0edfc38d hv: coding style: use the defined data type __packed
1) Use __attribute__((packed)) instead of #pragma pack(1)
2) Use the defined data type __packed instead of __attribute__((packed))

Tracked-On: #861
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2019-01-02 09:35:00 +08:00
Mingqiang Chi
682824de6d hv:Change phys_cpu_num to static
-- change phys_cpu_num to static
-- add get_pcpu_nums() and is_pcpu_active() APIs
-- replace phys_cpu_num with get_pcpu_nums() except cpu.c

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-12-28 23:26:31 +08:00
Li, Fei1
cf47f6cff8 hv: coding style: refine the remaining functions to one exit point
Refine the remaining functions in the head file to one exit point

Tracked-On: #861
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2018-12-21 19:39:56 +08:00
Jason Chen CJ
ff0703dd40 scheduler: make scheduling based on struct sched_object
use struct sched_object as the main interface of scheduling, then
make scheduler as an independent module to vcpu:
- add struct sched_object as one field in struct vcpu
- define sched_object.thread for switch_to thread
- define sched_object.prepare_switch_out/in for prepare_switch before
  switch_to
- move context_switch_out/context_switch_in into vcpu.c as
  vcpu.sched_obj.prepare_switch_out/in
- make default_idle as global idle.thread for idle_thread
- make vcpu_thread as vcpu.sched_obj.thread for each vcpu thread
- simplify switch_to based on sched_object

Tracked-On: #1842
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <edide.dong@intel.com>
2018-12-21 10:34:15 +08:00
Jason Chen CJ
6d67364881 scheduler: refine runqueue related functions
add struct sched_object, and use it as input param instead of vcpu for
below functions:
- add_to_cpu_runqueue renamed from add_vcpu_to_runqueue
- remove_from_cpu_runqueue renamed from remove_vcpu_from_runqueue
- get_next_sched_obj added to get next sched object

Tracked-On: #1842
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <edide.dong@intel.com>
2018-12-21 10:34:15 +08:00
Mingqiang Chi
81a9de6067 hv:fix MISRA-C violations in create_vm
-- fix "more than one exit point" and "goto detected" violations
-- change prepare_vm0_memmap to void type
-- Add free_vm_id when create vm failed

Tracked-On: #861
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-12-20 18:47:57 +08:00
Zide Chen
d133f95d97 hv: fix MISRA-C violations "Pointer param should be declared pointer to const."
MIRSA-C requires the const qualifier should be applied to pointer parameters
that address data not subject to change in rule 120D.

Tracked-On #861
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-12-19 13:03:03 +08:00
Mingqiang Chi
64a463000f hv:refine prepare_vm0 api
-- fix MISRA-C violation "procedure has more than one exit point"
   for this api
-- change start_vm to void type since it is always return 0

Tracked-On: #861
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-19 09:16:37 +08:00
Jason Chen CJ
746fbe147d modulization: move functions related with cpu caps into cpu_caps.c
move cpu caps related functions like capability init/detect/check
in cpu.c & mmu.c into a new file cpu_caps.c

Changes to be committed:
	modified:   developer-guides/hld/hv-memmgt.rst
	modified:   ../hypervisor/Makefile
	modified:   ../hypervisor/arch/x86/cpu.c
	new file:   ../hypervisor/arch/x86/cpu_caps.c
	modified:   ../hypervisor/arch/x86/mmu.c
	modified:   ../hypervisor/arch/x86/vmx_asm.S
	modified:   ../hypervisor/include/arch/x86/cpu.h
	new file:   ../hypervisor/include/arch/x86/cpu_caps.h
	modified:   ../hypervisor/include/arch/x86/guest/vm.h
	modified:   ../hypervisor/include/arch/x86/mmu.h
	modified:   ../hypervisor/include/arch/x86/vmcs.h

Tracked-On: #1842
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-19 09:07:14 +08:00
Zhipeng Gong
c547e9cfb4 hv: enable/disable snoop control bit per vm
For security, this patch add one flag per vm and disable snoop control
for sos and enable snoop control for uos by default.

v2: add one flag in vm, not in iommu domain.
v3: add vm null check

Tracked-On: #2086
Signed-off-by: Zhipeng Gong <zhipeng.gong@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-12-18 13:45:10 +08:00
Zide Chen
2028034151 hv: MISRA-C fix "identifier reuse" in vpci code
13X: Identifier reuse: tag vs component.
A tag name shall be a unique identifier

Change the following names:
  struct msi --> struct pci_msi
  struct msix --> struct pci_msix
  struct vpci --> struct acrn_vpci
  union cfgdata -> union pci_cfgdata

Tracked-On: #861
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-18 13:39:15 +08:00
Zide Chen
44e9318c45 hv: vmsr: fix MISRA_C violations
106D No prototype for non-static function.
  2 functions missing prototyle declarations in header file.

120S Use of bit operator on signed type.
123S Use of underlying enum representation value.
  enum values are treated like unsigned integer in vmsr.c

Tracked-On: #861
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-12-16 14:52:22 +08:00
Zide Chen
c89d6e6526 modularization: clean up namings in vMTRR module
- rename 3 module interface APIs
  init_mtrr() -> init_vmtrr()
  mtrr_rdmsr -> read_vmtrr()
  mtrr_wrmsr() -> write_vmtrr()

- follow naming convention for other modules, rename struct mtrr_state
  to struct acrn_vmtrr. And add acrn_vcpu to it.

- because MTRR is x86 architecture specific, move struct acrn_vmtrr to
  struct acrn_vcpu_arch.

Tracked-on: #1842
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-14 09:43:06 +08:00
Zide Chen
6bbd0129c3 modularization: move vMTRR code to guest directory
MTRR emulation belongs to virtual CPU component.

- rename mtrr.c to vmtrr.c and move it to arch/x86/guest
- rename mtrr.h to vmtrr.h and move it to include/arch/x86/guest

Tracked-On: #1842
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-14 09:43:06 +08:00
Zide Chen
a958fea7a4 hv: emulate IA32_TSC_ADJUST MSR
Intercept IA32_TSC_ADJUST MSR so that writing IA32_TSC_ADJUST from the
guests won't impact the TSC in root mode or potentially other vCPUs in
the same pCPU.

- MSR TSC_ADJUST needs to be isolated between normal and secure world,
  so it's included in NUM_WORLD_MSRS.
- Upon writing to either IA32_TSC_ADJUST or IA32_TSC from the guests,
  don't write to physical MSRS so it won't impact the host side, but
  update the TSC offset VM-execution control.
- don't need to intercept rdmsr for IA32_TIME_STAMP_COUNTER.
- add the missing statement in save_world_ctx() to save the tsc_offset
  during world switch.

Tracked-On: #1867
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-12-14 09:11:37 +08:00
Jason Chen CJ
07427b4ca9 modulization: move virtual cpuid stuff into guest dir
functions like set_vcpuid_entries & guest_cpuid should only
server for virtual cpuid, so move such kind of functions
to guest/vcpuid.c.

and all native cpuid APIs will keep in cpuid.h

Tracked-On: #1842
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-13 09:08:02 +08:00
Li, Fei1
e3fc6c3c79 hv: use int32_t replace int
Since it's typedef in "include/lib/types.h"

Tracked-On: #861
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2018-12-12 13:08:10 +08:00
Li, Fei1
8bafde9942 hv: use uint8_t replace "unsigned char"
Since it's typedef in "include/lib/types.h"

Tracked-On: #861
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2018-12-12 13:08:10 +08:00
Minggui Cao
9b58b9d11d HV: improve e820 interfaces and their usages
1. change its APIs as more indepentent, and modify the callers' code
2. limit its global variables as static, and return const to the callers
3. remove unused code in "CONFIG_CMA"

Tracked-On: #1842
Signed-off-by: Minggui Cao <minggui.cao@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-12-12 09:12:12 +08:00
Minggui Cao
b69d24b1d4 HV: separate e820 related code as e820.c/h
1. e820 is modulized as separated files.
2. move boot_regs into multiboot.h as it's related with
multiboot info header

Tracked-On: #1842
Signed-off-by: Minggui Cao <minggui.cao@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-12-12 09:12:12 +08:00
Zide Chen
9761eede2a hv: cleanup IA32_PAT emulation code r.w.t. to the refactored guest_msrs[]
Currently there are two fields in ext_context to emulate IA32_PAT MSR:
- ia32_pat: hold the value of the emulated IA32_PAT MSR
- vmx_ia32_pat: used for load/store IA32_PAT MSR during world switch

This patch moves ext_context->ia32_pat to the common placeholder for
emulated MSRs acrn_vcpu_arch->guest_msrs[].

Also it renames ext_context->vmx_ia32_pat to ext_context->ia32_pat to
retain same naming convention in struct ext_context.

Tracked-On: #1867
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-09 21:32:03 +08:00
Zide Chen
b6aaf1b8d9 hv: MSRs may need isolation between normal and secure world
- implement unified APIs to access guest_msrs[] under struct acrn_vcpu.
- use these new APIs to read/write emulated TSC_DEADLINE MSR
- switch world_msrs[] and guest_msrs[] during world switch for MSRs that
  need world isolation
- remove the old guest_msrs[] array and it's index macros.

Tracked-On: #1867
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-09 21:32:03 +08:00
Zide Chen
92bbb545cf hv: rearrange data structure for emulated MSRs
Create two arrays for emulated MSRs:
- guest_msrs[] in struct acrn_vcpu_arch: emulation for all MSRs that are
  included in emulated_guest_msrs[].
- world_msrs[] in struct cpu_context: it has separate copies for secure and
  normal world for those MSRs that are in the first NUM_WORLD_MSRS entries
  in emulated_guest_msrs[].

Split vmsr.c/emulated_msrs[] into 3 smaller arrays:
- emulated_guest_msrs[]: corresponding MSRs are emulated in guest_msrs[]
- mtrr_msrs[]: emulated MTRRs are saved in vMTRR module
- unsupported_msrs[]: GP for any guest accesses

Tracked-On: #1867
Signed-off-by: Zide Chen <zide.chen@intel.com>
2018-12-09 21:32:03 +08:00
Shiqing Gao
2f15d3569c hv: replace CPU_PAGE_SIZE with PAGE_SIZE
replace CPU_PAGE_SIZE with PAGE_SIZE
These two MACROs are duplicated and PAGE_SIZE is a more reasonable name.

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-03 15:14:57 +08:00
Jason Chen CJ
aa9af27338 modularization: boot component
Boot component prepares the very basic platform boot env. It finally call
into platform initilization entries:

- bsp_boot_init & cpu_secondary_init for start up
- or restore_s3_context for wakeup

this patch is the final one, it did some code clean up and move some definition
from vm0_boot.h to boot_context.h.

after this patch, the boot component include files:
arch/x86/boot/cpu_primary.S
arch/x86/boot/trampoline.S
arch/x86/boot/cpu_save_boot_ctx.S
arch/x86/boot/idt.S
boot/reloc.c
boot/include/reloc.h
include/arch/x86/boot/idt.h
include/arch/x86/boot/boot_context.h

Tracked-On: #1842
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
2018-12-03 09:09:44 +08:00
Junjie Mao
584f6b7255 doc: replace return with retval
`@return` is dedicated for brief description of return values, not for comments
stating actual return values. In addition, sphinx + breathe does not join
multiple adjacent `@return`. This results in multiple `Return` sections in the
generated document, which is confusing.

This patch replaces `@return` with `@retval` for the lists of return
values. Adjacent `@retval` can be joined into one list by breathe.

v1 -> v2:

* Replace return value descriptions like `negative` and `positive` with
  expressions like `<0` and `>0` in `@retval`.
* Keep the list of `@retval` comprehensive, even when there is a `@return` to
  generally describe what the return value means.
* Drop duplicated `@return` when it does not give more information than the
  `@retval` list.

Tracked-On: #1595
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
2018-11-30 14:55:17 +08:00
Junjie Mao
97eb72a4a0 doc: always use 'None' for functions not returning a value
It is preferred to state the absence of a return value explicitly in the
doxygen-stile comments. Currently there are different styles of doing this,
including:

  @return None
  @return NULL
  @return void
  @return N/A

This patch unifies the above with `@return None`.

Tracked-On: #1595
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
2018-11-30 14:55:17 +08:00
Mingqiang Chi
5b43aa8a65 hv:Rename ptdev to ptirq for some variables and structures
ptdev_remapping_info --> ptirq_remapping_info
ptdev_msi_info --> ptirq_msi_info
ptdev_vpin_source --> ptirq_vpin_source
ptdev_irq_entries --> ptirq_entries
ptdev_entry_bitmaps --> ptirq_entry_bitmaps

v1-->v2:
   still use ptdev_lock instead of ptirq_lock
Tracked-On: #861
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-30 13:27:49 +08:00
Huihuang Shi
2afa7173ef hv: vlapic: fix "Procedure has more than one exit point"
IEC 61508,ISO 26262 standards highly recommend single-exit rule.

Reduce the count of the "return entries".
Fix the violations which is comply with the cases list below:
1.Function has 2 return entries.
2.The first return entry is used to return the error code of
checking variable whether is valid.

Fix the violations in "if else" format.

Tracked-On: #861
Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-27 14:43:16 +08:00
Zide Chen
b627c2c979 hv: switch IA32_TSC_AUX between host/guest through VM Controls
Currently guest IA32_TSC_AUX MSR is loaded manually right before VM
entry, and saved right after VM exit.

This patch enables VM-Entry Control and VM-Exit Control to switch
MSR IA32_TSC_AUX between host and guest automatically. This helps to
keep vcpu_thread() function and struct acrn_vcpu cleaner.

Also it removes the dead code of intercepting IA32_TSC_AUX.

Tracked-On: #1867
Signed-off-by: Zide Chen <zide.chen@intel.com>
Reviewed-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-27 09:26:29 +08:00
Shiqing Gao
f21e36f43b hv: vioapic: clean up HV_DEBUG usage
remove the usage of HV_DEBUG in vioapic.c

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-23 12:21:02 +08:00
Shiqing Gao
dfe48811d4 hv: vcpu: clean up HV_DEBUG usage
remove the usage of HV_DEBUG in vcpu.c

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-23 12:21:02 +08:00
Mingqiang Chi
538ba08c2b hv:Add vpin to ptdev entry mapping for vpic/vioapic
Now if the vmexit reason is virtulized EOI for level triggered
interrupts, HV will loop all the ptdev entries, it is time-consuming,
this patch add vpin to ptdev entry mapping for vpic and vioapic
when add intx entry for a vm,it can use the ptdev entry directly
according to the mapping for vpin and ptdev entry when EOI vmexit.

v3-->v4:
  -- add check vpin in remove_intx_remapping
  -- move check vpin from ptdev_add_intx_remapping to add_intx_remapping

Tracked-On: #861
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Reviewed-by: Binbin Wu <binbin.wu@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
2018-11-22 11:26:04 +08:00
Shuo Liu
e8296dce05 hv: Add IO request completion polling feature
This patch introduce a new mode of IO request completion, polling mode.

Now, the sketch of ioreq process can be,
  A. UOS vcpu0 generate PIO/MMIO ->
   B. pcpu1(vcpu0 of UOS) trap into HV ->
    C. pcpu1 build ioreq, send IPI and enter idle ->
     D.1 pcpu0(vcpu0 of SOS) response IPI,
     D.2 pcpu0 handle the ioreq in HV, kernel, DM,
     D.3 pcpu0 mark ioreq as complete,
     D.4 pcpu0 hypercall to enter HV ->
       E.1 pcpu0 send IPI to wake pcpu1 up
       E.2 UOS vcpu0 continue running

With this change, it skips D.4, E.1 steps. In step C, pcpu1 will enter a
polling ioreq state idle after send out the IPI.
It can save about ~5000 cpu cycles.

In polling mode, we do the polling in idle instead of pause cpu all the
time. It will consume more power. A better way is to use monitor/mwait
instructions which can put cpu into a sleep state with monitoring a
memory address. Unfortunately, APL has bug with monitor. We can gather
all ioreqs state into one monitorable memory and take advantage of
monitor/mwait for future platform.

The way polling or notification is per VM. We can config VMs in
different mode. By default, IO request completion will use notification
mode for all VMs. We can switch it by Kconfig.

Tracked-On: #1821
Signed-off-by: Shuo Liu <shuo.a.liu@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-11-21 14:35:12 +08:00
Shiqing Gao
3731b4c0ac hv: fix '(void) missing for discarded return value'
MISRA-C requires that the function call in which the returned
value is discarded shall be clearly indicated using (void).

This patch fixes the violations related to the following
function calls.
- vlapic_set_intr
- vlapic_intr_edge

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
2018-11-13 19:24:54 +08:00
Mingqiang Chi
9a009bcef2 hv:Replace dynamic memory with static for mmio
-- Config MAX_EMULATED_MMIO_REGIONS 16 in Kconfig
-- Add emulated mmio array and emulated mmio regions
   in vm structure
-- Remove mmio list in vm structure
-- Remove unregister_mmio_emulation_handler and
   vioapic_cleanup APIs

Tracked-On: #861
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-13 11:52:48 +08:00
Mingqiang Chi
73530055b6 hv:Replace dynamic memory with static for port io
-- Add emulated port io index
-- Add emulated pio array in vm structure
-- Remove port list in vm structure
-- Remove free_io_emulation_resource/register_io_handler/
   create_io_handler APIs

v2-->v3:
 -- not add 'is_emulated', check len == 0U
 -- Check if io_read/io_write handler is NULL before calling
 -- Replace ENUM with MACRO for emulated pio index to avoid
    MISRA-C violations

v1-->v2:
  -- Remove EMUL_PIO_NUM in Kconfig, add emulated pio index
     for PIC/PCI/UART/RTC/PM

Tracked-On: #861
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-09 13:05:04 +08:00
Xiangyang Wu
99586e32cc HV:treewide:rename vm data structure
For data structure types "struct vm", its name is identical
with variable name in the same scope. This is a MISRA C  violation.

Naming convention rule:If the data structure type is used by multi
modules, its corresponding logic resource is exposed to external
components (such as SOS, UOS), and its name meaning is simplistic
(such as vcpu, vm), its name needs prefix "acrn_".

The following udpates are made:
struct vm *vm-->struct acrn_vm *vm

Tracked-On: #861

Signed-off-by: Xiangyang Wu <xiangyang.wu@linux.intel.com>
2018-11-05 15:35:49 +08:00
Xiangyang Wu
ace4f48c9a HV:treewide:rename vcpu_arch data structure
For data structure types "struct vcpu_arch", its name
shall follow Naming convention.

Naming convention rule:If the data structure type is
used by multi modules, its corresponding logic resource
is exposed to external components (such as SOS, UOS),
and its name meaning is simplistic (such as vcpu, vm),
its name needs prefix "acrn_". Variable name can be
shortened from its data structure type name.

The following udpates are made:
struct vcpu_arch arch_vcpu-->struct acrn_vcpu_arch arch

Tracked-On: #861

Signed-off-by: Xiangyang Wu <xiangyang.wu@linux.intel.com>
2018-11-05 15:35:49 +08:00
Xiangyang Wu
fa26a16645 HV:treewide:rename vcpu data structure
For data structure types "struct vcpu", its name is identical
with variable name in the same scope. This is a MISRA C  violation.

Naming convention rule:If the data structure type is used by multi
modules, its corresponding logic resource is exposed to external
components (such as SOS, UOS), and its name meaning is simplistic
(such as vcpu, vm), its name needs prefix "acrn_".

The following udpates are made:
struct vcpu *vcpu-->struct acrn_vcpu *vcpu

Tracked-On: #861

Signed-off-by: Xiangyang Wu <xiangyang.wu@linux.intel.com>
2018-11-05 15:35:49 +08:00
Yonghua Huang
f23606a4c3 hv: revise interfaces description in vioapic
Add comments for APIs:
 - vioapic_set_irq();
 - vioapic_set_irq_nolock();

Tracked-On: #1595
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
2018-11-03 08:40:14 -07:00
Yonghua Huang
7c20cb0cbe hv: revise interfaces description in vpic
Add comments for APIs:
 - vpic_set_irq()
 - vpic_pending_intr()
 - vpic_intr_accepted()

Tracked-On: #1595
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
2018-11-03 08:40:14 -07:00