Since PRs #7115 and #6664 have landed, the ivshmem and hv_ram_size have
been refined, some related checks are obsolete in config tool.
So we remove these checks here.
Tracked-On: #7136
Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
The concept of guest_flags is hard to understand for users.
So turn guest_flags into several parameters in config tool
user interface, list as below:
GUEST_FLAG_LAPIC_PASSTHROUGH ---> lapic_passthrough
GUEST_FLAG_IO_COMPLETION_POLLING ---> io_completion_polling
GUEST_FLAG_VCAT_ENABLED ---> virtual_cat_support
GUEST_FLAG_SECURE_WORLD_ENABLED ---> secure_world_support
GUEST_FLAG_HIDE_MTRR ---> hide_mtrr_support
GUEST_FLAG_NVMX_ENABLED ---> nested_virtualization_support
GUEST_FLAG_SECURITY_VM ---> security_vm
GUEST_FLAG_RT ---> vm_type(RTVM)
GUEST_FLAG_TEE ---> vm_type(TEE_VM)
GUEST_FLAG_REE ---> vm_type(REE_VM)
In addition, HV global parameter NVMX_ENABLE is removed
from user interface, when config tool detects more than
one VM with nested_virtualization_support, NVMX_ENABLE is
assigned as 'y' automatically.
v1->v2:
*Rebase on the latest xml schema checking change
*Remove "all rights reserved" from the license header in guest_flags.py
v2->v3:
*Change the name of the new config items to CAPITAL_CASE style
*Combine guest flag policy to an XPATH in guest_flags.py
*Use count() to directly deduce NVMX_ENABLED in config_common.xsl and
update `boolean-by-key-value` to process 'true'
v3->v4:
*Change the name of the new config items to lower_case style
*Change guest_flag_node to allocation_vm_node in guest_flags.py
*Separate value case and key case for boolean-by-key-value
Tracked-On: #6690
Signed-off-by: hangliu1 <hang1.liu@linux.intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Update the XPATH of apic_id to tolerate the variance of reported
intermediate levels.
Tracked-On: #7159
Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Remove the logic to parse SERIAL_CONSOLE and append to bootargs. Specify the console in bootargs directly.
Tracked-On: #7127
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
This patch includes:
1.add load_order(PRE_LAUNCHED_VM/SERVICE_VM/POST_LAUNCHED_VM) parameter
2.change vm_type parameter to values as RTVM, STANDARD_VM, TEE, REE
TEE and REE are hide in UI.
3.deduce vm severity in vm_configuration from vm_type and load_order
This patch not includes:
change for scenario_config and functions called by scenario_config about checking
v2->v3:
*Refine template load_order
v1->v2:
*Change variable name from vm_type to load_order
*Change LoadOptionType to LoadOrderType
*Change VMOptionsType to VMType
*Add TEE_VM/REE_VM description
*Refine acrn:is-pre-launched-vm
Tracked-On: #6690
Signed-off-by: hangliu1 <hang1.liu@linux.intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Since PR #7113 has landed, we also remove PLATFORM_RAM_SIZE in the related
Python code, schema and all existing scenario XML files.
Tracked-On: #6690
Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
With the launch script generation script rewritten, some other files under
launch_config are no longer used. This patch removes these obsoleted files.
Tracked-On: #6690
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
The launch script generator today (and the scripts that it generates) is
fundamentally built on the concept of PCI device classes, with the
restriction that at most one PCI function per class can be passed through
to a post-launched VM. This has put inproper constraint on the scenarios
users can set up, especially on server platforms or those with SR-IOV
capable devices.
As it is too tedious to change such deep-rooted concept, this patch
rewrites the launch script generator and refines the structure of the
generated scripts so that PCI functions are identified only by their
BDF.
This change serves as a mandatory step to align the way how passthrough
devices are configured for pre-launched and post-launched VMs, which
eventually allows us to present a unified view in the configurator for
assigning passthrough device.
v2 -> v3:
* Rename sos_id to service_vm_id and user_vmid to user_vm_id.
* Refine a couple of info messages in the launch script template.
v1 -> v2:
* Fix wording issues identified during review.
* Exit when the out_dir is an existing regular file.
Tracked-On: #6690
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Rewrite the configuration of ivshmem in scenario.xml according to
the format of new UI design.
Tracked-On: #6690
Signed-off-by: Yuanyuan Zhao <yuanyuan.zhao@linux.intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
According to the new design of DX, implement ivshmem configuration
and generate hv related files.
Tracked-On: #6690
Signed-off-by: Yuanyuan Zhao <yuanyuan.zhao@linux.intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Since PR 7081 has updated the dm parameter`lapic_pt` usage,
according to the new design, we add the`--rtvm` parameter
for Hard RT in launch script generation logic.
Tracked-On: #6690
Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
category based on different log levels:
1) If the board inspector show CRITICAL error messages, it means that the
board inspector tool exit instantly and generate no file.
2) If the board inspector show ERROR messages, it means that the board
inspector will generate the board XML file successfully, but several conditions
may result in ACRN build or boot failure cannot continue execution due to the error.
3) If the board inspector show WARNING messages, this means that the board inspector
generate the board XML file successfully, but this board XML file is lack of
some feature which could still boot ACRN but loss some features.
4) If the board inspector show INFO messages, this means that board inspector
printed out some normal information.
5) If the board inspector show DEBUG messages, this means that it is used to
debug board inspector workflow.
v1->v2
1. Keep the assertions or exceptions under the acpiparser, inspectorlib
and smbiosparser directory.
2. Exit after all check_deps() completes instead of any unsatisfied dep
is identified.
3. As Amy's advice, Replace the message "{board_xml} saved successfully" with
the message "SUCCESS: Board configuration file <file name> generated successfully
and saved to <path>."
To do:
Print all messages using the colored font.
Tracked-On: #6689
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
Bring all the cores up in the beginning of the board_inspector.py
It is expected to run board_inspector in clean and native environment.
To resolve the issue that user may run other jobs which puts cores
offline, bringing up all cores online so tool can run cpuid to extract
all available cores information.
Tracked-On: #7119
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
In 10-processors.py, level_types is an unordered dictionary from level type
encodings to human-readable terms, not a list. It is thus illegal to access the
highest level using the `[-1]` notation.
This patch fixes this by calculating the highest level in level_types and use
that level as the index instead.
Tracked-On: #6689
Fixes: b5b22bf98 ("board_inspector: avoid hard-coded topo level names")
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Manually specifying MAX_IOAPIC_NUM and MAX_IOAPIC_LINES in a scenario XML
is still usable as a workaround on boards without IOAPIC (e.g. emulated
ones) or when the board inspector does not collect IOAPIC information
correctly.
This patch takes user-specified values of those items if
provided. Otherwise the automatically calculated values will be used
instead, as is done today.
Tracked-On: #6986
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Today the config.h/config.mk generators do not put a newline after an entry
without a value, which causes the generated files ill-formed.
This patch fixes the issue by putting a newline at the end of an entry
unconditionally.
Tracked-On: #6355
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
In XSL a string variable can be nul, the empty string or a non-empty
string. While `$var != ''` ensures that `var` is a non-empty string,
`$var = ''` is true only when `var` holds the empty string. In other words,
`$var = ''` and `$var != ''` can be both false if `var` evaluates to nul.
As a result, the config.h/config.mk generating scripts does not use the
given default value if the explicit value is nul.
This patch fixes the incorrect comparison in the XSL scripts that handles
default values, so that the default value behaves as expected.
Tracked-On: #6355
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
The board configuration generator assumes all PCI BARs are programmed when
the board inspector runs, which is sometimes not the case. Unprogrammed
BARs will be reported using plain texts wrapped by angle brackets in the
output of `lspci`.
This patch gracefully skips the unprogrammed BARs and continues when
parsing the output of `lspci`, in order to avoid build-time failures due to
unprogrammed BARs.
Tracked-On: #6355
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
While the terms to refer to CPU topology levels are originally borrowed
from MSR listings in SDMs (i.e. thread, core, die and package), we now
align the topology information with the CPUID topology enumeration
leaf (which does not have a "package" level) in the
implementation. However, some hard-coded level types are not updated
accordingly, leading to strangely organized nodes in the generated board
XML.
This patch refines the CPU extractor of the board inspector by removing
such hard code. Also the XPATH counting the total number of threads is
refined to tolerate the variance of reported intermediate levels.
Tracked-On: #6689
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Not all pci hostbridge has a device on it. Remove the logic which
assumes there is at least one device.
Tracked-On: #7077
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
Update the usage of cpu affinity param in launch script generation logic,
use apic_id got from board XML file instead of pcpu id from scenario XML
file according to the refined usage '--cpu_affinity lapic_id'.
The generated script will look like this:
`--cpu_affinity 0,2 \`
Tracked-On: #6690
Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
qemu build fail with the old board xml.
this should be re-generated by the latest board inspector tool
which include the changes in PR#7067
Tracked-On: #7058
Signed-off-by: zhongzhenx.liu <zhongzhenx.liu@intel.com>
The interrupt pin descriptors in board XML follows the same notation as in
ACPI PRT (PCI Routing Table), i.e. either an integer or a pair of a device
object and an index.
However, the current static INTx allocator recognizes
integer-as-interrupt-line only, which will cause build-time failure if
the "device object + index" notation is used in physical DSDT to describe
PCI interrupt pin routing.
This patch refines the static allocator so that both notations can be
parsed properly. In case an interrupt line descriptor in the board XML
refers to an device object without an index, it is interpreted as the first
of the ACPI device object if it is an interrupt resource.
Tracked-On: #7058
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
INTx routing can be specified in ACPI PRT (PCI Routing Table) in two ways:
1. By an absolute interrupt line from the global interrupt pool.
2. By a device object and an index to its interrupt resource.
The board inspector today only encodes the source object of an interrupt
pin routing in XML device resource descriptors, which is incomplete if the
source is a device object (i.e. case 2 above).
This patch adds the index from PRT to device resource nodes as well.
Tracked-On: #7058
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
Add the shebang header (for Python) and make the acrn_configurator.py
executable so it can more easily be run as in './acrn_configurator.py'
Tracked-On: #7057
Signed-off-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
Today the XML validation logic is embedded in scenario_cfg_gen.py which is
highly entangled with the Python-internal representation of
configurations. Such representation is used by the current configurator,
but will soon be obsolete when the new configurator is introduced.
In order to avoid unnecessary work on this internal representation when we
refine the schema of scenario XML files, this patch separates the
validation logic into a new script which can either be used from the
command line or imported in other Python-based applications. At build time
this script will be used instead to validate the XML files given by users.
This change makes it easier to refine the current configuration items for
better developer experience.
Migration of existing checks in scenario_cfg_gen.py to XML schema will be
done by a following series.
v2 -> v3:
* Keep Invoking asl_gen.py to generate vACPI tables for pre-launched VMs.
v1 -> v2:
* Remove "all rights reserved" from the license header
* Upgrade the severity of the message indicating lack of xmlschema as
error according to our latest definitions of log severities, as
validation violations could indicate build time or boot time failures.
Tracked-On: #6690
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
1. for the `virtio-net`, add type field to specify tap/macvtap type.
The generated script will look like this. (eg. -s 4,virtio-net,tap=Waag)
2. Change mac_seed as virtio-net subparameter.
(eg. -s 10,virtio-net,tap=YaaG3,mac_seed=XXXXXX)
Tracked-On: #6690
Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
Today we assume a device node under /sys/devices/pciXXXX:XX/ always contain
a `config` file which shows the configuration space of the PCI
functions. This seems not the case for, at least, Non-Transparent
Bridge (or NTB).
This patch checks the existence of the `config` file and skips PCI
functions which do not contain one.
Tracked-On: #6902
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
The stream tracks the AML binary to be parsed as a list of bytes, not
characters. It makes no sense to call `ord` with a byte as the input
parameter.
This patch also adjust the format of the dump and print the formatted using
the logging module.
Tracked-On: #6504
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Reviewed-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
1. remove the board_private tag in the schema and all existing scenario XML files,
and remove the related value check about board_private.rootfs and bootargs.
2. merge board_private.rootfs and board_private.bootargs to os_config.bootargs.
and no change to the related contents of the .c/.h files except the order of
define SERVICE_VM_ROOTFS.
3. update the schema to make os_config.bootargs configurable for service VM in UI.
Tracked-On: #6690
Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
Since PR #7002 has removed "pm_notify_channel" and "pm_by_vuart"
from acrn-dm usage, this patch also removes the two parameters
in the launch script generation logic.
Tracked-On: #6690
Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
Since PR #7002 has removed some dynamic parameters from
acrn-dm usage, this patch also removes the following parameters
in launch script generation logic.
1. --vsbl <vsbl_file_path>
2. -s <slot>,npk
3. -i, --ioc_node <ioc_mediator_parameters>
4. -A, --acpi
5. virtio-ipu
6. virtio-audio
Tracked-On: #6690
Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
If the user installed the lib python package in the host machine,
it will fail to build acrn hypervisor since the same package named lib is
also used in acrn config tool(static_allocators/lib).
So we add the __init__.py file under the static_allocators/lib directory
to fix the error.
Tracked-On: #7001
Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
Generate MAX_IOAPIC_NUM and MAX_IOAPIC_LINE based on board.xml automatically.
Tracked-On: #6986
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
Add a new extractor 40-acpi-tables.py which extracts ioapics basic
information such as: ioapic id, address, gsi base and gsi number.
An example:
<ioapics>
<ioapic id="0x2">
<address>0xfec00000</address>
<gsi_base>0x0</gsi_base>
<gsi_number>240</gsi_number>
</ioapic>
</ioapics>
Tracked-On: #6986
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
1.Re-obtain generic/nuc11/whl/cfl board xmls according to 6987.patch.
2.Modify the corresponding scenario pci.
3.Add cfl-k700-i7 scenario (hybrid/partitioned) and launch xml files.
Tracked-On: #6986
Signed-off-by: zhongzhenx.liu <zhongzhenx.liu@intel.com>
According to PCIe specification (since 2.0), absence of any extended
capabilities is required to be indicated by an extended capability header
with a capability ID of FFFFh and a next capability offset of 000h. Thus,
the board inspector today accesses the first extended capability header at
100h in the configuration space of a PCIe function unconditionally.
However, in practice we have seen real PCI functions which has a PCIe
capability but no extended capability header. This will cause the board
inspector to crash due to invalid configuration space accesses.
To fix that, this patch adds a check to the size of the configuration space
before walking the extended capabilities of a PCIe function.
Tracked-On: #6411
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
Extract the max pci bus number from board information and generate the
common configuration macro ACFG_MAX_PCI_BUS_NUM automatically.
Tracked-On: #6942
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
This patch adds an option CONFIG_KEEP_IRQ_DISABLED to hv (default n) and
config-tool so that when this option is 'y', all interrupts in hv root
mode will be permanently disabled.
With this option to be 'y', all interrupts received in root mode will be
handled in external interrupt vmexit after next VM entry. The postpone
latency is negligible. This new configuration is a requirement from x86
TEE's secure/non-secure interrupt flow support. Many race conditions can be
avoided when keeping IRQ off.
v5:
Rename CONFIG_ACRN_KEEP_IRQ_DISABLED to CONFIG_KEEP_IRQ_DISABLED
v4:
Change CPU_IRQ_ENABLE/DISABLE to
CPU_IRQ_ENABLE_ON_CONFIG/DISABLE_ON_CONFIG and guard them using
CONFIG_ACRN_KEEP_IRQ_DISABLED
v3:
CONFIG_ACRN_DISABLE_INTERRUPT -> CONFIG_ACRN_KEEP_IRQ_DISABLED
Add more comment in commit message
Tracked-On: #6571
Signed-off-by: Yifan Liu <yifan1.liu@intel.com>
Reviewed-by: Wang, Yu1 <yu1.wang@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
1. remove LOG_DESTINATION in the related python code, schema and
all existing scenario XML files.
2. for MEM_LOGLEVEL, NPK_LOGLEVEL and CONSOLE_LOGLEVEL,
update the loglevel range to [0, 5] from [0, 6].
Tracked-On: #6934
Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
remove LOG_BUF_SIZE in the related python code, schema and
all existing scenario XML files.
Tracked-On: #6690
Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
Because it is not configurable, config tool might not need to
define DM_OWNED_GUEST_FLAG_MASK. So we remove it in tool.
Tracked-On: #6366
Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
GUEST_FLAG_SECURITY_VM only for pre-launch vm, should not be
programmed by device model, so we remove it in DM_OWNED_GUEST_FLAG_MASK.
Tracked-On: #6366
Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
Get the integrated GPU bdf by looking for device from board.xml and extract the
BDF from device address.
Tracked-On: #6855
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
remove CONFIG_MAX_IR_ENTRIES the related python code, schema and
all existing scenario XML files since PR #6809 have changed it.
Tracked-On: #6745
Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
remove LOW_RAM_SIZE in the related python code, schema and
all existing scenario XMLs because PR #6791 have removed it.
Tracked-On: #6805
Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
Add a configuration to support companion VM.
Tracked-On: #6571
Signed-off-by: Jie Deng <jie.deng@intel.com>
Reviewed-by: Wang, Yu1 <yu1.wang@intel.com>
Add two VM flags for x86_tee. GUEST_FLAG_TEE for TEE VM,
GUEST_FLAG_REE for normal rich VM.
Tracked-On: #6571
Signed-off-by: Jie Deng <jie.deng@intel.com>
Reviewed-by: Wang, Yu1 <yu1.wang@intel.com>
Add assert for below invalid scenario:
1. Two or more pre-launched RTVM
2. One pre-launched RTVM and one or more post-launched RTVM
Tracked-On: #6685
Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
1. remove CONFIG_KATA_VM, CONFIG_MAX_KATA_VM_NUM and KATA_VM
related code.
2. remove KATA_VM in scenario xml files.
3. remove KATA vm type in UI.
4. remove UUID DB.
5. remove uuid in the launch script generation logic.
6. use vmname to identify a vm. (eg: <name>ACRN_SOS_VM</name>)
add the check logic to ensure vm name is a must-set item, not duplicated,
and the string length is [1-15] and the whitespace is not allowed.
7. enlarge the max VM num to 32.
Tracked-On: #6685
Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
Rename function name to get-common-clos-count and refine the
calculation. Some platforms have odd clos counts. Using "floor" to get
integer numbers for macros.
Tracked-On: #6755
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
1. ensure cpu affinity in launch xml is subset of its scenario settings.
2. cpu_affinity is a must have parameter for acrn_dm, if the user did not provide cpu affinity in launch xml, load it from scenario settings.
Tracked-On: #6724
Signed-off-by: Weiyi Feng <weiyix.feng@intel.com>
when we add two or more virtio block devices and rename them for a VM
in launch xml files, then generate launch scripts through the UI.
After ensuring the devices names are different, we repeat these operations
continuously. Finally we will get the duplicate PT_SLOT value for
different virtio block devices in a launch script. This is wrong.
After user click the "Generate Launch Script" button to generate the
launch scripts every time, we will reset PT_SLOT variate to fix the issue.
Tracked-On: #6767
Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
Set hv features L1D_VMENTRY_ENABLED, MCE_ON_PSC_DISABLED and PTM
default value to 'y' in schema.
Tracked-On: #6793
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
Generate serial configuration file for service VM according
to scenario file and vUART ports base address allocated by
config tool.
Currently, some non-standard serial ports are emulated in
hypervisor and will be used to do communication between service
VM and user VM, so need to generate serial configuration file
to configure these serial ports for service VM.
v1-->v2:
Fix some type issues
Refine script code format
Tracked-On: #6652
Signed-off-by: Xiangyang Wu <xiangyang.wu@intel.com>
The pre-rtvm uses the RTCT tab to determine it's SSRAM address.
It was origionally duplicated from the host, and keeped its address
and layout.
To move the SSRAM area in ve820, we have to modify the guest's RTCT
tab first.
This patch uses the board_inspector's RTCT module to parse the host's
RTCT tab, and calculate the offset, then modifies the SSRAM/bin enties,
and saves it to the new RTCT bin file.
Tracked-On: #6674
Signed-off-by: Zhou, Wu <wu.zhou@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
The config of MAX_EFI_MMAP_ENTRIES has been removed in hypervisor, so remove
this config in config_tools;
Tracked-On: #6442
Signed-off-by: Victor Sun <victor.sun@intel.com>
when we click the "Import XML" button to import the scenario xml file, then
click the "Export XML" to export the xml files, we will find some errors because
UI don't show the default value set in schema.
As a workaround, we call default_populator.py in UI to expand the default value
in the scenario XML file to fix the issue.
Tracked-On: #6292
Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
This reverts commit 9e2edd5192.
Because config UI don't support multi legacy vuart in current logic,
we need to revert the commit to unblock UI.
Tracked-On: #6652
Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
since PRs #6760 and #6765 have landed,
we also need to rename "UOS" to "user vm" in UI.
Tracked-On: #6744
Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
when we add two or more virtio block devices and rename them for a VM
in launch xml files, then generate launch scripts through the UI.
After ensuring the devices names are different, we repeat these operations
continuously. Finally we will get the duplicate PT_SLOT value 30 for
different virtio block devices in a launch script. This is wrong.
As a workaround, we reassign PT_SLOT variate to reset it after the launch
script is generated every time.
Tracked-On: #6767
Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
since PRs #6760 and #6747 have renamed uos to user_vm,
we also need to rename it in config UI.
Tracked-On: #6744
Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
1. remove hvlog parameter in bootargs for all platforms.
2. update HV_RAM_START default address from 2MB to 4MB.
3. add the check that the HV_RAM_START value should be larger
than or equal to 2MB and 2MB aligned.
Tracked-On: #6663
Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
In this patch, add vuart configuration in scenario XML of
each board to support communication between service VM and
user VM since system shutdown feature need to send commands
through this vuart communication channel.
The follow changes are made in this patch:
- Add multi legacy vuart for service VM for communication
- Add one legacy vuart for user VM for communication
- Add 8250.nr_uarts parameter in command line of service OS
Tracked-On: #6652
Signed-off-by: Xiangyang Wu <xiangyang.wu@intel.com>
1. "make clean && make BOARD=nuc11tnbi5 SCENARIO=shared" will generate the acrn debian package.
2. "make clean && make board_inspector" will generate the acrn board_inspector debian package
Tracked-On: #6688
Signed-off-by: Hu Fenglin <fenglin.hu@intel.com>
Rename SOS_VM type to SERVICE_VM
rename UOS to User VM in XML description
rename uos_thread_pid to user_vm_thread_pid
rename devname_uos to devname_user_vm
rename uosid to user_vmid
rename UOS_ACK to USER_VM_ACK
rename SOS_VM_CONFIG_CPU_AFFINITY to SERVICE_VM_CONFIG_CPU_AFFINITY
rename SOS_COM to SERVICE_VM_COM
rename SOS_UART1_VALID_NUM" to SERVICE_VM_UART1_VALID_NUM
rename SOS_BOOTARGS_DIFF to SERVICE_VM_BOOTARGS_DIFF
rename uos to user_vm in launch script and xml
Tracked-On: #6744
Signed-off-by: Liu Long <long.liu@linux.intel.com>
Reviewed-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
Rename SOS_VM_NUM to SERVICE_VM_NUM.
rename SOS_SOCKET_PORT to SERVICE_VM_SOCKET_PORT.
rename PROCESS_RUN_IN_SOS to PROCESS_RUN_IN_SERVICE_VM.
rename PCI_DEV_TYPE_SOSEMUL to PCI_DEV_TYPE_SERVICE_VM_EMUL.
rename SHUTDOWN_REQ_FROM_SOS to SHUTDOWN_REQ_FROM_SERVICE_VM.
rename PROCESS_RUN_IN_SOS to PROCESS_RUN_IN_SERVICE_VM.
rename SHUTDOWN_REQ_FROM_UOS to SHUTDOWN_REQ_FROM_USER_VM.
rename UOS_SOCKET_PORT to USER_VM_SOCKET_PORT.
rename SOS_CONSOLE to SERVICE_VM_OS_CONSOLE.
rename SOS_LCS_SOCK to SERVICE_VM_LCS_SOCK.
rename SOS_VM_BOOTARGS to SERVICE_VM_OS_BOOTARGS.
rename SOS_ROOTFS to SERVICE_VM_ROOTFS.
rename SOS_IDLE to SERVICE_VM_IDLE.
rename SEVERITY_SOS to SEVERITY_SERVICE_VM.
rename SOS_VM_UUID to SERVICE_VM_UUID.
rename SOS_REQ to SERVICE_VM_REQ.
rename RTCT_NATIVE_FILE_PATH_IN_SOS to RTCT_NATIVE_FILE_PATH_IN_SERVICE_VM.
rename CBC_REQ_T_UOS_ACTIVE to CBC_REQ_T_USER_VM_ACTIVE.
rename CBC_REQ_T_UOS_INACTIVE to CBC_REQ_T_USER_VM_INACTIV.
rename uos_active to user_vm_active.
Tracked-On: #6744
Signed-off-by: Liu Long <long.liu@linux.intel.com>
Reviewed-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
Improve the logging readibility for the Board Inspector tool by adding
a space after "Error:" and "Warning:" instead of have the text directly
attached to it.
Tracked-On: #6736
Signed-off-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
Commit 4a04fcc ("config_tools: skip remapping HW units with no devices under
scope") skips hardware remapping units without any device under its scope in the
config tools, which turns out to only work if the HV is not parsing the DMAR at
runtime.
This patch reverts the previous workaround and fixes the previous issue by
always initializing `dmar_hw_list.hw_ignore` when parsing DMAR. This ensures
that the DRHDx_IGNORE macro will always be emitted while DRHD_COUNT is not
impacted.
Fixes: 4a04fcc ("config_tools: skip remapping HW units with no devices under scope")
Tracked-On: #6709
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Fix a crash in the 'board_inspector.py' tool in case 'cpuid' is not
installed on the system.
The tools crashes because 'cpuid' is used before the check for
dependencies is done in the code. That check for dependencies is
done in the 'legacy/board_parser.py' file. But the native_check()
function that is called before it also expects the cpuid tool to
be installed.
The fix is to move the check for dependencies in the main
'board_inspector.py' file, before any other operation is done.
Tracked-On: #6719
Signed-off-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
We should generate new board xmls for cfl,whl and nuc11 because of the
board inspector changes. For the details refer to these RPs:#6699 #6710
Tracked-On:#6709
Signed-off-by: zhongzhenx.liu <zhongzhenx.liu@intel.com>
For vCAT, it may need to store more than MAX_VCPUS_PER_VM of closids,
change clos in vm_config.h to a pointer to accommodate this situation
Rename clos to pclosids
pclosids now is a pointer to an array of physical CLOSIDs that is defined
in vm_configurations.c by vmconfig. The number of elements in the array
must be equal to the value given by num_pclosids
Add max_type_pcbm (type: l2 or l3) to struct acrn_vm_config, which stores a bitmask
that selects/covers all the physical cache ways assigned to the VM
Change vmsr.c to accommodate this amended data structure
Change the config-tools to generate vm_configurations.c, and fill in the num_closids
and clos pointers based on the information from the scenario file.
Now vm_configurations.c.xsl generates all the clos related code so remove the same
code from misc_cfg.h.xsl.
Examples:
Scenario file:
<RDT>
<RDT_ENABLED>y</RDT_ENABLED>
<CDP_ENABLED>n</CDP_ENABLED>
<VCAT_ENABLED>y</VCAT_ENABLED>
<CLOS_MASK>0x7ff</CLOS_MASK>
<CLOS_MASK>0x7ff</CLOS_MASK>
<CLOS_MASK>0x7ff</CLOS_MASK>
<CLOS_MASK>0xff800</CLOS_MASK>
<CLOS_MASK>0xff800</CLOS_MASK>
<CLOS_MASK>0xff800</CLOS_MASK>
<CLOS_MASK>0xff800</CLOS_MASK>
<CLOS_MASK>0xff800</CLOS_MASK>
/RDT>
<vm id="0">
<guest_flags>
<guest_flag>GUEST_FLAG_VCAT_ENABLED</guest_flag>
</guest_flags>
<clos>
<vcpu_clos>3</vcpu_clos>
<vcpu_clos>4</vcpu_clos>
<vcpu_clos>5</vcpu_clos>
<vcpu_clos>6</vcpu_clos>
<vcpu_clos>7</vcpu_clos>
</clos>
</vm>
<vm id="1">
<clos>
<vcpu_clos>1</vcpu_clos>
<vcpu_clos>2</vcpu_clos>
</clos>
</vm>
vm_configurations.c (generated by config-tools) with the above vCAT config:
static uint16_t vm0_vcpu_clos[5U] = {3U, 4U, 5U, 6U, 7U};
static uint16_t vm1_vcpu_clos[2U] = {1U, 2U};
struct acrn_vm_config vm_configs[CONFIG_MAX_VM_NUM] = {
{
.guest_flags = (GUEST_FLAG_VCAT_ENABLED),
.pclosids = vm0_vcpu_clos,
.num_pclosids = 5U,
.max_l3_pcbm = 0xff800U,
},
{
.pclosids = vm1_vcpu_clos,
.num_pclosids = 2U,
},
};
Tracked-On: #5917
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
Add the VCAT_ENABLED element to RDTType so that user can enable/disable vCAT globally
Add the GUEST_FLAG_VCAT_ENABLED guest flag to enable/disable vCAT per-VM.
Currently we have the following per-VM clos element in scenario file for RDT use:
<clos>
<vcpu_clos>0</vcpu_clos>
<vcpu_clos>0</vcpu_clos>
</clos>
When the GUEST_FLAG_VCAT_ENABLED guest flag is not specified, clos is for RDT use,
vcpu_clos is per-CPU and it configures each CPU in VMs to a desired CLOS ID.
When the GUEST_FLAG_VCAT_ENABLED guest flag is specified, vCAT is enabled for this VM,
clos is for vCAT use, vcpu_clos is not per-CPU anymore in this case, just a list of
physical CLOSIDs (minimum 2) that are assigned to VMs for vCAT use. Each vcpu_clos
will be mapped to a virtual CLOSID, the first vcpu_clos is mapped to virtual CLOSID
0 and the second is mapped to virtual CLOSID 1, etc
Add xs:assert to prevent any problems with invalid configuration data for vCAT:
If any GUEST_FLAG_VCAT_ENABLED guest flag is specified, both RDT_ENABLED and VCAT_ENABLED
must be 'y'
If VCAT_ENABLED is 'y', RDT_ENABLED must be 'y' and CDP_ENABLED must be 'n'
For a vCAT VM, vcpu_clos cannot be set to CLOSID 0, CLOSID 0 is reserved to be used by hypervisor
For a vCAT VM, number of clos/vcpu_clos elements must be greater than 1
For a vCAT VM, each clos/vcpu_clos must be less than L2/L3 COS_MAX
For a vCAT VM, its clos/vcpu_clos elements cannot contain duplicate values
There should not be any CLOS IDs overlap between a vCAT VM and any other VMs
Tracked-On: #5917
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
1. remove HV_RAM_SIZE and CONFIG_HV_RAM_SIZE in the related python
code, schema and all existing scenario XMLs because PR 6664 has
changed it in HV side.
2. set HV_RAM_START default value to 2M.
Tracked-On: #6663
Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
It is seen on some platforms that the ACPI DMAR tables will report
remapping hardware units that does not have any device under its scope,
which is not expected by the board inspector previously and thus causes the
tool to generate inconsistent configuration data.
This patch makes the board inspector skip such remapping hardware units. It
does not impact the functionality of the hypervisor as no device is managed
by those skipped remapping units.
Tracked-On: #6709
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
In commit of 7cc9c8fe06
the pre-launched VM was set to ACPI HW Reduced platform, then the IRQ
would be allocated from 0 for PCI MSI devices. The Intel igb/igc driver
might get IRQ 8 when do request irq which would conflict with the irq
of RTC device:
[ 14.264954] genirq: Flags mismatch irq 8. 00000000 (enp0s8-TxRx-3) vs.
00000000 (rtc0)
[ 14.265411] ------------[ cut here ]------------
[ 14.265508] kernel BUG at drivers/pci/msi.c:376!
[ 14.265610] invalid opcode: 0000 [#1] PREEMPT SMP
[ 14.265710] CPU: 0 PID: 296 Comm: connmand Not tainted 5.10.52-acrn-sos
-dirty #72
[ 14.265863] RIP: 0010:free_msi_irqs+0x182/0x1b0
This patch will specify some legacy PnP device like UART and RTC in ACPI
DSDT table of pre-launched VM, so that IRQs from IOAPIC pin 4/3/8 could be
preserved before MSI device requesting IRQs.
Tracked-On: #6704
Signed-off-by: Victor Sun <victor.sun@intel.com>
Remove the restriction that SERIAL_CONSOLE needs to be ttys0, ttys1,
ttys2 or ttys3.
1. Lossen the restriction in xsd.
2. Rewrite the document.
3. Refine the intx.py. Refine the logic which take effect if the <irq>
is specified in "SOS_COM#_IRQ" for SOS VM's legacy vuart 0.
Tracked-On: #6610
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
add hybrid_rt.xml file under the generic_board folder so that
UI can call pre_rt_vm type when the user clicks 'Add a VM below'
button to add a new pre_rt_vm.
Tracked-On: #6292
Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
call default_populator.py to expand the default value in the
scenario XML file to fix the issue that don't export xml successfully
in UI when user to click the 'Export XML' button to export scenario xml
file because that the unexpanded xml does not conform to schema check.
Tracked-On: #6292
Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
According to TCG ACPI specification (version 1.2), the current revision of
TPM2 table, which has the optional log area fields, is 4. This patch
updates the revision of vTPM2 accordingly.
Tracked-On: #6288
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
ACPI device drivers use both _HID and _CID to identify devices they
match. This patch copies _CID objects to vACPI devices so that guest
drivers can recognize the passthrough devices properly.
Tracked-On: #6288
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
If a legacy vuart base is configured as "CONFIG_COM_BASE", allocate a
base with unused io-port address with length 0x10.
The post-launched VM's unused io-port address range is [0xD00, 0xFFFF].
The pre-launched VM's unused io-port address range is [0xD00, 0xFFFF]
but the passthrough devices' io-port address are reserved.
The SOS VM's unused io-port address range is [0xD00, 0xFFFF] but any
native devices' io-port address are reserved. However, the io-port
address which is passed through to any pre-launched is reusable.
Tracked-On: #6652
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
Expand the capacity of legacy vuarts per VM. This change is applied to
manual scenario xml editing only.
A SOS VM can choose io port 0x3F8, 0x2F8, 0x3E8, 0x2E8 by selecting
SOS_COM1_BASE, SOS_COM2_BASE, SOS_COM3_BASE, SOS_COM4_BASE respectively.
Non SOS VM can choose io port 0x3F8, 0x2F8, 0x3E8, 0x2E8 by selecting
COM1_BASE, COM2_BASE, COM3_BASE, COM4_BASE respectively.
For any type of VM, selecting "CONFIG_COM_BASE" allows configuration tool
to pick an available io port from hardcoded list:
['0xA000', '0xA010', '0xA020', '0xA030', '0xA040', '0xA050', '0xA060', '0xA070']
A SOS VM can choose irq 4 by selecting SOS_COM1_IRQ and SOS_COM3_IRQ, and choose irq 3 by selecting SOS_COM2_IRQ and SOS_COM4_IRQ.
Non SOS VM can choose irq 4 by selecting COM1_IRQ and COM3_IRQ, and choose irq 3 by selecting COM2_IRQ and COM4_IRQ.
For SOS VM, selecting "CONFIG_COM_IRQ" allows configuration tool
to pick an available irq based on AVAILABLE_IRQ_INFO. For non SOS VM, it
will allocate an available irq from [1, 15].
Tracked-On: #6652
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
1. move tgl-rvp and ehl-crb-b folders under data directory to 1source.
2. delete nuc7i7dnb and whl-ipc-i7 folders under data directory.
Tracked-On: #6315
Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
Pass through the io-ports for the passthrough pci devices of
pre-launched VM.
Three parts to support this feature:
1. Identical map the pci devices io-port address for pre-launched VM
2. Set the io-ports address range to DSDT
3. Avoid to allocate the bar index for VMSIX
Tracked-On: #6620
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
Without this ``iomem=relaxed`` kernel parameter, the generated board XML
is essentially the same as having ``--basic`` when executing the board
inspector, i.e. the ACPI namespace will not be parsed. The generated
board XML may still work, but some functionality (e.g. passthru of TPM
and other PCI devices that need INTx) will no longer work due to lack of
hardware information.
Replacing PR #6618
Tracked-On: #5692
Signed-off-by: zhongzhenx.liu <zhongzhenx.liu@intel.com>
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
This patch adds a new priority based scheduler to support
vCPU scheduling based on their pre-configured priorities.
A vCPU can be running only if there is no higher priority
vCPU running on the same pCPU.
Tracked-On: #6571
Signed-off-by: Jie Deng <jie.deng@intel.com>
Simplify the statement by TPM2 enablement detection and present TPM2 device.
Remove the function and move the statement to misc_cfg.h.xsl
Tracked-On: #6562
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
The default value population algorithm introduced by commit
2bfaa34 ("config_tools: populate default values in scenario XML") only
populates default values to the first occurrence of a tag when the tag is
specified to allow multiple occurrences under an xs:all node. This may lead
to incomplete scenario XML as some of the default values are missed.
This patch fixes this issue by checking **all** nodes having the same tag
under a node specified by an xs:all schema.
Fixes: 2bfaa34 ("config_tools: populate default values in scenario XML")
Tracked-On: #6292
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
The execution order of the "modprobe pci_stub" command is erroneous
in the launch script generation logic. The "modprobe pci_stub" command
should be executed before unbinding passthru devices, so we adjust the
command excution order.
Tracked-On: #6565
Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
While we have default values of configuration entries stated in the schema
of scenario XMLs, today we still require user-given scenario XMLs to
contain literally ALL XML nodes. Missing of a single node will cause schema
validation errors even though we can use its default value defined in the
schema.
This patch allows user-given scenario XMLs to ignore nodes with default
values. It is done by adding the missing nodes, all containing the defined
default values, to the input scenario XML when copying it to the build
directory. This approach imposes no changes to either the schema or
subsequent scripts in the build system.
Tracked-On: #6292
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
1. For initial UI, rename "ACRN Config" to "ACRN Configurator",
rename "Scenario Setting" to "Scenario Settings", rename "Launch Setting"
to "Launch Settings", and rename "Import Board info" to "Import Board XML";
2. For UI scenario selection, change title "Load Scenario Setting" to
"Load Default Scenario Settings", Change title "Save as" to "Save Scenario XML",
and rename "XML Name" to "Scenario XML Name";
7. For UI launch selection, rename "Load Launch setting" to
"Load Default Launch Settings", change title "Save as" to "Save Launch XML",
change "XML Name" to "Launch XML Name" and Change "Source Path" to "Launch XML Path".
Tracked-On: #6417
Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
The pattern matching logic (used by 'tr') is erroneous in the launch
script generation logic. While its purpose is to return the CPU number
from the 'cpuX' string (where 'X' is the CPU number),
it does it incorrectly for any multiple of 10. Examples:
- Processing 'cpu10' returns 1 (instead of 10)
- Processing 'cpu20' returns 2 (instead of 20)
This patch changes the [1-99] pattern matching to [0-9] which fixes it.
This error led to the incorrect CPU cores being used (and offlined)
for some VMs which could lead to confusing problems especially when
an exclusive use of that CPU core was assumed and expected (e.g. RTVM).
when CONFIG_BOOTPARAM_HOTPLUG_CPU0 is turned on in the kernel,
there is a risk that we try to offline cpu0. So we also add extra check
for cpu0 to aviod the risk.
Tracked-On: #6482
Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
The whitespaces between delimiter saperated elemnts of a list causes
acrn:get-common-clos-max and acrn:find-list-min returns unexpected
numbers.
Translate the whitespaces to nothing and rewrite acrn:find-list-min and
acrn:get-common-clos-max.
Tracked-On: #6515
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
rename the industry folder to shared folder ,and also rename the
logical_partition folder to partitioned under the generic_code directory.
Tracked-On: #6315
Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
1. Rename industry.xml to shared.xml
2. Rename logical_partition.xml to partitioned.xml.
3. Update the name in view.py correspondingly.
Tracked-On: #6315
Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
for ehl-crb-b platform, update sos rootfs from "dev/sda3"
to "/dev/nvme0n1p3" in hybrid.xml file.
Tracked-On: #6530
Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
For SMBIOS and TPM, enable SECURITY_VM_FIXUP and add GUEST_FLAG_SECURITY_VM
flag in TGL hybrid_rt.xml. Then disable SECURITY_VM_FIXUP in TGL hybrid.xml
because it’s previously enabled in hybrid.xml instead of hybrid_rt.xml by
mistake.
Tracked-On: #6320
Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
The bdf of gpu is not 00:02.0 for the new platform icx-rvp,
it is 05:00.0 now, so we remove the hardcode 00:02.0;
And change to get the gpu bdf from board.xml.
Tracked-On: #6357
Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
This patch renames the GUEST_FLAG_TPM2_FIXUP to
GUEST_FLAG_SECURITY_VM.
v2 -> v3:
The "FIXUP" suffix is removed.
Tracked-On: #6320
Signed-off-by: Yifan Liu <yifan1.liu@intel.com>
1. set the content of the bootargs tag to empty for KERNEL_ELF type
in hybrid xml files.
2. update generic_board.xml with the latest nuc11tnbi5.xml to fix
compile fail issue.
Tracked-On: #6461
Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
remove the log "<board>.xml has been generated successfully!" in
board_parser.py, because it only mean that the board xml file have
been created sucessfully here, not the all data have been appended
successfully and pretty formatted.
Tracked-On: #6315
Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
1. as a workaround, comment the code to check MBA_DELAY tag when
creating a new scenario xml setting because of this tag are retrived
from scenario xml files in generic_board folder where it is removed
now.
2. update the template launch xml file names according the recent
update for launch xml files in generic folder.
Tracked-On: #6315
Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
MAXIMUM_PA_WIDTH will be calculated from board information.
Tracked-On: #6357
Signed-off-by: Liang Yi <yi.liang@intel.com>
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
It is used to specify the maximum number of EFI memmap entries.
On some platforms, like Tiger Lake, the number of EFI memmap entries
becomes 268 when the BIOS settings are changed.
The current value of MAX_EFI_MMAP_ENTRIES (256) defined in hypervisor
is not big enough to cover such cases.
As the number of EFI memmap entries depends on the platforms and the
BIOS settings, this patch introduces a new entry MAX_EFI_MMAP_ENTRIES
in configurations so that it can be adjusted for different cases.
Tracked-On: #6442
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Update lpc slot to origin value 1 from 31 in the script too,
because GOP driver has assumption to config space layout of
the device on 00:1f.0.
Tracked-On: #6340
Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
1. rename “cli.py” to “board_inspector.py”,
and update the script name in README file.
2. rename “app.py” to “acrn_configurator.py”.
Tracked-On: #6417
Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
In the default config file for hybrid scenario, zephyr image was
configured as KERNEL_RAWIMAGE. Now we change them to KERNEL_ELF
for all the platforms. And also kernel mods are changed from
Zephyr_RawImage to Zephyr_ElfImage
Tracked-On: #6323
Signed-off-by: Zhou, Wu <wu.zhou@intel.com>
Reviewed-by: Victor Sun <victor.sun@intel.com>
Rename KERNEL_ZEPHYR to KERNEL_RAWIMAGE. Added new type "KERNEL_ELF".
Add CONFIG_GUEST_KERNEL_RAWIMAGE, CONFIG_GUEST_KERNEL_ELF and/or
CONFIG_GUEST_KERNEL_BZIMAGE to config.h if it's configured.
Tracked-On: #6323
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
Reviewed-by: Victor Sun <victor.sun@intel.com>
remove some tags check for scenario xml files in generic_board folder when
importing a new type of board in UI, and minor fix for the warning of config
editor.
Tracked-On: #6315
Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
The term PSRAM is now obsoleted and should be replaced with SSRAM, as has been
done by commit 9facbb43b3 ("config-tool: rename PSRAM to SSRAM"). However,
there are two places in the configuration toolset that still uses PSRAM. This
patch updates these missed occurrences accordingly.
Tracked-On: #6012
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
On some boards it is seen that the log area of the physical TPM2 is
programmed to be 0. If TPM2 is passed through to a pre-launched VM in such
cases, a piece of memory starting from GPA 0 will be unmapped from the
Service VM, leading to Service VM crash due to early BIOS corruption
checks.
This patch temporarily disables TPM2 passthrough on such platforms. A
thorough fix should be proposed later to gracefully handle such cases.
Tracked-On: #6288
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Using xml.etree.ElementTree to parse the untrusted data is known to
raise security issue. Replaced it using defusedxml.
Tracked-On: #6342
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
The subprocess module is needed for calling package from python script.
Add #nosec for subprocess module importing.
Tracked-On: #6342
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
update the board xml and related scenario xml files because the
PR 6352 update the board inspector code to get more board info.
Tracked-On: #6298
Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
Extract the log area address from TPM2 acpi table and add node
log_area_start_address to board.xml. This emelment is used by host_pa of
mmiodevs.
Tracked-On: #6320
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
There could be multiple ways in the scenario configuration to specify that
no INTx allocation is explicitly allocation to a prelaunched VM:
* Do not have a `pt_intx` node at all.
* Have a `pt_intx` node with no text.
* Have a `pt_intx` node with a text that has nothing but whitespaces,
tabs and newlines.
The current implementation only supports the first way, and will cause
build-time failures when a scenario configuration uses the latter two. The
following changes are introduced by this patch to fix such errors.
* The INTx static allocator queries the text() of `pt_intx` nodes
directly to gracefully handle `pt_intx` nodes with no text.
* The XSLT of pt_intx.c clears all kinds of white spaces from the text of
`pt_intx` nodes before calculating the set of allocated INTx mappings.
Tracked-On: #6287
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
This patch refines the configuration data description so that it is
consistent with the current implementation of the configuration tools.
Tracked-On: #6377
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Add SECURITY_VM_FIXUP config for Security VM whether it needs to do fixup
for TPM2 and SMBIOS
Tracked-On: #6320
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Signed-off-by: Fei Li <fei1.li@intel.com>
Create virtual acpi table of tpm2 based on the raw data if the TPM2
device is presented and the passthrough tpm2 is enabled.
Refine the arguments of bin_gen.py. The --board and --scenario take the
path to the XMLs as the argument. The allocation.xml is needed for
bin_gen.py to generate tpm2 acpi table.
Refine the condition of tpm2_acpi_gen. The tpm2 device "MSFT0101" can be
present in device id or compatible_id(CID). Check both attributes and
child node of tpm2 device.
Tracked-On: #6320
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
If passthrough TPM2 is enabled and the log area is present, allocates
the log_area_start_address with the size log_area_minimum_length(256K).
Tracked-On: #6320
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
Create python script tpm2 which parse the tpm2 acpi table datas. Add
this parsed data to the <device id="MSFT0101" description="TPM 2.0 Device"> of board.xml.
Tracked-On: #6320
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
Relocate ACPI address to 0x7fe00000 and ACPI NVS to 0x7ff00000 correspondingly.
In this case, we could include TPM event log region [0x7ffb0000, 0x80000000)
into ACPI NVS.
Tracked-On: #6320
Signed-off-by: Fei Li <fei1.li@intel.com>
ACRN used to prepare the vTPM2 ACPI Table for pre-launched VM at the build stage
using config tools. This is OK if the TPM2 ACPI Table never changes. However,
TPM2 ACPI Table may be changed in some conditions: change BIOS configuration or
update BIOS.
This patch do TPM2 fixup to update the vTPM2 ACPI Table and TPM2 MMIO resource
configuration according to the physical TPM2 ACPI Table.
Tracked-On: #6366
Signed-off-by: Tao Yuhong <yuhong.tao@intel.com>
Signed-off-by: Fei Li <fei1.li@intel.com>
1. add a name field to indicate what the MMIO Device is.
2. add two more MMIO resource to the acrn_mmiodev data structure.
Tracked-On: #6366
Signed-off-by: Tao Yuhong <yuhong.tao@intel.com>
Signed-off-by: Fei Li <fei1.li@intel.com>
Update launch xml to use image to launch hard rt vm since
we changed the platforms from two disk to only one NVME disk.
Tracked-On: #6315
Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
Update lpc slot to origin value 1 from 31 because GOP driver has assumption
to config space layout of the device on 00:1f.0.
Tracked-On: #6340
Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
If the MAX_MSIX_TABLE_NUM is specified in scenario.xml. Return the
largest number from count of MSI, table_size of MSIX or
MAX_MSIX_TABLE_NUM of scenario.xml.
Tracked-On: #6235
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
The ACPI specification allows both assigning to buffers and indexing to a
certain byte of a buffer using the Index operator. This patch adds the
implementation of these two operations in the interpreter.
Tracked-On: #6287
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
The PackageElementList builder takes variadic arguments, each of which is
an element of the package to be created, not a single argument being the
list of the elements. This patch fix the call to PackageElementList in
build_value() where the wrong type of argument was passed.
Tracked-On: #6287
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
It is typical in AML resource descriptors to have 0-length region
descriptors which are typically templates of resources that are not
assigned on the current platform. For such regions, the `base + length - 1`
formula does not calculate the max of the region properly.
This patch updates the resource descriptor parsers to use max = min when
the length of the region is 0.
Tracked-On: #6287
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
When parsing an AML object representing a host bridge, the current board
inspector may encounter the following issues:
1. The host DSDT may contain multiple host bridge instances, with some of
them not being present. In this case the _BBN of these instances may
evaluate to the same value that coincide with the bus assigned to an
existing host bridge, leading to multiple PCI bus nodes with the same
bus number and thus confusion in later information extraction phases.
2. Methods of a host bridge may refer to the PCI configuration space of
itself (which is typically Device 0, Function 0 under that
bus). However, such objects may not have an _ADR object as the bus
number is encoded by the _BBN object instead.
This patch fixes the issues above.
Tracked-On: #6287
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
This patch enables the interpretation of the following AML objects.
* OnesOp. A OnesOp object always evaluates to a 64-bit integer with all bits
set to 1. It is assumed that the host DSDT is always revision 2 or above,
which is typically the case on modern platforms.
* DefMatch. A DefMatch object evaluates to the index of the first
element (starting from a given index) in a package that matches the given
two predicates. If a match is not found, the constant Ones is returned.
* DefSizeOf. A DefSizeOf object evaluates to the byte length of a buffer, the
length of a string (without the terminating NUL character) or the number of
elements in a package.
Tracked-On: #6287
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
In commit e5ba06cbe8 ("board_inspector: a workaround to an incorrect
interpretation") a workaround is introduced to check the data type of
predicate operands. That commit assumes that both operands must be exactly
integers, which is not usually the case as operation fields or strings can
also be used in predicates.
This patch applies the following conversions on both operands when
evaluating a predicate:
1. Try converting both operands to integers
2. If either conversion in step 1 fails, try regarding both operands as
strings.
3. If either operand is not a string, return the default
result (i.e. False).
Fixes: e5ba06cbe8 ("board_inspector: a workaround to an incorrect interpretation")
Tracked-On: #6287
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
The method `enter_scope` of class `Context` is a reduced implementation of
`change_scope` which assumes that the given name is simply a NameSeg. This
method is currently only used when a new named scope is opened by a
DefDevice object for historical reasons.
As the other named-scope-opening objects all use `change_scope` which can
handle arbitrary NameString, this patch unifies the code by removing
`enter_scope` and replacing the only occurrence with `change_scope`. This
also resolves the parsing of AML templates in board XMLs where device names
can be more than a simple NameSeg.
Tracked-On: #6287
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
According to the specification, the _MAX of memory address space resource
descriptors may not necessarily be _MIN + _LEN - 1. Typically the resource
locates at the low end of the region specified by _MIN and _MAX. This patch
makes the ACPI extractor always calculating the end of a memory region
using _MIN and _LEN instead.
Tracked-On: #6287
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
The current design of AML parsing, objects are first defined in the
namespace and later dropped if they are in a False branch. This leads to
incorrect interpretation of the AML code where:
1. A name T is defined in the root scope as an integer.
2. A method M in an inner scope S references T.
3. The name T is defined as a device, power resource or other named
objects in scope S under conditions where M will not be called.
As a workaround, check if both the left and right hand sides are integers
first. If either is not the case,
Tracked-On: #6287
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
The current vACPI image layout reserves 512 bytes for vDSDT. Given the fact
that the size of vDSDT of a pre-launched VM grows when more devices are
assigned to the VM, this size limit can be easily exceeded. As an example,
a single pass-through TSN NIC requires 291 bytes in vDSDT to define device
objects representing its PCS (Physical Coding Sublayer), which means the
current reserved space for vDSDT does not allow two TSN NICs to be assigned
to the same VM.
This patch enlarges the reserved space for vDSDT to 2432 bytes by moving
the MCFG and MADT spaces. 768 bytes are still reserved for MADT which
is sufficient to encode the LAPIC information for more than 64 vCPUs.
This patch is added in v2 of the series.
Tracked-On: #6287
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
This patch generates vDSDT for pre-launched VMs based on the scenario
configuration and static allocation results. The vDSDT contains the
following objects.
* A device object representing the root PCI bus which has the same
location and name as the object in physical DSDT. This object contains
device identification objects such as _HID, _CID, _BBN and _UID, the
_CRS object encoding the bus numbers and PCI hole regions, and the _PRT
object encoding the routing from vPCI device pins to virtual interrupt
lines.
* For each pass-through device assigned to the VM, a device object is
created based on the AML template of that device in board XML (if
exists). The _ADR object is rewritten with the vBDF..
v1 -> v2:
* In order to replace the current static vDSDT, the AML templates in
board XMLs now include objects that are referenced by other devices as
well.
* When TPM is assigned, the corresponding device object in DSDT (if
exists) will be copied.
* Add the _S5 control method to vDSDT, as is done in the static DSDT
sources.
* The old vDSDT generation routine and the static DSDT sources it uses
are removed.
v2 -> v3:
* Only follow 'uses', 'is used by' or 'consumes resources by'
dependencies.
* Organize the device objects in vDSDT according to the scopes they are
in.
Tracked-On: #6287
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
This patch allocates interrupt lines among VMs according to the PCI devices
assigned to them.
v1 -> v2:
* Remove the usage of VMx_PT_INTX_NUM macro in vm_configuration.c; use the
concrete numbers directly.
* The static allocator will also complain if any interrupt line is allocated to
a VM with LAPIC_PASSTHROUGH.
v2 -> v3:
* Fix a minor coding style issue.
Tracked-On: #6287
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
It is a common practice to parse PCI BDF in the static allocators. This
patch moves the BusDevFunc class (which is a named tuple encoding a BDF) to
lib.py and uses it for BDF parsing throughout the static allocators.
Tracked-On: #6287
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Customized environment variables are not inherited to child processes
created by the subprocess module. As a result the legacy board parser may
not be able to locate the prerequisite utilities if they can be found only
with the customized PATH.
This patch passes the PATH of cli.py to the legacy parser so that both
scripts use the same PATH to search for utilities.
This patch is added in v2 of the series.
Tracked-On: #6287
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
With a growing demand on host ACPI namespace for devices pass-through, it
is now important to parse the ACPI namespace when generating board
XMLs. This patch makes ACPI namespace parsing enabled by default by
replacing the `--advanced` option, which is designed to enable the parsing,
to `--basic` which disables it.
The option provides a reliable way to disable ACPI namespace parsing
completely in case the parsing blocks the generation of board XMLs, while
the ACPI namespace parser will gracefully stop without polluting the board
XML when it fails.
This patch is added in v2 of the patch series.
Tracked-On: #6287
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
This patch updates the board inspector to collect the bits of physical and
linear addresses of the processors and generate this information to the
board XML for further uses at configuration phase.
Tracked-On: #6292
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
It is witnessed on some boards that the device status (as is reported by
the _STA object) returns 0 while the device object is still useful for
pass-through devices. The original implementation, however, assumes that
only a device is a non-zero status is useful as long as the _STA object
exists.
This patch makes this filtering disabled by default and adds a command-line
argument `--check-device-status` to enable this filtering. As disabled or
non-present devices can have empty resources, the sorting algorithm is
updated accordingly to gracefully handle such descriptors.
This patch is added in v3 of the series.
Tracked-On: #6287
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Occasionally buffer fields (which are typically integers) are converted to
hexadecimal strings for debugging purposes. This patch adds the conversion
to suppress interpretation errors of these debugging calls.
This patch is added in v3 of the series.
Tracked-On: #6287
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Servers typically have multiple peer host bridges that need to be scanned
separately. This patch extends the PCI information extractor to visit all
PCI host bridges by enumerating /sys/devices/pci* directories.
Tracked-On: #6292
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
While not allowed by ACPI specification, using a ConstObj (e.g. OneOp) as a
term in a TermList IS witnessed in the DSDT of some BIOS. This patch allows
ConstObj to act as a TermObj so that a TermList can contain a ConstObj as a
statement (which is essentially no-op).
This patch is added in v2 of the series.
Tracked-On: #6287
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
It is seen that the BAR in the PCI configuration space of a device can be
cleared when the device is put to D3. This patch resumes a device not in D0
before parsing its configuration space in order to collect accurate
information.
This patch is added in v2 of the series.
Tracked-On: #6287
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
AML allows devices defined in an ACPI namespace to have inter-dependency,
i.e. a method defined in one device can refer to objects in other
devices. While such inter-dependency is common in device manipulation
methods, device identification and configuration methods, such as _CRS, may
depend on other devices as well.
An example we have already met is a PCS (Physical Coding Sublayer) which
calculates resource descriptors by accessing the PCI configuration space of
the accompanying Ethernet controller. Without the ACPI object describing
the PCS, a driver of the Ethernet controller may refuse to initialize.
This patch adds a preliminary dependency analyzer to detect such
inter-device dependency. The analyzer walks through the reference chains of
an object, identifying whether the referenced objects are operation fields
of a device. Depending on the result of this analysis, the board XML is
refined as follows.
* When an object (probably a method) references such fields, the original
object definition in host DSDT/SSDTs will be copied in the AML template
so that they still work in VMs where the operation fields may be
virtualized. Such objects will be referred to as "copied objects"
hereinafter.
* The objects that are **directly** referenced by a copied object is
added in the AML template as well. Such objects still belong to devices
where they are originally defined in the host ACPI namespace. Their
definition, however, may be copied or replaced with constant values,
depending on the dependency analysis on these objects.
* Nodes with the "dependency" tag are added under "device" nodes in the
board XML, allowing the configuration tools to follow the device
dependency chain when generating vACPI tables. These nodes only
represent direct dependencies; indirect dependencies can be inferred by
following those direct ones.
The current implementation does not allow objects being added to AML
templates if they refer to any of the following.
* Global objects, i.e. objects not belonging to any device. Such objects
tend to encode system-wide information, such as the ACPI
NVS (Non-Volatile Storage) or its fields.
* Methods with parameters.
Objects with such references are thus being hidden from guest software,
just like how they are invisible in the current implementation.
This patch is added in v2 of the series.
v2 -> v3:
* Also collect dependencies due to providing or consuming resources.
* Refactor the dependency detection logic for clarity.
Tracked-On: #6287
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
GPIO and generic serial connection resources in ACPI resource descriptors
usually encode resource sources which are important in detecting
cross-device dependencies. This patch adds parsers for GPIO and generic
serial connection descriptors.
Tracked-On: #6287
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
This patch adds AML template (in XML hexBinary format) for each device to
board XMLs. For now these templates contain the following objects if they
exists in the physical DSDT:
- Device identification objects: _ADR, _HID, _UID and _STR
- _CRS which encodes the current resources consumed by the device
- _STA which encodes the status of the device
An AML template is always a DefScope with a single DefDevice so that they
can be appended anywhere in the vDSDT.
v1 -> v2:
* Remove the temporary visitor that collects cross-device dependencies. Such
check will be replaced with another visitor introduced in the next patch.
v2 -> v3:
* The AML templates are now DefDevice objects with their names being the
full namepath. The vDSDT generator will take care of this and organize
the objects properly.
Tracked-On: #6287
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Object type codes are used to identify, as the name suggests, type of
objects. Typical object types in AML include integers, strings, methods,
devices, buffers, packages and operation regions. In DefExternal terms the
object type codes help specify the type of the external objects so that an
AML parser can parse the code without knowing the concrete definition of
these objects.
The per-device AML templates in board XMLs need DefExternal terms to
declare the objects in other devices, as these templates are meant to be
parsed and integrated separately. This patch adds a static method to object
declaration classes to make it easier to generate such DefExternal terms
for a given declaration.
A complete definition of object type codes can be found in section 19.6.96
of ACPI specification 6.4.
v1 -> v2:
* Remove the object_type of FieldDecl and OperationFieldDecl as 0x5 is
not a proper object type for buffer fields.
Tracked-On: #6287
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
The current implementation of the ConditionallyUnregisterSymbolVisitor
exits upon visiting a DefMethod node without unregistering that method. As
a result, methods in False branches in DSDT/SSDTs are not removed from the
parsed namespace, which can lead to further confusions when these methods
are referenced (e.g. a _CRS method visited by the board inspector).
This patch fixes this by always visiting a DefMethod node but stops
traversing its children.
Tracked-On: #6287
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
/usr/share/pci.ids.gz is another typical path to the pci.ids file of the
lspci tool which is used in Yocto-based systems. This patch adds this path
as another candidate when searching for pci.ids. The builtin gzip module is
used to open this file.
Tracked-On: #6287
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Address space resource descriptors have an optional field to encode the
resource source, which is not commonly used when creating new resource
descriptors.
For modules which want to create a class to parse address space resource
descriptors without resource source, this patch sets the length of such
descriptors as the default value of the `_len` factory parameter so that
callers do not need to care about these lengths.
Tracked-On: #6287
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
With AML templates for devices in the board XML, the parser now needs to be able
to parse a stream as an arbitrary object. This patch adds the `parse_tree`
method to the acpiparser.aml.parser module for this purpose.
Tracked-On: #6287
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
In addition to the mandatory _HID (Hardware ID), the ACPI spec also defines
an optional _CID (Compatible ID) object for device identification.
This patch enhances the ACPI extractor by parsing the _CID objects of devices as
well.
Tracked-On: #6320
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
It is quite common to meet permissions errors when opening a specific
region of /dev/mem due to kernel configurations. This patch adds a bit more
logs on this for eaiser debugging.
Tracked-On: #6287
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
This patch adds interrupt pin related information into the board XML,
including:
* The PCI routing table in ACPI DSDT/SSDT are parsed and generated into
the board XML as "interrupt_pin_routing" nodes.
* IRQs encoded in _CRS directly are represented as resources of type
"irq".
* Interrupt lines (i.e. INTx#) of PCI devices are represented as
resources of type "interrupt_pin". When the PCI routing table is
available, the corresponding interrupt line is identified and
represented as the "source" attribute of the resource node.
Due to the existence of vIOAPIC in ACRN VMs, the board inspector interprets
the \_PIC method with parameter 1 to inform the ACPI namespace that the
interrupt model should be in APIC mode.
v1 -> v2:
* Remove the msi_enable variable which is defined but never used.
Tracked-On: #6287
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
This patch adds the acpiparser.aml.builder module which provides methods to
construct AML trees from scratch in Python. Similar to how parsers and
binary generators are implemented, this module constructs most builder
methods from the AML grammar defined in the acpiparser.aml.grammar
module. AML objects whose grammar are not present in the grammar module
require special treatment and their builders are implemented
explicitly. The methods have the same name as the AML tree labels defined
in the grammar.
In addition, this module also provides the method `build_value` which
converts plain integers, strings or interpreter values (which are defined
in the datatypes module) to AML trees.
With the builders, the `interpret_method_call` method in the
ConcreteInterpreter is refined to build the (fake) MethodInvocation node
using the builders and handle the actual parameters as well.
Tracked-On: #6287
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Tree visitors usually have a fixed direction (either top-down or bottom-up)
and invoking a visitor with a wrong direction typically leads to unintended
behavior. However, the current implementation exposes both `visit_topdown`
and `visit_bottomup` methods to users, allowing callers to invoke the
visitors in an undesigned way. The same issue exists in the implementation
of transformers.
This patch refactors the base classes of visitors and transformers so that
they require an explicit direction from their sub-classes to
initialize. Callers of the visitors and transformers are now expected to
invoke the `visit` or `transform` methods without assuming the correct
direction of the visitor or transformer. The original `visit_topdown` or
`visit_bottomup` methods (or their transformer counterparts) are now
used to initialize the `visit` method and can be used by the subclasses in
case those subclasses visits the tree in a customized manner.
Tracked-On: #6287
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
This patch introduces a visitor that converts an arbitrary AML tree to an
AML binary. Most nodes can be converted in a straightforward way by
following the defined grammar, but the following nodes require some
additional effort:
- NameStrings can be formatted as either a NameSeg (i.e. four upper case
characters), a DualNamePath, a MultiNamePath or a NullName.
- PkgLengths are recalculated according to the actual length of the
following object (in case they are changed dynamically after being
generated by the parser) and generated following the AML encoding of
such lengths.
The visitor works in a bottom-up manner, i.e. the children are visited and
converted to binary before the parent.
The whole trees parsed from DSDT/SSDTs are now also stored in the Context
for further reference.
Tracked-On: #6287
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
_STR is another device identification object defined in ACPI spec that
describes a device. This patch collects this string (when available) into
board XML as well.
Tracked-On: #6287
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
This patch adds the property `irqs` to the class SmallResourceitemIRQ so
that the list of IRQs encoded in this resource item can be retrieved
easily.
Tracked-On: #6287
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
This patch adds a parser to the PCI routing tables returned by _PRT objects
of platform devices. The parsed result is a list of PRTMappingPackage
instances, each of which is a named tuple with the following fields:
* address: a dword with higher 16 bits being the function number and
lower 16 bits all 1's.
* pin: a byte representing the mapped pin.
* source: either a DeviceDecl of the device that allocates the interrupt
line, or the byte 0.
* source_index:
- If `source` is a DeviceDecl, this is the index of the interrupt
source within that device.
- If `source` is 0, this is the interrupt line connected to the pin.
Tracked-On: #6287
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Local variables can be assigned with formal arguments in AML. As a result
when interpreting a DefReturn node, the interpreter shall unwrap multiple
layers of argument/local variable wrappings until a concrete value is
found. This patch implements this logic.
Tracked-On: #6287
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Resource template buffers always end with an end tag. Concatenation of two
resource buffers thus requires that the end tag of the first buffer is
stripped. This patch adds this logic to the interpretation of DefConcatRes
AML nodes.
Tracked-On: #6287
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
The warning, info and debug logging levels are intended to be used in the
following way.
* Warnings are used when users are expected to be aware of a certain
failure.
* Info messages are used to track parsing process and major internal
errors for development.
* Debug messages are used to collect verbose debug logs.
To align the current usage of logs to the above guidelines, this patch
adjusts the logging level of the following messages:
* DSDT/SSDT interpretation failures are now warnings, not information
* Failures of parsing deferred AML blocks are now information, not debug
messages
The default log level when running `cli.py` is adjusted to WARNING as well,
as INFO is primarily used for development. A new command line option
`loglevel` is added to adjust the log level per user needs.
v2 -> v3:
* Make address collisions in ACPI namespace as an info rather than a
warning.
Tracked-On: #6287
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
A DualNamePath clause is a NamePath that only follows rootchar or
prefixpath. Thus, it is never necessary to check if a dot is necessary for
separating segments before a DualNamePath. This patch removes the code that
conduct that check.
Tracked-On: #6287
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
It is seen occasionally that a memory/port BAR of a PCI device is
programmed with the address 0 which is clearly invalid. This patch
gracefully handles this case by printing an error to warn the users that
this device cannot be passed through to any VM.
Tracked-On: #6298
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
According to section 19 of ACPI spec 6.4, the following clauses open name
scopes (in addition to the Scope clauses).
- Function
- Device
- Method
- Power Resource
- Thermal Zone
The current AML parser only opens a scope when parsing DefMethod and
DefDevice, however. This patch fixes the AML parsing by opening a scope on
visiting a DefPowerRes or DefThermalZone clause.
Note: Functions in ASL are equivalent to Methods at AML level.
Tracked-On: #6298
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
The current ConditionallyUnregisterSymbolVisitor has the following two
issues.
1. The visitor will crash when a DefIfElse node is not fully parsed due
to failed deferred expansion.
2. Nested DefIfElse of disabled blocks are still checked and one of its
branch may still take effect.
This patch fixes those issues by checking the predicates of a DefIfElse
block only when conditionally_hidden is False and check existence of
TermList and DefElse clauses.
Tracked-On: #6298
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
When parsing a sequence of clauses, it is not necessary to peek an opcode
from the current stream unless that sequence starts with one. Peeking an
opcode is even an error when the actual clause is empty (e.g. as a
TermList).
This patch makes the SequenceFactory only peeking at the next opcode when
the grammar expects one.
Tracked-On: #6298
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
This patch refines the AML parser to improve its readability and
performance in the following ways.
1. A Tree object now has the parts of the corresponding object being
member fields. As an example, a Tree with label `DefMethod` now has
members `NameString`, `MethodFlags` and `TermList`.
2. It is now possible to assign names each part of an object. The grammar
is updated to assign different names to the parts with the same type
in the same object.
3. Invocation to intermediate factories is now skipped. As an example,
when parsing a ByteConst that acts as a ByteIndex, the original
implementation invokes the following factories in sequence:
ByteIndex -> TermArg -> DataObject -> ComputationalData -> ByteConst
The factories TermArg, DataObject and ComputationalData does nothing
but forward the parsing to the next-level factory according to the
opcode of the next object. With this patch, the invocation sequence
becomes:
ByteIndex -> ByteConst
i.e. ByteIndex directly passes to ByteConst which can parse the next
opcode.
Tracked-On: #6298
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
The current ACPI AML parser can generate incorrect AST if a DSDT/SSDT
satisfies the following:
1. The body of a method invokes a NameString that is defined later.
2. Before that method the same NameString is also defined but in an outer
scope and with a different number of parameter.
Since method bodies hardly define any further symbol that is referenced
outside the method itself, this patch forces the parsing of method bodies
to be deferred to the second pass when all symbols have been declared.
Tracked-On: #6298
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
The current implementation of I/O buffers have the following issues.
1. I/O buffers are filled with values on creation. This may be fine for
memory-mapped I/O regions, but could be a problem to port I/O regions
and indexed I/O regions.
2. While not commonly seen, it IS witnessed that some devices only allow
its MMIO registers to be accessed with certain width. Accessing such
registers with a larger width will not be handled by the device,
causing SW to get all 1's rather than the actual values in these
registers.
This patch resolves the issues above as follows:
1. I/O buffers now do not access any register on creation. Instead, the
register is accessed only upon requests.
2. The access width of these registers are followed to ensure that the
registers are accessed properly.
The classes that represents buffers when interpreting AML is also
refactored to abstract the common code that manages fields within
buffers. The class hierarchy now looks like this:
BufferBase: Implement methods that registers, reads or writes fields
Buffer(BufferBase): Implement memory buffer
StreamIOBuffer(BufferBase): Implement I/Os available via /dev files
IndexedIOBuffer(BufferBase): Implement I/Os via index/data registers
Tracked-On: #6298
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
DefDevide is now enountered when interpreting host DSDT/SSDT. This patch
implements the interpretation of the integer division operation.
Tracked-On: #6298
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
The current implementation of the AML interpreter continues interpreting a
method after meeting a DefReturn object, which is incorrect. This patch
fixes this issue by raising a dedicated exception on return and catching
that exception on the caller side.
Tracked-On: #6298
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Update generic_board/generic_code folder with compile result
on the nuc11tnbi5 platform.
Tracked-On: #6292
Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
config editor creates the default scenario xmls and launch xmls
based on generic configs when users import a new board.
Tracked-On: #6208
Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
add interface to save scenario xmls and launch xmls to user defined
path in config editor; move all config xmls and generated scripts
out of acrn-hypervisor.
Tracked-On: #6208
Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Reviewed-by: Victor Sun <victor.sun@intel.com>
While running in a nested environment, such as qemu, parse the board
information should be allowed even it is not in a native environment.
Replace the error with warning message and does not exit the program.
Tracked-On: #6208
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
Enlarge the max size to store the PTCT/RTCT table to 1k bytes
because the size of RTCT table exceeded the original max size
0x1100 - 0xF00 which makes RTCT table overlap other ACPI tables.
Tracked-On: #6303
Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
1. Update the vaule of the tag CLOS_MASK to 0xfffff according to board.xml
in all scenario xml files.
2. Replace industry_launch_2uos.xml launch file with industry_launch_6uos.xml.
3. Update logical_partition.xml file.
4. Remove hybrid_rt.xml file, then add a second POST_STD_VM in hybrid.xml and
add hybrid_launch_2uos.xml launch file correspondingly.
Tracked-On: #6244
Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
Add the MSI-X capability structure nodes under <capability
id="MSI-X"> in board.xml.
Example:
<capability id="MSI-X">
<table_size>16</table_size>
<table_bir>1</table_bir>
<table_offset>0x1000000</table_offset>
<pba_bir>1</pba_bir>
<pba_offset>0x0</pba_offset>
</capability>
Fix the MSI <count> nodes when there is only one vector.
Tracked-On: #6235
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
The PR 6236 has modified the board.xml format for MAX_MSIX_TABLE_NUM fix.
To compromise this PR, updates all the source file board.xmls.
Tracked-On: #6235
Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
IC_ASSIGN_MMIODEV -> ACRN_IOCTL_ASSIGN_MMIODEV
IC_DEASSIGN_MMIODEV -> ACRN_IOCTL_DEASSIGN_MMIODEV
struct acrn_mmiodev has slight change. Move struct acrn_mmiodev into
acrn_common.h because it is used by both DM and HV.
Tracked-On: #6282
Signed-off-by: Shuo A Liu <shuo.a.liu@intel.com>
In launch script, update cpu offline method to fix the issue
that it isn't offline cpu on ADL-S board.
Tracked-On: #6266
Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
1. Update the necessary libraries to consistent with the "Build ACRN From Source"
document in the "Getting Started Guide" document.
2. Delete the related introduction with acrngt.conf and launch_uos_id1.sh files in
"Getting Started Guide" document.
3. Update WHL-IPC-I7 board's processor in Supported HW document.
4. Add cpu_affinity element's description in ACRN Configuration Data.
5. Update the description for shm_region in Launch XML format.
6. Update configurable/readonly attributes values.
7. Update the description for hv.CAPACITIES.MAX_MSIX_TABLE_NUM in schema/config.xsd.
Tracked-On: #5692
Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
1. Update the value of the tag MAX_MSIX_TABLE_NUM from 64 to empty
for all scenario xml except ehl-crb-b board.
2. Update the value of the tag MAX_MSIX_TABLE_NUM to 96 for the
scenario xml on the ehl-crb-b board.
Tracked-On: #6186
Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
Update the value of the tag MAX_PT_IRQ_ENTRIES from 64 to 128
in TGL-RVP scenario xml.
Tracked-On: #6185
Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
A vmsix supported passthrough device expects the first unused bar region
for vmsix. Pop the first unused_bar_index in gpa.py instead.
Reference code: init_vmsix_on_msi of hypervisor\dm\vpci\vmsix_on_msi.c
Tracked-On: #6192
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
Without this, the GUEST_FLAG_NVMX_ENABLED doesn't show up in the
drop-down list of "guest_flags" in the ACRN config GUI.
Tracked-On: #5923
Signed-off-by: Zide Chen <zide.chen@intel.com>
Update the content about getting board xml from native
enviroment in acrn_configuration_tool.rst and README.
Tracked-On: #6134
Signed-off-by: Kunhui Li <kunhuix.li@intel.com>
Refine get_pt_intx_table. The method parse the <pt_inx> of scenario and
append the pair of phys_gsi and virt_gsi if there is any.
Refine check_pt_intx. Add a condition that the method returns if the
phys_gsi and virt_gsi are empty dictionary.
Tracked-On: #6178
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
Add flag "allow_trigger_s5" to launch script xmls. If this flag sets to
'y' and the poweroff_channel sets to "vuart1(pty)" or "vuart1(tty)", the
"allow_trigger_s5" will appends to the end of "--pm_notify_channel
uart".
Tracked-On: #6138
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
Make up qemu.xml to compromise the static allocators which use the
new xpath based on board inspector.
Tracked-On: #6102
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
For illegal characters, replace original characters with escaped characters in board.xml.
Tracked-On: #6113
Signed-off-by: Kunhui Li <kunhuix.li@intel.com>
Modify the initial value of PT_SLOT variable and
update the get slot logic that all device call the virtual_dev_slot function to get slot number directly.
Copy the launch_uos_id1.sh to launch_win.sh.
Tracked-On: #6072
Signed-off-by: Kunhui Li <kunhuix.li@intel.com>
Update the severity from "warning" to "error" for hybrid cores check.
Tracked-On: #5918
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Signed-off-by: Kunhui Li <kunhuix.li@intel.com>
Retrieve physical APIC IDs from board xml file and use them to fill in the ACPI MADT table
for pre-Launched VMs.
Note that the config-tool will throw an error if the processors/die/core/thread tags are absent.
User needs to run board_inspector.py to regenerate the board xml file when this commit is merged,
if the processors/die/core/thread tags are missing in the board xml file.
Tracked-On: #6020
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
commit 873ed75 ("misc: sanity check VM config for nested virtualization")
requires that the guest_flag tag can't be empty, or it will fail to build.
This patch changes adl instances of "<guest_flag></guest_flag>" to
"<guest_flag>0</guest_flag>".
Tracked-On: #5923
Signed-off-by: Jiang, Yanting <yanting.jiang@intel.com>
Configure PTM in post-launched VM using <PTM> element. If the //vm/PTM
sets to 'y', pci_dev.c.xsl appends the virtual root port to
corresponding struct acrn_vm_pci_dev_config of that VM. Currently it
supports only post-launched VMs.
Configure enable_ptm for dm argument. If a uos/enable_ptm with uos id
= 'vm_id 'sets to 'y' and the vm/PTM with the same vm_id sets to 'y',
append an "enable_ptm" flag to the end of passthrough ethernet devices.
Currently there is only ethernet card can support the "enable_ptm"flag.
For the schema validation, the <PTM> can only be ['y', 'n'].
For the launched script validation, the <enable_ptm> can only be ['y',
'n']. If the <enable_ptm> sets to 'y' but the corresponding <PTM> sets
to 'n', the launch script will fail to generate.
Tracked-On: #6054
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
Add an xslt file "board_info.h.xsl". This file is used to
generate board_info.h which is used by hypervisor.
Tracked-On: #6024
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Add an xslt file "pci_dev.c.xsl". This file is used to
generate pci_dev.c which is used by hypervisor.
Tracked-On: #6024
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
acrn:get-vbdf: get the virtual bdf from allocation.xml based on vmid and device name
acrn:get-pbdf: get physical bdf from <pci_dev>
acrn:ptdev-name-suffix: fix the name to look up allocation.xml
acrn:get-hidden-device-num: get the number of hidden devices based on
board name
acrn:is-vmsix-supported-device: check if a device is a vmsix supported
device based on the vendor and identifier
Tracked-On: #6024
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
Assign bdf to pci emulated and passthrough devices.
For pre-launched VM, assigns unique bdf to passthrough devices, inter-vm
shared memory, pci vuart(console and communication vuarts).
For SOS vm, assigns unique bdf to inter-vm shared memory and pci
vuart(console and communication vuarts).
The bdf follows the rules below:
- the bdf 00:00.0 is reserved for pci hostbridge
- the assigned bdf range: bus is 0x00, dev is in range [0x1, 0x20)
and the fuc is 0x00
- the bdf must be unique, which means any vm's emulated devices cannot
share the same bdf with existing devices
- some devices's bdf is hardcoded, modify its bdf would leads the
device cannot be dicoverd by os. A HARDCODED_BDF_LIST in bdf.py documents
them
- the passthrough devices' bdf can be reused in SOS vm
Tracked-On: #6024
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Add methods allocates the mmio bar base to console vuart,
communication vuarts, inter-vm shared memory and passthrough pci
devices.
For SOS:
- get low mem by parsing board xml.
- get high mem by parsing board xml, if the high mem is not enabled,
the high mem start address would be ~0UL and the end address is 0UL
- get the occupied mmio windows by parsing board.xml
- for each console vuart, communication vuart and inter-vm shared memory
devices, assign unused mmio windows to them
- all the assigned mmio windows must be unique and should not overlay
with any devices' mmio window
- the passthrough devices mmio windows can be reused in SOS vm
- each allocated mmio start address must be 4k alignment if the length
of bar is smaller than 4k
- each allocated mmio start address must be aligned with the bar length
if its length is greater than 4k
- the 32bits bar will fall in low mem range only
- 64bits bar will look for free mmio in low mem rage first, if the high
mem is enabled, the 64bits bar will look for free mmio in high mem
range if there is not enough space in low mem range
- allocator raises an error if there is not enough mmio space
For pre-launched VM:
- the high mem range is [256G, 512G)
- the low mem range is [2G, 3.5G)
- there is no used mmio window initially
- for each console vuart, communication vuart, inter-vm shared memory
devices and passthrough devices, assign unused mmio windows to them
- all the assigned mmio windows must be unique and should not overlay
with any devices' mmio window
- the 32bits bar will fall in low mem range only
- 64bits bar will look for free mmio in low mem rage first and then
look for free mmio in high mem range if there is not enough space in
low mem range
- each allocated mmio start address must be 4k alignment if the length
of bar is smaller than 4k
- each allocated mmio start address must be aligned with the bar length
if its lenght is greater than 4k
- allocator raises an error if there is not enough mmio space
Tracked-On: #6024
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Add a common method "get_shmem_regions":
This method get <IVSHMEM_REGION> and extracts the region size, region
position in xml and and vm ids which share this regions. Returns a
dictionary:
{'vm_id':{'region_name':{'id': region position,'size': region size,}}}
Add vm type checking methods:
is_pre_launched_vm, is_post_launched_vm and is_sos_vm.
Tracked-On: #6024
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
If there is hugepage support from board xml, config tool will
add hugepagesz=1G hugepages=[size] into sos kernel cmdline,
the size is calculated by memory size in G minusing 3.
The reason for reducing 3 is that it is reserved for SOS VM use.
Tracked-On: #5815
Signed-off-by: Kunhui Li <kunhuix.li@intel.com>
Reviewed-By: Junjie Mao <junjie.mao@intel.com>
This patch applies the latest board inspector on ehl-crb-b and tgl-rvp to
generate additional information to the board XMLs.
Tracked-On: #5922
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
This patch adds support to parse RTCT v2 using the refined board XML
schema. The major changes include:
- Add the RTCT v2 parser in the acpiparser module. The version of an RTCT
is detected automatically to choose the right parser.
- Extract software SRAM capabilities of caches into the board XML.
- Move the logic that determines the software SRAM base address for the
pre-launched VM to the static allocator of GPAs.
- Generate software SRAM related macros into misc_cfg.h when necessary.
Tracked-On: #6020
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
commit 873ed752d ("misc: sanity check VM config for nested virtualization")
requires that the guest_flag tag can't be empty, or it will fail to build.
This patch changes all instances of "<guest_flag></guest_flag>"
to "<guest_flag>0</guest_flag>".
Tracked-On: #5923
Signed-off-by: Zide Chen <zide.chen@intel.com>
'psram' and 'PSRAM' are legacy names and replaced
with 'ssram' and 'SSRAM' respectively.
Tracked-On: #6012
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Reviewed-by: Shuang Zheng <shuang.zheng@intel.com>
This patch introduces the XML schema `datachecks.xsd` which is the central
place to specify and check assumptions on board characteristics and
scenario settings. Each assumption is expressed as an XSD assertion with
annotation of error severity (e.g. info, warning or error) and detailed
descriptions.
At compile time, the board and scenario XMLs are combined (by putting the
children of the root node together) can checked against the
schema. Assertion failures are categorized according to the defined
severity. Currently only errors will block compilation by outputing the
descriptions of the violated assertions.
The objective of this patch is the introduce the framework to document,
manage and check assumptions. A better way to present assumption violations
to end users (either on the command line or in the configuration editor) is
out of the scope of this series and will be considered in the future.
Tracked-On: #5922
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
This patch extracts information on devices and put them under the
`/acrn-config/devices` node in the board XML.
The generated XML looks like the following:
<devices>
<bus type="system">
<acpi_object>\_SB_</acpi_object>
<bus id="PNP0A08" type="pci" address="0x0" description="...">
<vendor>0x8086</vendor>
<identifier>0x591f</identifier>
<subsystem_vendor>0x1028</subsystem_vendor>
<subsystem_identifier>0x07a1</subsystem_identifier>
<class>0x060000</class>
<acpi_object>\_SB_.PCI0</acpi_object>
<resource type="bus_number" min="0x0" max="0x3e" len="0x3f"/>
<resource type="io_port" min="0x0" max="0xcf7" len="0xcf8"/>
<resource type="io_port" min="0xcf8" max="0xcf8" len="0x8"/>
<resource type="io_port" min="0xd00" max="0xffff" len="0xf300"/>
<resource type="memory" min="0x10000" max="0x1ffff" len="0x0"/>
<resource type="memory" min="0xa0000" max="0xbffff" len="0x20000"/>
<resource type="memory" min="0xc0000" max="0xc3fff" len="0x4000"/>
<resource type="memory" min="0xc4000" max="0xc7fff" len="0x4000"/>
...
<capability id="vendor_specific"/>
<device address="0x1"> ... </device>
...
<bus>
<bus>
<device> ... <device>
<devices>
The hierarchy of devices are based on the hierarchy of device objects in
the ACPI namespace (which is established by interpreting the ACPI DSDT and
SSDT tables). Typically most device objects are under the predefined
`_SB_` (i.e. System Bus) object under which an object representing the PCI
root complex (`\_SB_.PCI0` in the example above) can be found. The PCI
devices attached to bus 0 are listed as children of the PCI root complex
node.
For each bus or device, the board inspector tries best to parse the
information from both ACPI device objects and PCI configuration space to
extract the following:
- the model (via `_HID` object and PCI vendor ID, device ID and class code),
- assigned resources (via `_CRS` object and PCI BARs),
- capabilities (via the PCI capability list)
v1 -> v2:
- Fix references to undeclared modules or variables.
- Make the ACPI extractor advanced and not enabled by default.
- Extract the secondary I/O and memory-mapped I/O addresses of bridges.
Tracked-On: #5922
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
This patch extracts information on mapping of available RAM and put them
under the `/acrn-config/memory` node in the board XML. Each range of
available RAM is represented by its start (host physical) address, end
address and size (in byte).
The following is an example of the generated XML.
<memory>
<range start="0x0000000000000000" end="0x0000000000057fff" size="360448"/>
<range start="0x0000000000059000" end="0x000000000009dfff" size="282624"/>
<range start="0x0000000000100000" end="0x00000000c9ff9fff"
size="3387924480"/>
<range start="0x00000000c9ffc000" end="0x00000000d984afff"
size="260370432"/>
<range start="0x00000000dbdff000" end="0x00000000dbdfffff" size="4096"/>
<range start="0x0000000100000000" end="0x000000041dffffff"
size="13388218368"/>
</memory>
Tracked-On: #5922
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
This patch extracts information on cache topology and capabilities and put
them under the `/acrn-config/caches` node in the board XML in the following
manner.
<caches>
<cache level="1" id="0x0" type="1">
<cache_size>32768</cache_size>
<line_size>64</line_size>
<ways>8</ways>
<sets>64</sets>
<partitions>1</partitions>
<self_initializing>1</self_initializing>
<fully_associative>0</fully_associative>
<write_back_invalidate>0</write_back_invalidate>
<cache_inclusiveness>0</cache_inclusiveness>
<complex_cache_indexing>0</complex_cache_indexing>
<processors>
<processor>0x0</processor>
<processor>0x1</processor>
</processors>
</cache>
<cache level="1" id="0x0" type="2"> ... </cache>
<cache level="1" id="0x1" type="1"> ... </cache>
<cache level="1" id="0x1" type="2"> ... </cache>
...
<cache level="2" id="0x0" type="3"> ... </cache>
<cache level="2" id="0x1" type="3"> ... </cache>
...
<cache level="3" id="0x0" type="3"> ... </cache>
</caches>
Each cache block is represented by a separate `cache` node identified by
its level, cache ID and type (as reported by CPUID). More information, such
as the size, characteristics and capabilities, are attached as children of
the node.
The current implementation fetches cache information solely from the CPUID
leaf 4H. In the future more cache-related information, such as those in the
ACPI RTCT tables, will be appended here.
Tracked-On: #5922
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
This patch extracts information on CPU topology and capability and put them
under the `/acrn-config/processors` node in the board XML.
The added information can be divided into two categories.
1. The topology of CPUs like the following. Each thread (which is a leaf
node in the topology) contains its addresses (i.e. CPU ID, APIC ID,
x2APIC ID) and model identifiers (i.e. family, model, stepping IDs, core
types and native model ID).
<die id="0">
<core id="0x0">
<thread id="0x0">
<cpu_id>0</cpu_id>
<apic_id>0x0</apic_id>
<x2apic_id>0x0</x2apic_id>
<family_id>0x6</family_id>
<model_id>0x9e</model_id>
<stepping_id>0x9</stepping_id>
<core_type></core_type>
<native_model_id></native_model_id>
</thread>
<thread id="0x1"> ... </thread>
</core>
<core id="0x1">
<thread id="0x2"> ... </thread>
<thread id="0x3"> ... </thread>
</core>
<core id="0x2">
<thread id="0x4"> ... </thread>
<thread id="0x5"> ... </thread>
</core>
<core id="0x3">
<thread id="0x6"> ... </thread>
<thread id="0x7"> ... </thread>
</core>
</die>
2. The CPU models identified by the quadruple (family_id, model_id,
core_type, native_model_id). Each model is described by its brandstring
and capabilities, both of which are fetched from CPUID leaves.
<model description="Intel(R) Core(TM) i7-7700 CPU @ 3.60GHz">
<family_id>0x6</family_id>
<model_id>0x9e</model_id>
<core_type></core_type>
<native_model_id></native_model_id>
<capability id="sse3"/>
<capability id="pclmulqdq"/>
<capability id="dtes64"/>
<capability id="monitor"/>
...
</model>
Tracked-On: #5922
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
This patch makes the `run.py` enumerate and invoke all extractors (whose
name should be `##-<name>.py` where `##` is a decimal number for ordering)
under the extractors/ directory. Only some helper subroutines are added in
this patch; the actual extractors will be added in the subsequent patches
in this series.
v1 -> v2:
- Allow an extractor to be classified as advanced by defining the variable
`advanced` to True. Advanced extractors are not enabled by default and
can be invoked by passing `--advanced` to the board inspector.
Tracked-On: #5922
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
This patch adds a parser of SMBIOS tables. The tables are fetched from
/sys/firmware/dmi/tables on target board. The parser comes from
BITS (https://biosbits.org/) without modifications, except how the raw
SMBIOS tables are read.
Tracked-On: #5922
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
This patch adds a parser of PCI-compatible configuration space read from
sysfs. The headers and capability lists are fully parsed, but only a couple
of capabilities are parsed completely. Parsing of additional capabilities
will be added on an on-demand basis.
v1 -> v2:
- Fix a typo that causes incorrect parsing of BAR types
- Parse capability structures using from_buffer_copy instead of
from_address
Tracked-On: #5922
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
This patch adds a parser and interpreter of ACPI DSDT/SSDT tables in
AML (ACPI Machine Language) in order to understand the complete device
layout and resource allocation.
Kindly note that the interpreter is still experimental and not yet
complete.
Tracked-On: #5922
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
This patch adds a parser of the physical E820 memory maps fetched from
/sys/firmware/memmap.
Tracked-On: #5922
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
This patch adds a parser of CPU identification information reported by the
CPUID instruction.
The framework is based on the CPUID parsing facilities in
BITS (https://biosbits.org/), but with the following changes.
1. The CPUID data is fetched by executing the `cpuid` utility, rather than
executing the `cpuid` instruction. This avoids introducing any
additional library or Python/C extension and gets a CPUID leaf on all
physical cores in one shot.
2. Parsers of CPUID leaves 0x10, 0x1A and 0x1F are added. New fields in
existing leaves are also added.
3. A wrapper function, named `parse_cpuid`, is added as the single API that
allows other modules to get an arbitrary CPUID leaf or subleaf.
Tracked-On: #5922
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Starting from Python 3.0 the following changes to the language are
effective:
1. The integer types `int` and `long` have been unified as `int`. See
`https://www.python.org/dev/peps/pep-0237/` for details.
2. The `.iterkeys` method is removed from the `dict` class. See
`https://www.python.org/dev/peps/pep-3106/` for details.
This patch updates `unpack.py`, originally from BITS, so that it can be
used in Python 3.
Tracked-On: #5922
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
This patch reorganize the files of the board inspector as follows.
1. Rename the directory name from `target` to `board_inspector`, in order to
align with the name used in ACRN documentation.
2. Move the scripts that generate the current board XML into the `legacy`
sub-directory. The legacy nodes will be removed after transitioning to the
new board XML schema completely,
3. Add the main script `cli.py` which is the command line interface of the board
inspector.
v1 -> v2:
- Rename `run.py` to `cli.py`.
Tracked-On: #5922
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
The ivshmem region name format is not ristricted to start with "hv".
Loosen the schema validation so that the region name can start with "hv" or "dm".
Tracked-On: #6009
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
- SOS does not allow LAPIC passthru unless nested virtualization is
enabled on SOS.
- Currently nested virtualization requires LAPIC passthru, so if
GUEST_FLAG_VMX_ENABLED is set, GUEST_FLAG_LAPIC_PASSTHROUGH must be
set in same VM.
- Per VM GUEST_FLAG_VMX_ENABLED can be set only if CONFIG_VMX_ENABLED
is set.
Tracked-On: #5923
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Signed-off-by: Zide Chen <zide.chen@intel.com>
NVMX_ENABLED: ACRN is built to support nested virtualization if set.
GUEST_FLAG_NVMX_ENABLED: indicates that the VMX capability can be present
in this guest to run nested VMs.
Tracked-On: #5923
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
The xml schema validator would fail the build if RDT_ENABLED is set to ‘y’
in scenario file, saying that "'RDT' Unexpected child with tag 'MBA_DELAY'"
Tracked-On: #5917
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
