Make up qemu.xml to compromise the static allocators which use the
new xpath based on board inspector.
Tracked-On: #6102
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
For illegal characters, replace original characters with escaped characters in board.xml.
Tracked-On: #6113
Signed-off-by: Kunhui Li <kunhuix.li@intel.com>
Modify the initial value of PT_SLOT variable and
update the get slot logic that all device call the virtual_dev_slot function to get slot number directly.
Copy the launch_uos_id1.sh to launch_win.sh.
Tracked-On: #6072
Signed-off-by: Kunhui Li <kunhuix.li@intel.com>
Update the severity from "warning" to "error" for hybrid cores check.
Tracked-On: #5918
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Signed-off-by: Kunhui Li <kunhuix.li@intel.com>
Retrieve physical APIC IDs from board xml file and use them to fill in the ACPI MADT table
for pre-Launched VMs.
Note that the config-tool will throw an error if the processors/die/core/thread tags are absent.
User needs to run board_inspector.py to regenerate the board xml file when this commit is merged,
if the processors/die/core/thread tags are missing in the board xml file.
Tracked-On: #6020
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
commit 873ed75 ("misc: sanity check VM config for nested virtualization")
requires that the guest_flag tag can't be empty, or it will fail to build.
This patch changes adl instances of "<guest_flag></guest_flag>" to
"<guest_flag>0</guest_flag>".
Tracked-On: #5923
Signed-off-by: Jiang, Yanting <yanting.jiang@intel.com>
Configure PTM in post-launched VM using <PTM> element. If the //vm/PTM
sets to 'y', pci_dev.c.xsl appends the virtual root port to
corresponding struct acrn_vm_pci_dev_config of that VM. Currently it
supports only post-launched VMs.
Configure enable_ptm for dm argument. If a uos/enable_ptm with uos id
= 'vm_id 'sets to 'y' and the vm/PTM with the same vm_id sets to 'y',
append an "enable_ptm" flag to the end of passthrough ethernet devices.
Currently there is only ethernet card can support the "enable_ptm"flag.
For the schema validation, the <PTM> can only be ['y', 'n'].
For the launched script validation, the <enable_ptm> can only be ['y',
'n']. If the <enable_ptm> sets to 'y' but the corresponding <PTM> sets
to 'n', the launch script will fail to generate.
Tracked-On: #6054
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
Add an xslt file "board_info.h.xsl". This file is used to
generate board_info.h which is used by hypervisor.
Tracked-On: #6024
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Add an xslt file "pci_dev.c.xsl". This file is used to
generate pci_dev.c which is used by hypervisor.
Tracked-On: #6024
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
acrn:get-vbdf: get the virtual bdf from allocation.xml based on vmid and device name
acrn:get-pbdf: get physical bdf from <pci_dev>
acrn:ptdev-name-suffix: fix the name to look up allocation.xml
acrn:get-hidden-device-num: get the number of hidden devices based on
board name
acrn:is-vmsix-supported-device: check if a device is a vmsix supported
device based on the vendor and identifier
Tracked-On: #6024
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
Assign bdf to pci emulated and passthrough devices.
For pre-launched VM, assigns unique bdf to passthrough devices, inter-vm
shared memory, pci vuart(console and communication vuarts).
For SOS vm, assigns unique bdf to inter-vm shared memory and pci
vuart(console and communication vuarts).
The bdf follows the rules below:
- the bdf 00:00.0 is reserved for pci hostbridge
- the assigned bdf range: bus is 0x00, dev is in range [0x1, 0x20)
and the fuc is 0x00
- the bdf must be unique, which means any vm's emulated devices cannot
share the same bdf with existing devices
- some devices's bdf is hardcoded, modify its bdf would leads the
device cannot be dicoverd by os. A HARDCODED_BDF_LIST in bdf.py documents
them
- the passthrough devices' bdf can be reused in SOS vm
Tracked-On: #6024
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Add methods allocates the mmio bar base to console vuart,
communication vuarts, inter-vm shared memory and passthrough pci
devices.
For SOS:
- get low mem by parsing board xml.
- get high mem by parsing board xml, if the high mem is not enabled,
the high mem start address would be ~0UL and the end address is 0UL
- get the occupied mmio windows by parsing board.xml
- for each console vuart, communication vuart and inter-vm shared memory
devices, assign unused mmio windows to them
- all the assigned mmio windows must be unique and should not overlay
with any devices' mmio window
- the passthrough devices mmio windows can be reused in SOS vm
- each allocated mmio start address must be 4k alignment if the length
of bar is smaller than 4k
- each allocated mmio start address must be aligned with the bar length
if its length is greater than 4k
- the 32bits bar will fall in low mem range only
- 64bits bar will look for free mmio in low mem rage first, if the high
mem is enabled, the 64bits bar will look for free mmio in high mem
range if there is not enough space in low mem range
- allocator raises an error if there is not enough mmio space
For pre-launched VM:
- the high mem range is [256G, 512G)
- the low mem range is [2G, 3.5G)
- there is no used mmio window initially
- for each console vuart, communication vuart, inter-vm shared memory
devices and passthrough devices, assign unused mmio windows to them
- all the assigned mmio windows must be unique and should not overlay
with any devices' mmio window
- the 32bits bar will fall in low mem range only
- 64bits bar will look for free mmio in low mem rage first and then
look for free mmio in high mem range if there is not enough space in
low mem range
- each allocated mmio start address must be 4k alignment if the length
of bar is smaller than 4k
- each allocated mmio start address must be aligned with the bar length
if its lenght is greater than 4k
- allocator raises an error if there is not enough mmio space
Tracked-On: #6024
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Add a common method "get_shmem_regions":
This method get <IVSHMEM_REGION> and extracts the region size, region
position in xml and and vm ids which share this regions. Returns a
dictionary:
{'vm_id':{'region_name':{'id': region position,'size': region size,}}}
Add vm type checking methods:
is_pre_launched_vm, is_post_launched_vm and is_sos_vm.
Tracked-On: #6024
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
If there is hugepage support from board xml, config tool will
add hugepagesz=1G hugepages=[size] into sos kernel cmdline,
the size is calculated by memory size in G minusing 3.
The reason for reducing 3 is that it is reserved for SOS VM use.
Tracked-On: #5815
Signed-off-by: Kunhui Li <kunhuix.li@intel.com>
Reviewed-By: Junjie Mao <junjie.mao@intel.com>
* Split linux and windows build of lifemngr to be able to build
them independently.
* Install life_mngr.service
* Avoid the following Makefile error output by explicitly checking
Windows cross compiler availability:
make[4]: x86_64-w64-mingw32-gcc: Command not found
make[4]: [Makefile:47: all-win] Error 127 (ignored)
Tracked-On: #5660
Signed-off-by: Helmut Buchsbaum <helmut.buchsbaum@opensource.tttech-industrial.com>
Use BUILD_VERSION an BUILD_TAG variable also for hypervisor,
acrnprobe and crashlog. This eases build from an archive without
git available.
Tracked-On: #6035
Signed-off-by: Helmut Buchsbaum <helmut.buchsbaum@opensource.tttech-industrial.com>
Make builds reproducible by honoring SOURCE_DATE_EPOCH and USER
environment variables in the respective Makefiles. Just follow the
recommendations at https://reproducible-builds.org/
Build tools (e.g. Debian packaging, Yocto) use this to ensure reproducibility
of packages.
Tracked-On: #6035
Signed-off-by: Helmut Buchsbaum <helmut.buchsbaum@opensource.tttech-industrial.com>
Unify two functions definitions/declarifications:
Update the parameters from char array to char pointer.
to fix the build issue:
probeutils.c:61:29: error: argument 1 of type 'char *' declared
as a pointer [-Werror=array-parameter=]
Initialize local variable "c" to fix build issue:
core/mevent.c:122:21: error: 'c' may be used uninitialized
[-Werror=maybe-uninitialized]
Tracked-On: #5993
Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
This patch applies the latest board inspector on ehl-crb-b and tgl-rvp to
generate additional information to the board XMLs.
Tracked-On: #5922
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
This patch adds support to parse RTCT v2 using the refined board XML
schema. The major changes include:
- Add the RTCT v2 parser in the acpiparser module. The version of an RTCT
is detected automatically to choose the right parser.
- Extract software SRAM capabilities of caches into the board XML.
- Move the logic that determines the software SRAM base address for the
pre-launched VM to the static allocator of GPAs.
- Generate software SRAM related macros into misc_cfg.h when necessary.
Tracked-On: #6020
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
commit 873ed752d ("misc: sanity check VM config for nested virtualization")
requires that the guest_flag tag can't be empty, or it will fail to build.
This patch changes all instances of "<guest_flag></guest_flag>"
to "<guest_flag>0</guest_flag>".
Tracked-On: #5923
Signed-off-by: Zide Chen <zide.chen@intel.com>
'psram' and 'PSRAM' are legacy names and replaced
with 'ssram' and 'SSRAM' respectively.
Tracked-On: #6012
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Reviewed-by: Shuang Zheng <shuang.zheng@intel.com>
This patch introduces the XML schema `datachecks.xsd` which is the central
place to specify and check assumptions on board characteristics and
scenario settings. Each assumption is expressed as an XSD assertion with
annotation of error severity (e.g. info, warning or error) and detailed
descriptions.
At compile time, the board and scenario XMLs are combined (by putting the
children of the root node together) can checked against the
schema. Assertion failures are categorized according to the defined
severity. Currently only errors will block compilation by outputing the
descriptions of the violated assertions.
The objective of this patch is the introduce the framework to document,
manage and check assumptions. A better way to present assumption violations
to end users (either on the command line or in the configuration editor) is
out of the scope of this series and will be considered in the future.
Tracked-On: #5922
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
This patch extracts information on devices and put them under the
`/acrn-config/devices` node in the board XML.
The generated XML looks like the following:
<devices>
<bus type="system">
<acpi_object>\_SB_</acpi_object>
<bus id="PNP0A08" type="pci" address="0x0" description="...">
<vendor>0x8086</vendor>
<identifier>0x591f</identifier>
<subsystem_vendor>0x1028</subsystem_vendor>
<subsystem_identifier>0x07a1</subsystem_identifier>
<class>0x060000</class>
<acpi_object>\_SB_.PCI0</acpi_object>
<resource type="bus_number" min="0x0" max="0x3e" len="0x3f"/>
<resource type="io_port" min="0x0" max="0xcf7" len="0xcf8"/>
<resource type="io_port" min="0xcf8" max="0xcf8" len="0x8"/>
<resource type="io_port" min="0xd00" max="0xffff" len="0xf300"/>
<resource type="memory" min="0x10000" max="0x1ffff" len="0x0"/>
<resource type="memory" min="0xa0000" max="0xbffff" len="0x20000"/>
<resource type="memory" min="0xc0000" max="0xc3fff" len="0x4000"/>
<resource type="memory" min="0xc4000" max="0xc7fff" len="0x4000"/>
...
<capability id="vendor_specific"/>
<device address="0x1"> ... </device>
...
<bus>
<bus>
<device> ... <device>
<devices>
The hierarchy of devices are based on the hierarchy of device objects in
the ACPI namespace (which is established by interpreting the ACPI DSDT and
SSDT tables). Typically most device objects are under the predefined
`_SB_` (i.e. System Bus) object under which an object representing the PCI
root complex (`\_SB_.PCI0` in the example above) can be found. The PCI
devices attached to bus 0 are listed as children of the PCI root complex
node.
For each bus or device, the board inspector tries best to parse the
information from both ACPI device objects and PCI configuration space to
extract the following:
- the model (via `_HID` object and PCI vendor ID, device ID and class code),
- assigned resources (via `_CRS` object and PCI BARs),
- capabilities (via the PCI capability list)
v1 -> v2:
- Fix references to undeclared modules or variables.
- Make the ACPI extractor advanced and not enabled by default.
- Extract the secondary I/O and memory-mapped I/O addresses of bridges.
Tracked-On: #5922
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
This patch extracts information on mapping of available RAM and put them
under the `/acrn-config/memory` node in the board XML. Each range of
available RAM is represented by its start (host physical) address, end
address and size (in byte).
The following is an example of the generated XML.
<memory>
<range start="0x0000000000000000" end="0x0000000000057fff" size="360448"/>
<range start="0x0000000000059000" end="0x000000000009dfff" size="282624"/>
<range start="0x0000000000100000" end="0x00000000c9ff9fff"
size="3387924480"/>
<range start="0x00000000c9ffc000" end="0x00000000d984afff"
size="260370432"/>
<range start="0x00000000dbdff000" end="0x00000000dbdfffff" size="4096"/>
<range start="0x0000000100000000" end="0x000000041dffffff"
size="13388218368"/>
</memory>
Tracked-On: #5922
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
This patch extracts information on cache topology and capabilities and put
them under the `/acrn-config/caches` node in the board XML in the following
manner.
<caches>
<cache level="1" id="0x0" type="1">
<cache_size>32768</cache_size>
<line_size>64</line_size>
<ways>8</ways>
<sets>64</sets>
<partitions>1</partitions>
<self_initializing>1</self_initializing>
<fully_associative>0</fully_associative>
<write_back_invalidate>0</write_back_invalidate>
<cache_inclusiveness>0</cache_inclusiveness>
<complex_cache_indexing>0</complex_cache_indexing>
<processors>
<processor>0x0</processor>
<processor>0x1</processor>
</processors>
</cache>
<cache level="1" id="0x0" type="2"> ... </cache>
<cache level="1" id="0x1" type="1"> ... </cache>
<cache level="1" id="0x1" type="2"> ... </cache>
...
<cache level="2" id="0x0" type="3"> ... </cache>
<cache level="2" id="0x1" type="3"> ... </cache>
...
<cache level="3" id="0x0" type="3"> ... </cache>
</caches>
Each cache block is represented by a separate `cache` node identified by
its level, cache ID and type (as reported by CPUID). More information, such
as the size, characteristics and capabilities, are attached as children of
the node.
The current implementation fetches cache information solely from the CPUID
leaf 4H. In the future more cache-related information, such as those in the
ACPI RTCT tables, will be appended here.
Tracked-On: #5922
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
This patch extracts information on CPU topology and capability and put them
under the `/acrn-config/processors` node in the board XML.
The added information can be divided into two categories.
1. The topology of CPUs like the following. Each thread (which is a leaf
node in the topology) contains its addresses (i.e. CPU ID, APIC ID,
x2APIC ID) and model identifiers (i.e. family, model, stepping IDs, core
types and native model ID).
<die id="0">
<core id="0x0">
<thread id="0x0">
<cpu_id>0</cpu_id>
<apic_id>0x0</apic_id>
<x2apic_id>0x0</x2apic_id>
<family_id>0x6</family_id>
<model_id>0x9e</model_id>
<stepping_id>0x9</stepping_id>
<core_type></core_type>
<native_model_id></native_model_id>
</thread>
<thread id="0x1"> ... </thread>
</core>
<core id="0x1">
<thread id="0x2"> ... </thread>
<thread id="0x3"> ... </thread>
</core>
<core id="0x2">
<thread id="0x4"> ... </thread>
<thread id="0x5"> ... </thread>
</core>
<core id="0x3">
<thread id="0x6"> ... </thread>
<thread id="0x7"> ... </thread>
</core>
</die>
2. The CPU models identified by the quadruple (family_id, model_id,
core_type, native_model_id). Each model is described by its brandstring
and capabilities, both of which are fetched from CPUID leaves.
<model description="Intel(R) Core(TM) i7-7700 CPU @ 3.60GHz">
<family_id>0x6</family_id>
<model_id>0x9e</model_id>
<core_type></core_type>
<native_model_id></native_model_id>
<capability id="sse3"/>
<capability id="pclmulqdq"/>
<capability id="dtes64"/>
<capability id="monitor"/>
...
</model>
Tracked-On: #5922
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
This patch makes the `run.py` enumerate and invoke all extractors (whose
name should be `##-<name>.py` where `##` is a decimal number for ordering)
under the extractors/ directory. Only some helper subroutines are added in
this patch; the actual extractors will be added in the subsequent patches
in this series.
v1 -> v2:
- Allow an extractor to be classified as advanced by defining the variable
`advanced` to True. Advanced extractors are not enabled by default and
can be invoked by passing `--advanced` to the board inspector.
Tracked-On: #5922
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
This patch adds a parser of SMBIOS tables. The tables are fetched from
/sys/firmware/dmi/tables on target board. The parser comes from
BITS (https://biosbits.org/) without modifications, except how the raw
SMBIOS tables are read.
Tracked-On: #5922
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
This patch adds a parser of PCI-compatible configuration space read from
sysfs. The headers and capability lists are fully parsed, but only a couple
of capabilities are parsed completely. Parsing of additional capabilities
will be added on an on-demand basis.
v1 -> v2:
- Fix a typo that causes incorrect parsing of BAR types
- Parse capability structures using from_buffer_copy instead of
from_address
Tracked-On: #5922
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
This patch adds a parser and interpreter of ACPI DSDT/SSDT tables in
AML (ACPI Machine Language) in order to understand the complete device
layout and resource allocation.
Kindly note that the interpreter is still experimental and not yet
complete.
Tracked-On: #5922
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
This patch adds a parser of the physical E820 memory maps fetched from
/sys/firmware/memmap.
Tracked-On: #5922
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
This patch adds a parser of CPU identification information reported by the
CPUID instruction.
The framework is based on the CPUID parsing facilities in
BITS (https://biosbits.org/), but with the following changes.
1. The CPUID data is fetched by executing the `cpuid` utility, rather than
executing the `cpuid` instruction. This avoids introducing any
additional library or Python/C extension and gets a CPUID leaf on all
physical cores in one shot.
2. Parsers of CPUID leaves 0x10, 0x1A and 0x1F are added. New fields in
existing leaves are also added.
3. A wrapper function, named `parse_cpuid`, is added as the single API that
allows other modules to get an arbitrary CPUID leaf or subleaf.
Tracked-On: #5922
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Starting from Python 3.0 the following changes to the language are
effective:
1. The integer types `int` and `long` have been unified as `int`. See
`https://www.python.org/dev/peps/pep-0237/` for details.
2. The `.iterkeys` method is removed from the `dict` class. See
`https://www.python.org/dev/peps/pep-3106/` for details.
This patch updates `unpack.py`, originally from BITS, so that it can be
used in Python 3.
Tracked-On: #5922
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
This patch reorganize the files of the board inspector as follows.
1. Rename the directory name from `target` to `board_inspector`, in order to
align with the name used in ACRN documentation.
2. Move the scripts that generate the current board XML into the `legacy`
sub-directory. The legacy nodes will be removed after transitioning to the
new board XML schema completely,
3. Add the main script `cli.py` which is the command line interface of the board
inspector.
v1 -> v2:
- Rename `run.py` to `cli.py`.
Tracked-On: #5922
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
The ivshmem region name format is not ristricted to start with "hv".
Loosen the schema validation so that the region name can start with "hv" or "dm".
Tracked-On: #6009
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
- SOS does not allow LAPIC passthru unless nested virtualization is
enabled on SOS.
- Currently nested virtualization requires LAPIC passthru, so if
GUEST_FLAG_VMX_ENABLED is set, GUEST_FLAG_LAPIC_PASSTHROUGH must be
set in same VM.
- Per VM GUEST_FLAG_VMX_ENABLED can be set only if CONFIG_VMX_ENABLED
is set.
Tracked-On: #5923
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Signed-off-by: Zide Chen <zide.chen@intel.com>
NVMX_ENABLED: ACRN is built to support nested virtualization if set.
GUEST_FLAG_NVMX_ENABLED: indicates that the VMX capability can be present
in this guest to run nested VMs.
Tracked-On: #5923
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
The xml schema validator would fail the build if RDT_ENABLED is set to ‘y’
in scenario file, saying that "'RDT' Unexpected child with tag 'MBA_DELAY'"
Tracked-On: #5917
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
The macro definition SOS_VM_BOOTARGS in vm_configurations.h calls
macros SOS_ROOTFS, SOS_CONSOLE and SOS_BOOTARGS_DIFF which is defined in
misc_cfg.h and parsed from scenario.xmls.
Add a whitespace in the end of the argument macros to prevent arguments
are concatenated in a single line.
Tracked-On: #5998
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
ehl-crb-b
enable CDP_ENABLED for RT in scenarios, enable ivshmem for industry
scenario, disable vuart0 in launch settings, passthru SATA for RTVM,
set virtio-net and virtio-blk for post-launched WaaG and YaaGs.
Tracked-On: #5955
Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Reviewed-by: Victor Sun <victor.sun@intel.com>
Instead of "#include <x86/foo.h>", use "#include <asm/foo.h>".
In other words, we are adopting the same practice in Linux kernel.
Tracked-On: #5920
Signed-off-by: Liang Yi <yi.liang@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Add comma to the last member of ivshmem pci devices.
If the last element ends without comma, the clang-format would attach
the brackets to the first and last lines.
Tracked-On: #5980
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Add a xslt file "misc_cfg.h.xsl". This file is used to
generate misc_cfg.h which is used by hypervisor.
Tracked-On: #5980
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Add a xslt file "ivshemem_cfg.h.xsl". This file is used to
generate ivshemem_cfg.h which is used by hypervisor.
Tracked-On: #5980
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Add a xslt file "pt_intx.c.xsl". This file is used to
generate pt_intx.c which is used by hypervisor.
Tracked-On: #5980
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Add a xslt file "vm_configurations.h.xsl". This file is used to
generate vm_configurations.h which is used by hypervisor.
Tracked-On: #5980
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Add a xslt file "vm_configurations.c.xsl". This file is used to
generate vm_configurations.c which is used by hypervisor.
Tracked-On: #5980
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
This file allocates the resource of pio base.
The available pio base is in ['0x3F8', '0x2F8', '0x3E8', '0x2E8'] and it
cannot be used by native device.
When any of sos legacy vuarts are enabled, assign a pio base to legancy
vuarts' base.
The allocator follows rules:
1. An SOS legacy vuart only support PIO vuart.
2. To assign a pio base for sos legacy vuart 0:
- If the hv/DEBUG_OPTIONS/SERIAL_CONSOLE is one of
[ttys0, ttys1, ttys2, ttys3] and it's a pio vuart in the native
environment, the pio base of SOS legacy vuart 0 would be the same as
native one.
- If the hv/DEBUG_OPTIONS/SERIAL_CONSOLE is not one of
[ttys0, ttys1, ttys2, ttys3], assigns a pio base to SOS legacy vuart 0
from avilable pio base.
- If the hv/DEBUG_OPTIONS/SERIAL_CONSOLE is not one of
[ttys0, ttys1, ttys2, ttys3] but a pio vuart, will assigns a pio
base to SOS legacy vuart 0 from avilable pio base and raise a
warning to user.
3. To assign a pio base for sos legacy vuart 1:
- Assigns a pio base to SOS legacy vuart 1 from avilable pio base.
- If all the available pio bases list is empty (which means all are
in used by native), it assigns one of the pio base to SOS legacy
vuart 1 anyway, but raise a warning to user.
4. Assigned pio bases must be unique.
Tracked-On: #5980
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Create an intx.py which is a static allocator to allocate the irq
resources. The available irq list is based on the native irqs which
are in range [0, 15] and are not used by native os.
Tracked-On: #5980
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
If a cpu_affinity node of SOS is not present in the scenario.xml,
assign the native cpus which are not assigned to pre-launched vm to
SOS vm.
Tracked-On: #5980
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Refine the "append_node" which can add new node with an attribute and
return the appended node.
The method "get_node" finds the xpath value and return it if there is an
unique node exists, otherwise it returns None.
It is used to get an xpath element node or can determine the xpath existence.
The "get_text" is replaced with "get_node". The only get_text in
hv_ram.py is modified accordingly.
Tracked-On: #5980
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Add lib.xsl under config_tools/xforms.
This lib.xsl contains the variables and customized functions for
xslt transformation.
Tracked-On: #5980
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Create lib.py which contains the common methods that are shared by static
allocators under misc/config_tools/static_allocators.
Tracked-On: #5980
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Create a file which contains user-defined errors for config-tools.
Tracked-On: #5980
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
<guest_flag/> may be treated as either empty string or null in xslt
transformation and xsd schema validation. Replace it with:
<guest_flag></guest_flag>
to avoid the undefined behavior.
The duplicate guest_flag are removed.
Tracked-On: #5980
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
add 2 * max (IVSHMEM_SHM_SIZE, 2M) in HV_RAM_SIZE calculation to
avoid ram overflow caused by additional memory usage for shared
memory alignment.
Tracked-On: #5955
Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Reviewed-by: Victor Sun <victor.sun@intel.com>
fail to create kata vm type in industry scenario due to
the default vm id value is 1. Meanwhile set the max user
vm to 7 in tgl-rvp industry xml.
Tracked-On: #5932
Signed-off-by: lirui34 <ruix.li@intel.com>
There is no audio device in the default ehl-crb-b.xml, so remove
passthru audio devices from launch xmls on ehl-crb-b.
Tracked-On: #5925
Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Reviewed-by: Victor Sun <victor.sun@intel.com>
remove UOS_RAM_SIZE and SOS_RAM_SIZE in scenario config since these
two config elements are useless.
Tracked-On: #5927
Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Reviewed-by: Victor Sun <victor.sun@intel.com>
update HV_RAM_SIZE calculation algorithm to 20MB + VM number*
16MB, which consists of text segment rodata(2MB), bss data(about
1MB), bss.ppt_pages(2.4MB), bss.ctx_tables(6MB), bss.vm_array(
3.2MB), bss.ivshmem_base(2MB+1.8MB for alignment) and
bss.post_uos_sworld_memory(16MB*post-launched VM number).
Tracked-On: #5927
Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Reviewed-by: Victor Sun <victor.sun@intel.com>
Refine the logic of finding unused bdf for SOS ivshmem devices. First,
find the unused bdf based on if the "dev" is unused. Increase the "func"
for the next same type of emulated devices if the last assigned bdf
exists. Otherwise, start over looking for unused bdf based on "dev"
repeatedly.
Tracked-On: #5869
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
Do not build (or install) the ACRN life_mngr by default as this is
a User VM tool, not one to be used and run in the Service VM.
The component can still be built independantly by invoking
'make -C misc life_mngr' (components will be built and placed in
'misc/build/services/' by default).
Tracked-On: #5660
Signed-off-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
A scenario can enable multiple IVSHMEM_REGIONs, loosen the restriction
to extend multiple regions support.
Tracked-On: #5863
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
The creation of the acrn_manager ('acrnctl') configuration folder
is currently done when adding a new VM to the system. This leads to
an error (non-fatal) thrown on the terminal is calling, say 'list'
first without having added a VM yet. This patch moves the creation
of such folder as part of main() thereby ensuring it is created as
soon as the program starts.
Tracked-On: #4898
Signed-off-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
Requires explicit arch path name in the include directive.
The config scripts was also updated to reflect this change.
Tracked-On: #5825
Signed-off-by: Peter Fang <peter.fang@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
"is_tpm_passthru" would always return "False" with the existing logic.
1. Replace "get_leaf_tag_map_bool" with "get_leaf_tag_map". Instead returning a dictrionary with boolean diction values, just get the string value.
2. Return "True" if any vm has enabled the passtrhough tpm with option "y".
Tracked-On: #5710
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
"PTDEV_HI_MMIO_START" is removed by the commit
8d9f12f3b7.
Replace "PTDEV_HI_MMIO_START" with "HI_MMIO_START".
Tracked-On: #5693
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
Enhance the 'misc/Makefile' to improve readability by grouping the
tools based on whether these are `services` or `debug_tools`
(following the folders they're in) and also create separate build
folders instead of putting *both* services and debug_tools in the
build/misc/debug_tools folder (default value).
Tracked-On: #5793
Signed-off-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
Add the capability to disable or enable #AC for Split-locked Access
through <scenario>.xmls. This was implemented through Kconfig. Move this
configuration from Kconfig to xmls.
Tracked-On: #5798
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
add "--psram" in acrn dm arguments in launch scripts
when PSRAM_ENABLED=y and the VM is post-launched RTVM.
Tracked-On: #5649
Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
For clarity, we now prefer y|n over 0|1 as the values of boolean options on
make command lines. This patch applies this preference to the Makefile of
the device model and tools, while RELEASE=0|1 is still supported for
backward compatibility.
Tracked-On: #5772
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Monitor the listening socket in SOS mode and close any additional
connections after a socket connection is established. This ensures no
more than one post-launched VM can establish a pm_vuart channel.
Tracked-On: #5736
Signed-off-by: Peter Fang <peter.fang@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
Remove the the vuart1(tty) and vuart1(pty) poweroff channel from default
non-windows uos launch script xmls.
Tracked-On: #5736
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
Loosen the restriction of IVSHMEM_REGION of xsd validation. An ivshmem
region can be shared by more than two vms.
Tracked-On: #5672
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
Remove obsolete kernel (i915) parameters from the Apollo Lake (APL)
board configurations.
Tracked-On: #5236
Signed-off-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
- Define 'PRE_RTVM_SW_SRAM_ENABLED' only if both
prelaunch RTVM and Software SRAM are configured in
current scenario.
- Define 'PRE_RTVM_SW_SRAM_BASE_GPA' and
'PRE_RTVM_SW_SRAM_END_GPA' only if
'PRE_RTVM_SW_SRAM_ENABLED' is defined.
Tracked-On: #5649
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Some terms in the config option docs (Integer, Boolean) are being
flagged by one of our spell checking tools. Let's make it happy.
Tracked-On: #5692
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
While we hoped to make the headings consistent over time while doing
other edits, we should instead just make the squirrels happy and do them
all at once or they'll likely never be made consistent.
A python script was used to find the headings, and then a call to
https://pypi.org/project/titlecase to transform the title. A visual
inspection was used to tweak a few unexpected resulting titles.
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
app
change generic folder to generic_board folder in config app according
to the reorg data folders and update the method to save xmls.
Tracked-On: #5723
Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
update entry point address for pre-launched zephyr on ehl-crb-b;
update serial console to /dev/ttyS3 on ehl-crb-b.
Tracked-On: #5689
Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
add validate_scenario_schema to validate_scenario_setting and update the
excption handling.
Tracked-On: #5672
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
Start cleaning up formatting and content layout issues in the
xsd-derived configuration option documentation. Includes adding
documentation for unnamed embedded simple types within an element (and
updates to the XSLT transformation to display these), cleanup of element
and type documentation, typos and description clarity.
Improved xsdl translation to automatically include default values and if
an option is optional (instead of manually documenting this in the
description text).
Tracked-On: #5692
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
add SW SRAM config for hybrid_rt and industry scenarios on tgl-rvp
and ehl-crb-b boards.
Tracked-On: #5649
Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
If pre-launched VM co-exist with SOS, it must has higher severity
than SOS.
Tracked-On: #5615
Signed-off-by: Tao Yuhong <yuhong.tao@intel.com>
Reviewed-by: Fei Li <fei1.li@intel.com>
update scenaro xml templates when creating or loading new scenarios
according to config app folder reorg.
set default values for new create VMs from scenario schema when creating
a new scenario setting, adding a new VM, loading new default scenarios
for a new board;
add MBA_DELAY in generic scenario xml.
Tracked-On: #5672
Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Reviewed-by: Mao, Junjie <junjie.mao@intel.com>
Reviewed-by: Victor Sun <victor.sun@intel.com>
Try validate the scenario xml against schema if the config.xsd exsists.
Fix the regular expression pattern of IVSHMEM_REGION string validation.
Tracked-On: #5672
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
Validation of the scenario XML files against the defined schema reveals
three typos. This patch fixes these errors.
Tracked-On: #5644
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
With a schema for scenario XML files, we no longer need to duplicate the
description, configurability and writeablity attributes in each XML
file.
This patch applies the following transformation to all scenario XML files
in order to remove these attributes.
<xsl:stylesheet
version="1.0"
xmlns:xsl="http://www.w3.org/1999/XSL/Transform">
<xsl:template match="@desc" />
<xsl:template match="@configurable | @multiselect | @readonly" />
<!-- The identity template -->
<xsl:template match="@*|node()">
<xsl:copy>
<xsl:apply-templates select="@*|node()"/>
</xsl:copy>
</xsl:template>
</xsl:stylesheet>
Tracked-On: #5644
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
This patch introduces a schema (in XSD 1.1) for the scenario XML of ACRN
hypervisor for validation and documentation.
An XML schema defines the expected layout and value ranges of an XML
document. It allows a concise way to define our expectation on the
information in a scenario XML, including:
* structure of elements
* number of occurrences of elements with the same tags
* element data types and default values
* element descriptions
* any further properties such as readonly and configurable
Multiple XSD-based validators are available in the open source
community. A Python-based apporach will be introduced in a later patch and
integrated into the build system to ensure the integrity of the scenario
XML before we process it further.
A reference of the configuration data will be generated from the
<xs:documentation> blocks. Format for <xs:documentation> blocks will
properly output multiple text lines so features such as lists can be
used. All multi-line content must be left-aligned unless indentation is
specifically required by rst syntax. The trailing </xs:documentation> tag
should be on the same line as the last text line. For example:
<xs:simpleType name="SchedulerType">
<xs:annotation>
<xs:documentation>Three scheduler options are supported:
- ``SCHED_NOOP``: The NOOP (No-Operation) scheduler means there is a
strict 1 to 1 mapping between vCPUs and pCPUs.
- ``SCHED_IORR``: The IORR (IO sensitive Round Robin) scheduler supports
multipule vCPUs running on on one pCPU, scheduled by
a IO sensitive round robin policy.
``SCHED_BVT``: The BVT (Borrowed Virtual time) scheduler is a virtual
time based
scheduling algorithm, it dispatchs the runnable thread with the
earliest effective virtual time. *TODO: BVT scheduler will be built on
top of a prioritized scheduling mechanism, i.e. higher priority threads
get scheduled first, and same priority tasks are scheduled per BVT.*
Read more about the available scheduling options in
:ref:`cpu_sharing`.</xs:documentation>
</xs:annotation>
<xs:restriction base="xs:string">
<xs:enumeration value="SCHED_NOOP" />
<xs:enumeration value="SCHED_IORR" />
<xs:enumeration value="SCHED_BVT" />
</xs:restriction>
</xs:simpleType>
Tracked-On: #5672
Signed-off-by: Yang, Yu-chu <yu-chu.yang@intel.com>
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
add fusa_partition scenario with 1 pre-launched Zephyr and 1 pre-launched
RTVM for ehl-crb-b board.
v2: fix the issue for build failure for partition mode by error check of
bootargs.
Tracked-On: #5665
Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Reviewed-by: Victor Sun <victor.sun@intel.com>
update config folders used in config app based on config tool folders
reorg; remove "Generate configuration files" button from config app
since the function is deprecated.
Tracked-On: #5644
Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Remove the code that deals with the libtelemetry API and infrastructure.
Libtelemetry is used in Clear Linux only and not available (out of the
box) on Ubuntu or Yocto (which we use in our reference stack).
Tracked-On: #5653
Signed-off-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
This patch parsees physical RTCT entries and dump information about pseudo
RAM into the board XML files. A macro named PRE_RTVM_SW_SRAM_BASE_GPA is
added to the generated misc_cfg.h according to recent design changes.
This patch still writes the board XML file manually, following the
convention of the current framework. Using XML-based approach requires a
complete refinement of the current generation process as the root
`acrn-config` node has its own text among adjacent children.
Tracked-On: #5649
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
This patch ports the ACPI parsing module from BITS (BIOS Implementation
Test Suite) in order to ease the access to ACPI tables during board XML
generation. This library allows accessing ACPI table fields as Python class
members, getting rid of hard coding or calculating offsets within tables.
Compared to the original library, this port makes the following changes.
* Extract only the scripts and functions that contribute to ACPI parsing.
* Separate the parser of each ACPI table into different files.
* Read raw ACPI tables from Linux sysfs.
* Adapt to Python 3.
Tracked-On: #5649
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Remove vm_configs folder and move all the XML files and generic code example into config_tools/data
Tracked-On: #5644
Signed-off-by: Xie, nanlin <nanlin.xie@intel.com>
bdf 00:00.0 is reserved for pci hostbridge. Reserve the this bdf
of pre-launced vm even there is neither passtrhough pci devices
nor emulated pci devices.
Refine the logic of get_pt_pci_num. It only counts the passthrough
devices, and does not pre-assume any vhostbridge device exists.
Refine the logic of pci hostbridge device insertion. If any one of
passthrough pci dvices, ivshmem or vuarts of pre-launched vm are
preset, insert the pci hostbridge declaration to pci_dev.c.
Tracked-On: #5609
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
This patch makes the build system of the hypervisor to cache the board and
scenario XML files in the build directory and generate C configuration
files from them at build time. The C configuration files that are cached in
the git repo is no longer used or updated. Paths to these generated files
in the prebuild Makefile is updated accordingly.
The following targets are introduced or modified.
* defconfig: Copy default configuration XMLs to the build directory and
generate C configuration files.
* oldconfig: No action.
* menuconfig: Print a message to redirect users to use the config app
and exit.
* showconfig: Print the BOARD, SCENARIO and RELEASE configured for the
current build.
* update_config: No action.
* (default): Build the hypervisor with defined configurations.
The following variables can be set on the command line to specify the
default configuration to be used.
* BOARD: Either a name of the target board or a path to a customized
board XML. When a board name is specified, the board XML file
is expected to be available under
misc/acrn-config/xmls/board-xmls.
* SCENARIO: Either a name of the scenario of a path to a customized
scenario XML. When a scenario name is specified, the
scenario XML file is expected to be available under
misc/acrn-config/xmls/config-xmls/$(BOARD).
* BOARD_FILE: Path to the board XML file to be used. This is now
obsoleted as BOARD provides the same functionality.
* SCENARIO_FILE: Path to the scenario XML file to be used. This is now
obsoleted as BOARD provides the same functionality.
BOARD/SCENARIO or BOARD_FILE/SCENARIO_FILE shall be used in pair, and
BOARD_FILE/SCENARIO_FILE shall point to valid files when specified. Any
violation to those constraints will stop the build with error
messages. When BOARD/SCENARIO and BOARD_FILE/SCENARIO_FILE are both defined
on the command line, the former takes precedence as the latter are to be
obsoleted.
Additionally, users can define the RELEASE variable to specify a debug or
release build. In case a previous build exists but is configured for a
different build type, the build system will automatically update the
scenario XML and rebuild the sources.
This patch also includes the following tweaks:
1. Do not use `realpath` to process search paths for generated
headers. `realpath` only accepts paths of existing files, while the
directories for generated headers may not be created at the time the
search paths are calculated.
2. Always expect `pci_dev.c` to be in place.
3. HV_CONFIG_* series now encodes absolute paths.
v3:
* Do not validate BOARD_FILE/SCENARIO_FILE if BOARD/SCENARIO are given.
v2:
* `defconfig` now also generates the C configuration files.
* BOARD/SCENARIO now accept either board/scenario names or XML file paths.
* Adapt to the new allocation.xml & unified.xml.
* Cleanup names of internal variables in config.mk for brevity.
Tracked-On: #5644
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
In order to remove Kconfig from the build process, acrn-config shall
transform XML configuration files to config.h and config.mk by itself. This
patch adds XSLT scripts that do the trick.
Unfortunately, the scenario XML file along is not sufficient to generate
config.h and config.mk, though. In addition to resource
allocation (i.e. allocating physical RAM for the hypervisor), the
transformation also need to do the following:
1. Translate UART info in board XML into several configuration entries
depending on the UART selected in the scenario XML.
2. Use the MAX_MSIX_TABLE_NUM value in the board XML if the scenario
XML does not specify it.
In order to use XSLT to transform both XMLs in one shot, a template is
provided to create another XML that includes (using XInclude) both board
and scenario XMLs as sub-nodes. It will be instantiated once the
transformations are integrated in the following patch.
v2:
* Add `allocation.xml` to `unified.xml` to include the results from static
allocation.
* Use HV_RAM_START and HV_RAM_SIZE in allocation results if they are not
explicitly specified in the scenario XML.
Tracked-On: #5644
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
In order to split the allocation logic from tranformation in the
configuration tool, this patch introduces the `static_allocators` directory
under `misc/acrn-config` to host scripts that statically allocate
resources (currently the physical memory) and fill the scenario XML with
the results. The logic is extracted from the existing configuration tool
which allocates resources when transforming XML files, while XPath is used
to read and manipulate the XML when possible.
The aim is to make transformation from XML files to C configuration sources
to be more trivial and easier to express in descriptive languages like
XSLT.
v2:
* Instead of rewriting the scenario XML, the new version generates
allocation results to a new XML named `allocation.xml` so that the form
of the results are not restricted by the XML schema.
Tracked-On: #5644
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
In order for a unified interface for generating configuration sources from
board and scenario XMLs, this patch introduces a script named genconf.sh
which takes XML files as inputs and generate sources under the specified
directory. Once used in Makefiles, this script helps to minimize the
impacts on the Makefiles when we refine the configuration source generation
process in the future.
This patch also adds a non-zero return value to board_cfg_gen.py and
scenario_cfg_gen.py so that we do not need to inspect the logs to determine
if the generation succeeds.
Tracked-On: #5644
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
This patch basically reverts commit 22f24c229b
since virtio polling mode is still not ready in VxWorks official build.
commit 22f24c229b
Author: Kaige Fu <kaige.fu@intel.com>
Date: Thu Jun 13 09:24:07 2019 +0000
DM: Samples: Enable VxWorks as hard-rt VM
This patch adds --lapic_pt option to launch VxWorks as hard-rt VM.
End user could enable VxWorks as hard-rt VM with acrn-config tool, or add
below acrn-dm parameters in launch script:
" --lapic_pt \
--virtio_poll 1000000 \
-U $rtvm_uuid"
Tracked-On: #3069
Signed-off-by: Victor Sun <victor.sun@intel.com>
configure the entry number of vcpu_clos same as the entry number
of pcpu_id to avoid sanity check error.
Tracked-On: #5600
Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
add cfl-k700-i7 into tpm supprted boards to enable tpm
passthru to the pre-launched vm.
Tracked-On: #5614
Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Reviewed-by: Victor Sun <victor.sun@intel.com>
some RT related boot arguments are needed for preempt-rt linux.
add them in configure file built in for EHL board.
for EHL, it is booted with SBL, not like GRUB, extra boot arguments
can be added; so better to be built in.
Tracked-On: #5606
Signed-off-by: Minggui Cao <minggui.cao@intel.com>
The function validate if the legacy vuart1 and its target_vm_id are
paired. However, it dynamically modifies the tracking list. It would try
to access an invalid keys which has been removed.
Refine the logic to add a valid paired legacy vuart1 to new list.
Tracked-On: #5592
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
The function getchildren() is removed from xml.etree.ElementTree.Element
on python3.9, update the function to list() to make config tool
compatible with python3.9.
Tracked-On: #5570
Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
The "virtio-hyper_dmabuf" is no longer needed for PREEMPT-RT LINUX.
Remove it from launch script.
Tracked-On: #5565
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
The latest gcc 10.x changes the default to '-fno-common'. This causes a couple
of build failures in ACRN. This patch changes the default behaviour to
'-fcommon' for the 'acrnprobe' tool and fixes the 'hv_prebuild' codebase.
More details on that change can be found here:
https://gcc.gnu.org/gcc-10/porting_to.html
Tracked-On: #5553
Tracked-On: #5549
Signed-off-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
s5_trigger.sh is part of the system shutdown flow, coordinating with the
lifecycle manager in each VM.
Tracked-On: #5411
Signed-off-by: Peter Fang <peter.fang@intel.com>
After the SOS socket is closed, read() returns instantly with a return
value of 0. This causes life_mngr to flood the log file with the
following messages:
received msg []
received msg []
received msg []
...
Exit the program directly now if this is detected.
Tracked-On: #5429
Signed-off-by: Peter Fang <peter.fang@intel.com>
1. Discard the method to find unused vbar bases from system ram, find
unused mmio windows from 2G to 4G range.
2. Refine the ivshmem devices declaration.
Tracked-On: #5530
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
update all default pci_dev.c under
misc/vm_configs/scenarios/<scenario>/<platform> for non-xml compilation
Tracked-On: #5425
Signed-off-by: Yang Yu-chu <yu-chu.yang@intel.com>
Some document refer Clear Linux as Service VM; update them
to Ubuntu Service VM.
Signed-off-by: fuzhongl <fuzhong.liu@intel.com>
Reviewed-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
Increase CONFIG_MAX_EMULATED_MMIO_REGIONS to 32, for more pci-vuarts.
Each pci-vuart vdev need 2 mmio BARs, if there are 8 pci-vuarts, they
need emulate 16 mmio regions.
But by default CONFIG_MAX_EMULATED_MMIO_REGIONS=16, that is not enough.
Tracked-On: #5491
Signed-off-by: Tao Yuhong <yuhong.tao@intel.com>
Bug fix:
1. The bdf were inserted in decimal. Fix it with hexadecimal
format.
2. The vuart vbdf will only take the dev which no used bdf has
the same dev. For example: If 00:01.1 is in used but not 00:01.0,
vuart vbdf will skip 00:01.0 and look for 00:02.0, 00:03.0 and so on.
Tracked-On: #5482
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
The legacy vuart0 of any VMs inserts its base address declaration
anyway without checking whether it's disabled or enabled, and the
com base is hardcoded no matter what is specified in xmls.
Pull the legacy vuart enablement status based on scenario xml.
This reverts commit a8fe9b906a
Tracked-On: #5470
Signed-off-by: Yang, Yu-chu <yu-chu.yang@intel.com>
Links to files in the GitHub repo's master branch should be to the files
within the branch being generated. For example, in the v2.1
documentation, links should be to the v2.1 branch contents. (Previously
links were being made to the master branch in all our archived content.)
This creates a problem when we want to remove an obsolete file in the
master branch but can't because older documentaiton incorrectly depends
on it.
This new extension defines a :acrn_file: and :acrn_raw: role that will
create links to the given file within the current commit branch.
This PR also replaces docs with hard-coded links to files in the master
branch with uses of these new roles to create links to files.
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
qemu xml has no devices list. Tool will receive the empty devices
list while parsing the "platform" xml. Remove the error of resolved
nested mmio address window that the input couldn't be None. Simply
return an None list.
Tracked-On:#5454
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
remove PSRAM_PASSTHROUGH_PRE_RTVM config which is not used in
PSRAM config and disable psram config.
Tracked-On: #5418
Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Reviewed-by: Victor Sun <victor.sun@intel.com>
Add the 'reboot=acpi' kernel boot argument for pre-launched VMs
Add the code to sanity check if 'reboot=acpi' is specified in the
scenario files
If hardware reduced ACPI is detected, by default, Linux will set the reboot type to
use EFI for rebooting. "reboot=acpi" sets the reboot type to use ACPI for rebooting.
Tracked-On: #5411
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Change ACPI version from V3 to V5 to support hardware-reduced ACPI, which
is a V5 feature
Remove/obsolete the PM1X related stuff as they are not used for hardware-reduced
ACPI
Add the _S5 method in DSDT table
Using hardware-reduced mode allows to use a much simpler form of ACPI that
does not require supporting the legacy of previous versions of the specification
such as SCI IRQ.
Hardware-reduced mode is specified by setting the Hardware Reduced (HW_REDUCED_ACPI)
flag in FADT table.
If the HW_REDUCED_ACPI flag in the FADT table is set, OSPM will ignore fields related
to the ACPI HW register interface such as the PM1x control register. Instead, sleep
control/status registers can be used for system sleep state entry on hardware-reduced
ACPI systems.
Tracked-On: #5411
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
So that guest VM can recognize and use ACPI reset register to reboot
No need to specify "Flags (decoded below)" in FADT template, iasl will
calculate and fill in this flag for us
Tracked-On: #5411
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Improve the legacy vuart code. The legacy vuart insert the declaration
without checking if it's enabled. Refined the logic that if the legacy
is disabled, simply do not declare.
Tracked-On: #5425
Signed-off-by: Yang,Yu-chu <yu-chu,yang>
generic
Add console and communication vuarts to:
misc/vm_configs/xmls/config-xmls/generic/<scenario>.xml
misc/vm_configs/xmls/config-xmls/template/<scenario>.xml
Tracked-On: #5425
Signed-off-by: Yang, Yu-chu <yu-chu.yang@intel.com>
Check if the scenario xmls configure pci vuarts properly
Sanity check of scenario xml:
1. check the format of console and communication vuarts
2. legacy vuart0 and console vuart0 cannot be eabled at the same time
3. legacy vuart1 and communication vuart1 cannot be enabled at the
same time
4. Any vuart should not connect to any type of vuart0
5. Every vuart can only connect to enabled vuart<idx> (idx > 0)
Tracked-On: #5425
Signed-off-by: Yang,Yu-chu <yu-chu,yang>
Add pci vuart to launch script if the pci vuart is enabled.
Add pci vuart sanity check for launch script:
- vuart0 and console vuart cannot be enabled at the same time
- vuart1 cannot be eabled if the legacy vuart 1 is enabled
Tracked-On: #5425
Signed-off-by: Yang, Yu-chu <yu-chu.yang@intel.com>
- Find unused bdf for SOS and pre-launched VM's pci vuart if it's
enabled
- The vuart cannot detect the function difference, find the unused vbdf
based on "dev" increment
Tracked-On: #5425
Signed-off-by: Yang, Yu-chu <yu-chu.yang@intel.com>
Allocate unused vbar for pci based vuarts when the it's enabled for SOS
and/or pre-launched VMs.
- vuart needs 2 bar, both are 4k size
- for SOS, find unused vbar in the range which is assigned to pci host
bridge. The allocated vbar cannot have confilicts with any existing pci devices
- for pre-launched VMs, find unused vbar in the range 0x80000000 to
0xfffffff. The alloacted vbar cannot have confilicts with any
passthrough devices and mmio
Tracked-On: #5425
Signed-off-by: Yang, Yu-chu <yu-chu.yang@intel.com>
when fix the issue of _PM_SystemS5 with life_mngr fail,
the vuart1(tty) item was devided into two parts, the last
part "/dev/tty*" which need to get will be added to the
end, so it should be handled singly, but it will be added
to other item too, such as vuart1(pty).
Tracked-On:#5366
Signed-off-by: Shixiong Zhang <shixiongx.zhang@intel.com>
Multiple devices could be nested under the same range. Skip remove if
the device is removed already
Tracked-On: #5437
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
Changes:
1. assign 3 CPUs for WaaG on hybrid_rt scenario;
2. Passthrough NVME@9:0.0 for VM0 on hybrid_rt scenario;
3. Change rootfs from partition2 to partition3;
Tracked-On: #5390
Signed-off-by: Liang Yi <yi.liang@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
Support enable ivshmem for SOS. Insert the ivshmem device information if
it is enabled.
1. get ivshmem vbar based:
- vbar[0] is size 0x100
- vbar[2] is specified MB size
2. get vbdf for ivshmem device
Tracked-On: #5426
Signed-off-by: Yang,Yu-chu <yu-chu,yang>
Add following to default output scenarios vm_configurations.c:
- pci_dev_num
- pci_devs = sos_pci_devs
Both was defineded in CONFIG_SOS_VM.
Tracked-On: #5426
Signed-off-by: Yang, Yu-chu <yu-chu.yang@intel.com>
- Refactor pci_dev_c.py to insert devices information per VMs
- Add function to get unused vbdf form bus:dev.func 00:00.0 to 00:1F.7
Add pci devices variables to vm_configurations.c
- To pass the pci vuart information form tool, add pci_dev_num and
pci_devs initialization by tool
- Change CONFIG_SOS_VM in hypervisor/include/arch/x86/vm_config.h to
compromise vm_configurations.c
Tracked-On: #5426
Signed-off-by: Yang, Yu-chu <yu-chu.yang@intel.com>
Allocate unused vbar for SOS and pre-launched VMs.
- For SOS, find unused vbar in the range which is assigned to pci host
bridge. The allocated vbar cannot have confilicts with any existing pci devices
- For pre-launched VMs, find unused vbar in the range 0x80000000 to
0xfffffff. The alloacted vbar cannot have confilicts with any
passthrough devices and mmio.
Tracked-On: #5426
Signed-off-by: Yang, Yu-chu <yu-chu.yang@intel.com>
automatically get PTCT table from native environment for the usage
of pre-launched VMs.
Tracked-On: #5418
Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
fill physical PTCT table into pre-launched vACPI table when PSRAM
is configured to passthrough to pre-launched RTVM.
Tracked-On: #5418
Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
add PSRAM configs in xmls, only enable PSRAM and passthrough to
pre-launched RTVM for hybrid_rt scenario on tgl-rvp board.
Tracked-On: #5418
Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Config tool UI will do mutually exclusive check the legacy vuart 0/1 and
PCI vuart 0/1 to make sure there is no legacy vuart and PCI vuart are
used at the same time for VMs.
Tracked-On: #5394
Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Add PCI VUART config for post-launched VMs in launch config UI. Users
can configure the console_vuart, configure or dynamically add or remove
communication_vuart based on the communication vuarts which are configured
from the scenario xml.
Tracked-On: #5394
Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Add PCI VUART dynamic config for VMs in scenario config UI, keep legacy
VUART config. PCI vuart base can be set to INVALID_PCI_BASE and PCI_VUART;
users will configure the target_vm_id and target_vuart_id when PCI vuart
base is set to PCI_VUART; users can dynamically add or delete PCI vuart
for VMs.
Tracked-On: #5394
Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
changes:
1. Change SOS VM rootfs to nvme0;
2. Change hybrid_rt scenario VM0 mem size to 1GB;
Tracked-On: #5238
Signed-off-by: Victor Sun <victor.sun@intel.com>
The messages from the SOS socket can be safely read into the entire read
buffer.
Tracked-On: #5429
Signed-off-by: Peter Fang <peter.fang@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
- Since de-privilege boot is removed, we no longer need to save boot
context in boot time.
- cpu_primary_start_64 is not an entry for ACRN hypervisor any more,
and can be removed.
Tracked-On: #5197
Signed-off-by: Zide Chen <zide.chen@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
update tgl-rvp.xml for tgl boards with IFWI of tsn version to enable
the embeded tsn device.
Tracked-On: #5427
Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Add functionality to get free vbar base for the vmsix devices.
- The devices size is 4k.
- The mmio range for non SOS VM is 2G to 4G
- The mmio range for SOS is depended on the range which is assigned to
PCI bus hostbridge
- The next vbar index is based on last device vbar index vbar_i
Tracked-On: #5422
Signed-off-by: Yang, Yu-chu <yu-chu.yang@intel.com>
update vm configurations for hybrid_rt scenario on WHL/EHL/TGL/CFL
boards, add 1 YaaG and assign 1 more pcpu for WaaG.
Tracked-On: #5390
Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
assign 2 CPUs for WaaG and add 1 YaaG on hybrid_rt scenario for
WHL/EHL/TGL/CFL boards.
Tracked-On: #5390
Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
P2SB_BAR_ADDR related macros should only be defined in misc_cfg.h only when
p2sb is enabled in scenario xml.
Tracked-On: #5340
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Add configurations code of industry scenario and hybrid_rt scenario for
cfl-k700-i7 board to support build acrn binary from source code directly.
Tracked-On: #5212
Signed-off-by: Victor Sun <victor.sun@intel.com>
Add cfl-k700-i7 hybrid_rt xml to support ACRN hybrid_rt scenario on
cfl-k700-i7 board.
Tracked-On: #5212
Signed-off-by: Victor Sun <victor.sun@intel.com>
