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20c80ea72a
acrn-hypervisor/hypervisor/arch/x86
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Zheng, Gen 20c80ea72a HV: bug fix on emulating msi message from guest 
Current code has a mistake associating destination with
redirectionhint. So just use the destination mode to work out
destination mode.

When injecting the msi interrupt to vcpu in hypervisor layer,
current code ingnores the redirection hint(RH) bit of msi address
message from guest, and just use the destination mode and
destination ID. So correctly before injecting, check the RH bit,
if set, choose the vcpu that has lowest priority to inject msi.

Signed-off-by: Zheng, Gen <gen.zheng@intel.com>
Reviewed-by: Zhao, Yakui <yakui.zhao@intel.com>
Reviewed-by: Yin, Fengwei <fengwei.yin@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-19 11:09:09 +08:00
..
configs HV: config: add Kconfig and defconfigs for sbl & uefi 2018-06-08 17:21:13 +08:00
debug HV: prototyping non-static function 2018-07-16 10:35:54 +08:00
guest HV: bug fix on emulating msi message from guest 2018-07-19 11:09:09 +08:00
assign.c HV: bug fix on emulating msi message from guest 2018-07-19 11:09:09 +08:00
cpu_primary.S HV:treewide:Replace HOST_GDT_RING0_CODE/DATA_SEL with constant 2018-07-18 12:31:42 +08:00
cpu_state_tbl.c HV:CPU: Add 'U/UL' for unsigned const value 2018-07-09 10:27:21 +08:00
cpu.c HV:common:fix "integer type violations" 2018-07-18 12:31:14 +08:00
cpuid.c HV: Fix missing brackets for MISRA C Violations 2018-07-13 09:09:12 +08:00
ept.c HV:treewide:Update exec_vmread/exec_vmwrite and exec_vmread64/exec_vmwrite64 2018-07-18 12:31:42 +08:00
gdt.c HV:misc:add suffix U to the numeric constant 2018-07-05 11:29:46 +08:00
idt.S HV:treewide:Replace HOST_GDT_RING0_CODE/DATA_SEL with constant 2018-07-18 12:31:42 +08:00
io.c HV: coding style cleanup for TRACE_2L & TRACE_4I usage 2018-07-16 10:32:14 +08:00
ioapic.c HV: Fixes index out of bounds for addressing irq. 2018-07-19 11:06:42 +08:00
irq.c HV: Fixes index out of bounds for addressing irq. 2018-07-19 11:06:42 +08:00
Kconfig HV: build: make relocation-related code configurable 2018-07-11 19:18:26 +08:00
lapic.c hv: change several APIs to void type 2018-07-18 12:30:37 +08:00
mmu.c HV: Fix new MISRAC violations for brackets 2018-07-16 11:02:38 +08:00
mtrr.c HV:Treewide:Update the type of vcpu id as uint16_t 2018-07-04 14:28:52 +08:00
notify.c HV: Fix new MISRAC violations for brackets 2018-07-16 11:02:38 +08:00
pm.c HV: pm: cleanup for misra integral type violations 2018-07-12 17:31:11 +08:00
retpoline-thunk.S license: Replace license text with SPDX tag 2018-06-01 10:43:06 +08:00
softirq.c HV: handle integral issue report by MISRA-C 2018-07-16 16:24:29 +08:00
timer.c HV: Fixes index out of bounds for addressing irq. 2018-07-19 11:06:42 +08:00
trampoline.S HV:treewide:Replace HOST_GDT_RING0_CODE/DATA_SEL with constant 2018-07-18 12:31:42 +08:00
trusty2.c [REVERT-ME]:handle discontinuous hpa for trusty 2018-07-11 11:11:24 +08:00
trusty.c HV:treewide:Update exec_vmread/exec_vmwrite and exec_vmread64/exec_vmwrite64 2018-07-18 12:31:42 +08:00
virq.c HV:treewide:Add exec_vmread32 and exec_vmwrite32 functions 2018-07-18 12:31:42 +08:00
vmexit.c HV:treewide:Add exec_vmread32 and exec_vmwrite32 functions 2018-07-18 12:31:42 +08:00
vmx_asm.S HV:CPU:Constant values replace with CPU MACRO 2018-07-09 09:24:56 +08:00
vmx.c HV:treewide:Update exec_vmread/exec_vmwrite and exec_vmread64/exec_vmwrite64 2018-07-18 12:31:42 +08:00
vtd.c hv: change several APIs to void type 2018-07-18 12:30:37 +08:00
wakeup.S HV:CPU:Fix a mistake introduced by MARCO replacing patch 2018-07-13 11:27:56 +08:00