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a1069a5117
There are two different ways the current implementation adopts to access ioapic
RTEs:
1. As two 32-bit registers (typically named ''low'' and ''high''), or
2. As one 64-bit register (typically named ''rte'').
Two issues arise due to the mixed use of these two patterns.
1. Additional conversions are introduced. As an example, ioapic_get_rte()
merges two RTE fragments into a uint64_t, while some callers break it
back to ''low'' and ''high'' again.
2. It is tricky to choose the proper width of IOAPIC_RTE_xxx constants. SOS
boot failure is seen when they are 32-bit due to the following code:
/* reg is uint64_t */
vioapic->rtbl[pin].reg &= ~IOAPIC_RTE_REM_IRR;
while making them 64-bit leads to implicit narrowing when the RTEs are accessed
in the low & high pattern.
This patch defines a union ''ioapic_rte'' and unifies the access pattern
to IOAPIC and vIOAPIC RTEs.
v1 -> v2:
* Instead of two 32-bit ''low'' and ''high'', define a union that allows
either 32-bit or 64-bit accesses to RTEs.
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
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| .. | ||
| configs | ||
| debug | ||
| guest | ||
| assign.c | ||
| cpu_primary.S | ||
| cpu_state_tbl.c | ||
| cpu.c | ||
| cpuid.c | ||
| ept.c | ||
| gdt.c | ||
| idt.S | ||
| io.c | ||
| ioapic.c | ||
| irq.c | ||
| Kconfig | ||
| lapic.c | ||
| mmu.c | ||
| mtrr.c | ||
| notify.c | ||
| pm.c | ||
| retpoline-thunk.S | ||
| softirq.c | ||
| timer.c | ||
| trampoline.S | ||
| trusty2.c | ||
| trusty.c | ||
| virq.c | ||
| vmexit.c | ||
| vmx_asm.S | ||
| vmx.c | ||
| vtd.c | ||
| wakeup.S | ||