Commit Graph

2048 Commits

Author SHA1 Message Date
Victor Sun
56c193851a HV: introduce scenario Kconfig for sharing mode
Previously the vm_configs[] is defined separately for sharing mode and
partition mode, but the concept of hypervisor mode will be removed. Instead
we will introduce scenario Kconfig for hypervisor to load different vm
configurations.

SDC(Software Defined Cockpit) is a typical scenario that ACRN supported
so we introduce this scenario for previously sharing mode and move its
configurations to scenarios/sdc folder. The configuration could be used
for all boards reference.

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-04-02 16:00:27 +08:00
Victor Sun
564c9dcb79 HV: refine pt_dev.c for partition mode
Use MACROs in pt_dev.c to replace straight-forward BDF numbers. The
pt devices for each VM will be chosen from Board specific PCI devices
list which defined in pci_devices.h;

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-04-02 16:00:27 +08:00
Jian Jun Chen
cee45a80d9 hv: add default handlers for PIO/MMIO access
Add the default handlers for PIO and MMIO access which returns all
FFs on read and discards write. These default handlers are registered
when SOS VM or pre-launched VM is created.

v3 -> v4:
- use single layer if in hv_emulate_pio
- change the implementation of pio_default_read

v2 -> v3:
- use runtime vm type instead of CONFIG_PARTITION_MODE
- revise the pio/mmio emulation functions
- revise the pio/mmio default read functions according to MISRA C
- revise the commit message

v1 -> v2:
- add default handlers members in struct acrn_vm and add interfaces
  to register default handlers for PIO and MMIO.

Tracked-On: #2860
Signed-off-by: Jian Jun Chen <jian.jun.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-04-01 11:16:37 +08:00
Kaige Fu
382acfaf28 HV: Using INIT to kick vCPUs off when RTVM poweroff by itself
When RTVM is trying to poweroff by itself, we use INIT to
kick vCPUs off the non-root mode.

For RTVM, only if vm state equal VM_POWERING_OFF, we take action to pause
the vCPUs with INIT signal. Otherwise, we will reject the pause request.

Tracked-On: #2865
Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-29 16:17:44 +08:00
Kaige Fu
2771b46b1d HV: Add one delmode parameter to make_reschedule_request
This patch makes make_reschedule_request support for kicking
off vCPU using INIT.

Tracked-On: #2865
Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-29 16:17:44 +08:00
Kaige Fu
ef9be0208a HV: Introduce one new API send_single_init
This API is only for kick vcpu out of non-root mode when
RTVM poweroff by itself. And the first caller will soon come
along with the next patch.

Tracked-On: #2865
Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-29 16:17:44 +08:00
Kaige Fu
8ad5adced7 HV: Set vm state as with VM_POWERING_OFF when RTVM poweroff by itself
We set the vm state as VM_POWERING_OFF when RTVM is trying to poweroff by itself.
We will check it when trying to pause vCPUs of RTVM. Only if vm state equal to
VM_POWERING_OFF, we take action to pause the vCPUs of RTVM. Otherwise, we will
reject the pause request.

Tracked-On: #2865
Signed-off-by: Kaige Fu <kaige.fu@intel.com>
2019-03-29 16:17:44 +08:00
Kaige Fu
83d11bbff8 HV: Register S5 pio handler for dm-launched RTVM
The virtual pm port of RTVM is intercepted by HV. But the HV needs to inform the DM as well.
So we will forward the virtual S5 request to DM too

The handler in HV just set the pm state flag (VM_POWERING_OFF) which indicate that the RTVM is powering
off by itself. Meanwhile, there are data resources in VHM and DM should be released once we handle the PM
of RTVM in HV. So, return to DM to go through the entire VM destroy cycles to release the resources.
During the cycles, the DM will try to pause vm through hypercall. In the hypercall handler in HV, we will
check the pm state flag. If it is set, pause all the vCPUs of the vm. Otherwise, reject the request.

In this way, we can make sure that RTVM can only trigger its s5 by itself. All
other S5 request from external will be rejected.

Here is sequence chart of RTVM s5.

   poweroff
+-----------+              +----------+           +-----------+         +----------+
|    vBSP   |              |    vAPs  |           |    HV     |         |    DM    |
+-----+-----+              +----------+           +-----+-----+         +-----+----+
      |                         |                       |                     |
      |   Stop all other cpus   |                       |                     |
      +----------------------------+                    |                     |
      |                         |  |Disable LAPIC       |                     |
      |                         +<-+                    |                     |
      |                         |                       |                     |
      |                         +--+                    |                     |
      |                         |  |HLT in              |                     |
      | All other cpus stopped  |  |non-root mode       |                     |
      +----------------------------+                    |                     |
      |     Call ACPI method to enter s5                |                     |
      +-------------------------+---------------------> |                     |
      |                         |   Set s5 flag         |                     |
      |                         | <---------------------+                     |
      |                         |   APs paused          | Re-inject IOREQ TO DM
      |                         | +-------------------> +-------------------> +
      |                         |                       |   Pause VM          |
      |                         |   Check S5 flag:      | <-------------------+
      |                         |    - If set, pause vm |  VM paused          |
      |                         |    - If no, reject    | +-----------------> +--+
      |                         |                       |  Destroy VM         |  |Deinit works
      |                         |                       | <--------------------<-+
      |                         |                       |  VM destroyed       |
      |                         |                       | +-----------------> |
      +                         +                       +                     +

Tracked-On: #2865
Signed-off-by: Kaige Fu <kaige.fu@intel.com>
2019-03-29 16:17:44 +08:00
Kaige Fu
1c0d7f78d0 HV: HV: make io_read_fn_t return true or false
This patch makes io_read_fn_t return true or false instead of void.
Returning true means that the handler in HV process the request completely.
Returning false means that we need to re-inject the request to DM after
processing it in HV.

Tracked-On: #2865
Signed-off-by: Kaige Fu <kaige.fu@intel.com>
2019-03-29 16:17:44 +08:00
Kaige Fu
3b2ad67788 HV: make io_write_fn_t return true or false
This patch makes io_write_fn_t return true or false instead of void.
Returning true means that the handler in HV process the request completely.
Returning false means that we need to re-inject the request to DM after
processing it in HV.

Tracked-On: #2865
Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-29 16:17:44 +08:00
Kaige Fu
ed286e3239 HV: Introduce a new API is_rt_vm
This patch checks if the GUEST_FLAG_RT is set when GUEST_FLAG_LAPIC_PASSTHROUGH is set.
If GUEST_FLAG_RT is not set while GUEST_FLAG_LAPIC_PASSTHROUGH is set, we will refuse
to boot the VM.

Meanwhile, this patch introduces a new API is_rt_vm.

Tracked-On: #2865
Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-29 16:17:44 +08:00
Kaige Fu
2e4d7eb527 DM: Add new flag GUEST_FLAG_RT for RTVM
This flag indicates that if the vm is RTVM.
And if a vm has GUEST_FLAG_LAPIC_PASSTHROUGH flag set,
we must set the GUEST_FLAG_RT at the same time.

Tracked-On: #2865
Signed-off-by: Kaige Fu <kaige.fu@intel.com>
2019-03-29 16:17:44 +08:00
Sainath Grandhi
e91d7402d5 hv: Debug messages from a CPU are overlapped with other CPUs messages
In the cases when more than one CPU has something to print, exception
dump from one CPU is overlapped with other CPU's messages and the final
text that is printed on console is all mixed up and does not make any sense.
Changing printf to pr_err so that the messages are printed one after
the other.

Tracked-On: #2858
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
2019-03-28 12:23:42 +08:00
Yonghua Huang
868778a68b hv: fix vulnerability when VM is destroyed
In hypervisor fuzzing test, hypervisor will hang
 if issuing HV_VM_SET_MEMORY_REGIONS hypercall after
 target VM is destroyed.

 this patch is to fix above vulnerability.

Tracked-On: #2849
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2019-03-27 09:20:12 +08:00
yuhong.tao@intel.com
b1586ccc3e HV: move MAX_CONFIG_NAME_SIZE to acrn_common.h
The vm_config in hypervisor restricted VM name size to
MAX_CONFIG_NAME_SIZE (32 bytes). When UOS is launched by DM, the vmname
is passed in as the last optional args, we hope to to copy it to vm_config
in the future. So the size of vmname in DM args should be restricted to
MAX_CONFIG_NAME_SIZE, too. Because MAX_CONFIG_NAME_SIZE will be used by DM,
we move it from vm_config.h to acrn_common.h
We also rename MAX_CONFIG_NAME_SIZE to MAX_VM_OS_NAME_LEN, because it will
be used by another components, should has a clear name.

Tracked-On: #2851
Signed-off-by: Tao Yuhong <yuhong.tao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-26 21:23:16 +08:00
yuhong.tao@intel.com
c55308bd3d DM: use soft link of acrn_common.h in HV
devicemodel/include/public/acrn_common.h should be identical with
hypervisor/include/public/acrn_common.h, so we can use a soft link
to hypervisor's acrn_common.h for devicemodel.

Tracked-On: #2851
Signed-off-by: Tao Yuhong <yuhong.tao@intel.com>
2019-03-26 21:23:16 +08:00
wenlingz
3effbb05a2 Revert "hv: vmsr: add IA32_MISC_ENABLE to msr store area"
This reverts commit 98b3d98ac5.
2019-03-26 13:59:21 +08:00
Li, Fei1
40168e73ee hv: vlapic: remove TPR set/get API
Since we always enable "Use TPR shadow", so operate on TPR will not
trigger VM exit. So remove these APIs.

Tracked-On: #1842
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2019-03-25 13:31:51 -07:00
Li, Fei1
4a683ed10e hv: vlapic: minor fix for update_msr_bitmap_x2apic_apicv
Shouldn't trap TPR since we always enable "Use TPR shadow"

Tracked-On: #1842
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2019-03-25 13:31:51 -07:00
dongshen
3be6c6593f HV: merge partition_mode.c and sharing_mode.c's code into vpci.c
Delete the 2 files and merge their code into vpci.c:
 hypervisor/dm/vpci/partition_mode.c
 hypervisor/dm/vpci/sharing_mode.c

And change the Makefile accordingly
Change PCI_PRIV_H_ to VPCI_PRIV_H_ in vpci_priv.h

Some misra c fix:
 Add @pre for functions
 Add const to function parameters

Tracked-On: #2534
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
2019-03-25 12:35:39 +08:00
dongshen
320bf18321 HV: rename pci_priv.h to vpci_priv.h
Rename hypervisor/dm/vpci/{pci_priv.h => vpci_priv.h} and change the related
source code files accordingly

Tracked-On: #2534
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-25 12:35:39 +08:00
dongshen
1a3c9b3255 HV: rename vpci files
Renamed 3 files:
hypervisor/dm/vpci/hostbridge.c => vhostbridge.c}
hypervisor/dm/vpci/{msi.c => vmsi.c}
hypervisor/dm/vpci/{msix.c => vmsix.c}

And change Makefile accordingly

Tracked-On: #2534
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-25 12:35:39 +08:00
dongshen
c6a60dd29c HV: remove all CONFIG_PARTITION_MODE from dm/vpci code
Instead of using CONFIG_PARTITION_MODE at compile time to compile in and call
the partition mode/sharing mode specific functions, always compile in all sharing
mode and partition code, then calling the corresponding functions dynamically based
on vm type (PRE_LAUNCHED_VM and SOS_VM) at runtime.

Some misra c fix:
 Add @pre for functions
 Add const to function parameters

Add ASSERT in pci_cfgdata_io_read and pci_cfgdata_io_write

Tracked-On: #2534
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-25 12:35:39 +08:00
Arindam Roy
691468a361 HV: Remove hypervisor.h from bsp folder
Re-organize the code to remove usage of hypervisor.h from
bsp folder, without changing any functionality.

Tracked-On: #2694
Signed-off-by: Arindam Roy <arindam.roy@intel.com>
2019-03-25 11:13:57 +08:00
Binbin Wu
98b3d98ac5 hv: vmsr: add IA32_MISC_ENABLE to msr store area
Currently MSR IA32_MISC_ENABLE is passthrough to guest.
However, guest may change the value of this MSR, which will cause issue in hypervisor.
This patch uses VMX MSR store area to isolate the MSR IA32_MISC_ENABLE between guest and host.

TODO:
Some bits of the MSR IA32_MISC_ENABLE is not just per core, but per package.
So need to check if need to prevent guest from setting or clearing these bits that may affect other cores.

Tracked-On: #2834
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2019-03-22 13:32:01 +08:00
Binbin Wu
273381b372 hv: vmsr: rename msr_num to msr_index in struct msr_store_entry
Rename the field msr_num to msr_index, which is more accurate,
in struct msr_store_entry.

Tracked-On: #2834
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
2019-03-22 13:32:01 +08:00
Mingqiang Chi
5585084c00 hv:move 'udelay' to timer.c
-- move this api from misc.c to timer.c to avoid
   reverse dependency, and remove misc.c

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
2019-03-22 08:38:13 +08:00
Zide Chen
370998ba5a hv: replace MEM_2K with a new macro MAX_BOOTARGS_SIZE for bootargs size
- for all cases of referring guest bootargs size, replace MEM_2K with
  CONFIG_MAX_BOOTARGS_SIZE for better readability.
- remove duplicated MAX_BOOTARGS_SIZE definition from vm_config.h.

Also fix one minor issue in general_sw_loader() which uses copy_to_gpa()
to copy a string. Since copy_to_gpa() makes use of memncpy_s() to do the
job, the size parameter should include the string null ternimator.

Tracked-On: #2806
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-21 13:08:15 +08:00
Qi Yadong
e381aef220 hv: seed: remove unused seed parsing source files
Remove the unused seed parsing source files under
hypervisor/boot/sbl and related header files.

Tracked-On: #2724
Signed-off-by: Qi Yadong <yadong.qi@intel.com>
2019-03-21 11:06:53 +08:00
Arindam Roy
0947fbab94 HV: Fix a compiler warning in firmware.h
Added a struct acrn_vm in firmware.h to remove
a compiler warning.
No change in logic.

Tracked-On: #2830
Signed-off-by: Arindam Roy <arindam.roy@intel.com>
2019-03-21 10:28:44 +08:00
Geoffroy Van Cutsem
410c76ac18 hv: enhance ACRN shell interactive help
Enhance the ACRN shell interactive help. It is close to a 1-1 mapping with
the online documentation but cut a little shorter in various places to make it
more user-friendly when using it from the ACRN console.

Tracked-On: #2829
Signed-off-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
2019-03-20 22:05:06 +08:00
Zide Chen
a0de49d03e hv: fix potential buffer overflow in sbl_init_vm_boot_info()
To merge the multiboot bootargs within sbl_init_vm_boot_info(), buffer
overflow could happen when it doesn't provide correct 'dmax' argument
to strncpy_s().

Also, currently it doesn't check the availability of the dest buffer before
overwriting '\0' with a whitespace, which theoretically the dest string
could end up with no null terminator within it's array boundary.

This patch also creates a separate function to merge the cmdline strings,
because after the above fixes some lines in sbl_init_vm_boot_info()
function could have up to 7 tabs in front of the first character, which
looks messy and sbl_init_vm_boot_info() is getting too complicated.

Tracked-On: #2806
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
2019-03-20 15:12:21 +08:00
Yan, Like
93ed2af165 hv: passthru TSC_ADJUST to VM with lapic pt
Linux access TSC_ADJUST to verify it has not tampered every time when enter idle.
So for RTVM running rt-linux, the access will cause vm exit which affect real-time performance.

This commit pass through TSC_ADJUST to VM with lapic_pt, to avoid TSC_ADJUST caused vm_exit.
For other VMs, TSC_ADJUST msr access is still trapped and emulated.

Tracked-On: #2813
Signed-off-by: Yan, Like <like.yan@intel.com>
2019-03-20 13:35:28 +08:00
Binbin Wu
f32b59d73d hv: disable mpx capability for guest
This patch hide Memory Protection Extention (MPX) capability from guest.

- vCPUID change:
  Clear cpuid.07H.0.ebx[14]
  Clear cpuid.0DH.0.eax[4:3]
- vMSR change:
  Add MSR_IA32_BNDCFGS to un-supported MSR array.
- XCR0[4:3] is not allowed to set by guest.

Tracked-On: #2821
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-20 13:07:31 +08:00
dongshen
71ce4c255e HV: unify the sharing mode and partition mode coding style for similar functions
Both sharing mode and partition mode should follow the same coding logic/style
for similar functions:

vdev cfgread/cfgwrite: should all return -ENODEV if the pci reg access is not handled by
it, but previously the partition mode code is not following this logic

vpci cfgread/cfgwrite: if the vdev cfgread/cfgwrite does not handle this reg,
pass on to next vdev cfgread/cfgwrite, if no vdev handles that req, passthru to
physical pci device

Tracked-On: #2534
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-20 12:04:42 +08:00
dongshen
026250fd8a HV: centralize the pci cfg read/write sanity checking code
Do the pci cfg read/write sanity checking before the request is dispatched to
submodules, so that the checking is centralized rather than scattered across multiple
files/places

Tracked-On: #2534
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-20 12:04:42 +08:00
dongshen
a403128a46 HV: remove vpci ops
Do not call vpci ops, call the corresponding sharing mode/partition functions
directly instead.

Remove struct vpci_ops from vpci.h

Tracked-On: #2534
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-20 12:04:42 +08:00
dongshen
aa1ee9424c HV: declare and export vpci ops functions as global instead of static local
In preparation for vpci ops function removal, so that these functions can be
called directly instead by vpci code

Tracked-On: #2534
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-20 12:04:42 +08:00
dongshen
a7f528cfd0 HV: remove vdev ops for partition mode
Remove vdev ops for partition mode, change related code to directly call the corresponding
functions instead

Remove struct pci_vdev_ops from vpci.h

Add @pre for pci_find_vdev_by_pbdf and pci_find_vdev_by_vbdf/partition_mode_vpci_init

Change the return value from int32_t to void to comply with misra c and
add ASSERT/panic in the functions (if necessary):
 vdev_hostbridge_init
 vdev_hostbridge_deinit
 vdev_pt_init
 vdev_pt_deinit

Still use pr_err in partition_mode_cfgread and partition_mode_cfgwrite to check if vdev cfgread/cfgwrite
access is aligned on 1/2/4 bytes, which is the only case that vdev cfgread/cfgwrite will return
nonzero, pr_err will be removed in subsequent patch titled "unify the sharing
mode and partition mode coding style for similar functions"

Remove @pre for local variables

Add ASSERT in partition_mode_pdev_init to check if pdev is NULL (user config
error)

Tracked-On: #2534
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-20 12:04:42 +08:00
Sainath Grandhi
b1cc18810e hv: Use domain/device specific invalidation for DMAR translation caches
ACRN uses global invalidation for all DMAR translation caches. Whenever
a UOS is shutdown or rebooted, it ends up clearing entries in translation
caches belonging to other VMs/domains. This patch adds support for
domain/device level invalidation for DMA translation caches and index
based invalidation for Interrupt Remapping Cache.

Tracked-On: #2738
Signed-off-by: Sainath Grandhi sainath.grandhi@intel.com
Acked-by: Eddie Dong eddie.dong@intel.com
2019-03-20 09:13:07 +08:00
Zide Chen
5c04687967 hv: minor fixes to a few calls to strncpy_s()
strncpy_s(d, dmax, s, slen): the 'dmax' includes the null terminator, while
slen doesn't. Thus if (dmax == slen == strlen(s)), strncpy_s() chooses to
discard the last character from s and instead write '\0' to d[dmax - 1].

strnlen_s(s, maxsize): if there is no terminating null character in the
first maxsize characters pointed to by s, strnlen_s() returns maxsize.

So in the following example or similar cases, we need to increase the size
of d[] by 1 to accommodate the null terminator, and add '1' to the dmax
argument to strncpy_s().

uint8_t d[MAX_LEN];
size = strnlen_s(s, MAX_LEN);
strncpy_s(d, MAX_LEN, s, size);

Tracked-On: #861
Signed-off-by: Zide Chen <zide.chen@intel.com>
2019-03-20 08:55:42 +08:00
Li, Fei1
e131d7059a hv: vmconfig: minor fix about regression of commit 79cfb1
commit 79cfb1 forgot to add GUEST_FLAG_ prefix for LAPIC_PASSTHROUGH
in file arch/x86/configs/dnv-cb2/partition_config.h

Tracked-On: #1842
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2019-03-19 19:09:36 +08:00
Junjie Mao
9abd469da2 config: unify board names to lowercase
Currently board names are used inconsistently across the project.

* Name of defconfigs for various boards use lowercase.
* Directory of config files for various boards use lowercase.
* CONFIG_BOARD uses uppercase.

This confuses the configuration scripts and leads to unintended overwriting of
.config, as well as missing of board-specific headers during compilation because
the include paths are case-sensitive.

This patch converts the default board names to lowercase to resolve such
issues. Users are still free to define their own boards in either uppercase or
lowercase as long as they keep the cases consistent.

Tracked-On: #2794
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
2019-03-19 19:08:59 +08:00
Zide Chen
5398c901f6 hv: remove CONFIG_PARTITION_MODE for pre-launched VM vE820 creation
Preparing for hybrid mode:

- create vE820 for pre-launched VMs and do other init code when the
  vm_config->type is PRE_LAUNCHED_VM.
- create ve820.c for each board because without wrapping by
  CONFIG_PARTITION_MODE, ve820_entry[] needs to be visible even when
  compiling target boards that haven't enabled pre-launched VMs.
- remove create_prelaunched_vm_e820() from vm.c and implement board
  specific function for each $(CONFIG_BOARD)/ve820.c. The reasons being:
  - don't need to define ve820_entry[32] for those boards that don't
    support pre-launched VMs.
  - more importantly, this makes it much easier to create different per-VM
    vE820 when it's needed.

Tracked-On: #2291
Signed-off-by: Zide Chen <zide.chen@intel.com>
2019-03-19 14:28:43 +08:00
Victor Sun
ca6e341147 HV: add vrtc for sharing mode
Previously vrtc is for partition mode only, now enable it for sharing mode;

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-19 13:45:32 +08:00
Qi Yadong
1b79f28efe hv: update CR0/CR4 on demand in run_vcpu()
Suppose run_ctx.cr0/cr4 are correct when do world switching, so call
vcpu_set_cr0/cr4() to update cr0/cr4 directly before resume to guest.
This design is only for trusty world switching.

Tracked-On: #2773
Signed-off-by: Qi Yadong <yadong.qi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-19 09:57:08 +08:00
dongshen
19c5342506 HV: remove vdev ops for sharing mode
Remove vdev ops for sharing mode, directly call the corresponding functions
instead of calling the ops callbacks (indirectly)

Remove alloc_pci_vdev() and merge its code into init_vdev_for_pdev() to simplify code

Remove @pre for local variables

Change the return value from int32_t to void to comply with misra c and
add ASSERT in the functions (if necessary) to verify the assumptions for debug build:
 vmsi_init
 vmsix_init
 vmsi_deinit
 vmsix_deinit

Add @pre for vmsix_init_helper and make it a void function, use ASSERT to verify
the assumption for debug build.

Add ASSERT in get_sos_vm

Tracked-On: #2534
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-18 10:08:10 +08:00
dongshen
eb4f46987a HV: add const qualifier for the deinit vdev op functions
This is to fix the following misra c violation:
Pointer param should be declared pointer to const. : vdev

Tracked-On: #2534
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-18 10:08:10 +08:00
dongshen
b2b1a278f0 HV: remove intercepted_gpa and intercepted_size from struct pci_msix
No need to use these 2 variables as global (per pci_misx), can simply use local
variables in code instead.

Tracked-On: #2534
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-18 10:08:10 +08:00
dongshen
5767d1e141 HV: extract common code blocks to has_msi_cap and has_msix_cap functions
Define has_msi_cap and has_msix_cap inline functions to do sanity checking for
msi and msix ops, the corresponding code block in existing code is replaced with
a call to these new functions.

A few minor coding style fix.

Tracked-On: #2534
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-18 10:08:10 +08:00
Li, Fei1
79cfb1cf58 hv: vmconfig: format guest flag with prefix GUEST_FLAG_
To make the code more readable.

Tracked-On: #1842
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2019-03-16 17:14:12 +08:00
Li, Fei1
c018b853e9 hv: vmtrr: hide mtrr if hide_mtrr is true
Now we only configure "hide MTRR" explicitly to false for SOS. For other VMs,
we don't configure it which means hide_mtrr is false by default.
And remove global config MTRR_ENABLED

Tracked-On: #1842
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2019-03-16 17:14:12 +08:00
Binbin Wu
906c79eb40 hv: vpci: restore vbdf when pci dev un-assigned from uos
When a pci device assined to UOS, the virtual bdf is allocated by device model.
After the pci device un-assigned from UOS, it is back to SOS.
The virtual bdf should be restored.
The virtual bdf equals physical bdf for a pci device in SOS.

Tracked-On: #2788
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-15 20:57:39 +08:00
yuhong.tao@intel.com
cd360de4aa hv: fix wrong comment message about CLOS usage in vm config
VM use CLOS when set CLOS_REQUIRED in guest flags of vm_config. The
wrong comment is 'if guest_flags has CAT_ENABLED', and should be fixed
as 'if guest_flags has CLOS_REQUIRED'

Tracked-On: #2462
Signed-off-by: Tao Yuhong <yuhong.tao@intel.com>
2019-03-15 16:44:44 +08:00
Qi Yadong
21d3dc6863 hv: seed: refine header file
1. move seed_info structure from trusty.h to seed.h
2. replace "#include <hypervisor.h>" with necessary including headers
   in seed.c/seed_abl.c/seed_sbl.c

Tracked-On: #2777
Signed-off-by: Qi Yadong <yadong.qi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-15 14:09:56 +08:00
Qi Yadong
ff41c008ce hv: trusty: refine control registers switching method
Remove vmx_cr0/vmx_cr4 from ext_context structure, they are duplicated
with cr0/cr4 fields in run_context.
Switch cr0/cr4 of run_context structure on demand when do world switch.

Remove vmx_cr0_read_shadow/vmx_cr4_read_shadow from ext_context structure.
These fields should be same for both normal world and secure world.

Tracked-On: #2773
Signed-off-by: Qi Yadong <yadong.qi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-15 10:08:25 +08:00
Zide Chen
518a82d80b hv: cleanup some hva/hpa conversion code
The init page tables installed in either cpu_primary.S or trampoline.S
are 1:1 mapping and won't be changed in the future.

The 'actual' hypervisor page table installed in enable_paging() is 1:1
mapping currently but it could be changed in the future. Both hva2hpa() and
hpa2hva() are implemented based on these page tables and can't be used
when the init page tables take effect.

This patch does the following cleanup:

- remove all hva2hpa()/hpa2hva() before calling enable_paging()
- get_hv_image_base() returns HVA, not HPA. So add hva2hpa() for all cases
  that are called afte enable_paging().

Tracked-On: #2700
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Eddie Dong <Eddie.dong@intel.com>
2019-03-15 09:03:14 +08:00
David B. Kinder
e9335fcee6 doc: fix utf-8 punctuation, branding, spelling
Fix some stray UTF-8 punctuation and symbol characters, unnecessary
trademark symbols, and some misspellings missed during regular reviews.

Tracked-On: #2712

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2019-03-14 09:13:58 -07:00
Binbin Wu
74023a9a75 hv: vtd: check bus number when assign/unassign device
Input parameter "bus" of assign_iommu_device/unassign_iommu_device may be from hypercall.
And the conext tables are static allocated according to CONFIG_IOMMU_BUS_NUM.
Need to check the bus value to avoid access invalid memory address with invalid value.

Tracked-On: #2743
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2019-03-14 13:07:59 +08:00
Qi Yadong
95d1e40283 hv: refactor seed management
New component to maintain seed retrieval and derivation: seed.

1. Retrieve seed from bootloader in Hypervisor's boot stage.
2. Derive virtual seed for Guest/Trusty if need.

Tracked-On: #2724
Signed-off-by: Qi Yadong <yadong.qi@intel.com>
Reviewed-by: Zhu Bing <bing.zhu@intel.com>
2019-03-14 10:38:17 +08:00
dongshen
caa291c094 HV: some minor code cleanup for partition mode code
Define is_hostbridge function
Rename pdev_ref to pdev

Tracked-On: #2534
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-14 09:07:41 +08:00
dongshen
82789f44a9 HV: declare and export partition mode's vdev functions as global instead of static local
Export the following functions as global instead of static so that they can be
called/referred outside of the files where they are declared:

vdev_pt_init
vdev_pt_deinit
vdev_pt_cfgread
vdev_pt_cfgwrite
vdev_hostbridge_init
vdev_hostbridge_deinit
vdev_hostbridge_cfgread
vdev_hostbridge_cfgwrite

This is in preparation for removal of the partition modes vdev ops, and call them
directly instead.

Tracked-On: #2534
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-14 09:07:41 +08:00
dongshen
93f6142d14 HV: declare and export sharing mode's vdev functions as global instead of static local
Export the following functions as global instead of static so that they can be
called/referred outside of the files where they are declared:
vmsi_init
vmsi_cfgread
vmsi_cfgwrite
vmsi_deinit
vmsix_init
vmsix_cfgread
vmsix_cfgwrite
vmsix_deinit

This is in preparation for removal of the sharing modes vdev ops, and call them
directly instead.

Tracked-On: #2534
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-14 09:07:41 +08:00
dongshen
562628b99e HV: remove the populate_msi_struct() function
Remove the populate_msi_struct() function, put msi initialization specific
functionality into msi.x, and put msix initialization specific functionality
into msix.c

Rename mmio_hva to mmio_hpa and change related code to fix misra c violation:
Cast from pointer to integral type. : (void* to unsigned long): ( uint64_t ) hpa2hva ( bar -> base )

Tracked-On: #2534
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-14 09:07:41 +08:00
Arindam Roy
3158c851ae HV: Modularize boot folder
In order to remove the usage of hypervisor.h,
modularize the boot folder.
Current changes include modifications to remove
usage of acrn_vm structure pointer, from some of
the call, and remove calls to hypervisor.h,
as and when deemed fit.

Removed hva2gpa, as this was not used anywhere else
after the changes.

Tracked-On: #2694
Signed-off-by: Arindam Roy <arindam.roy@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-14 09:05:53 +08:00
Jason Chen CJ
286731d9d1 hv:move instr_emul_ctxt instance to struct vcpu
move instr_emul_ctxt instance from struct per_cpu_region
to struct vcpu, and rename it from g_inst_ctxt to inst_ctxt

Tracked-On: #1842
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-13 14:04:20 +08:00
Mingqiang Chi
5331b39520 hv:remove 'cpu_mode' from struct vm_guest_paging
now the 'cpu_mode' is unused in struct vm_guest_paging,
and there is the  same variable in struct acrn_vcpu_arch

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-13 14:04:20 +08:00
Tw
ce387084ed hv: remove CONFIG_PLATFORM_[SBL|UEFI] and UEFI_STUB
ACRN now has unified the way to handle SBL and UEFI.
so just remove corresponding macros in Kconfig.
BTW, default configuration in Kconfig is for UEFI boards.

Tracked-On: #2708
Signed-off-by: Tw <wei.tan@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-13 10:26:55 +08:00
Tw
334382f9ef efi-stub: minor change for uefi refactor
Include these changes:
- substitute efi_context with uefi_context
- remove EFI_STUB from Kconfig
- remove EFI_

Signed-off-by: Tw <wei.tan@intel.com>
2019-03-13 10:26:55 +08:00
Tw
9b24620e16 hv: merge SBL and UEFI related stuff under boot
This patch mainly unifies init_vm_boot_info's implementation between SBL and
UEFI.

Tracked-On: #2708
Signed-off-by: Tw <wei.tan@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-13 10:26:55 +08:00
Tw
56d8b08b78 hv: merge SBL and UEFI related stuff under bsp
This patch unifies the bsp interface between UEFI and SBL.

Tracked-On: #2708
Signed-off-by: Tw <wei.tan@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-13 10:26:55 +08:00
Li, Fei1
78890622b2 hv: vlapic: minor fix about detect_apicv_cap
detect_apicv_cap should used to detect all the APICv capabilities. Besides,
"Virtualize x2APIC mode" doesn't depend on "APIC-register virtualization".
We shouldn't check "Virtualize x2APIC mode" support only when physical platform
supports "APIC-register virtualization"

Tracked-On: #1842
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2019-03-12 20:37:06 +08:00
Li, Fei1
f769f7457b hv: vlapic: add combined constraint for APICv
Add two functions to combine constraint for APICv:
is_apicv_basic_feature_supported: check the physical platform whether support
"Use TPR shadow", "Virtualize APIC accesses" and "Virtualize x2APIC mode"
is_apicv_advanced_feature_supported: check the physical platform whether support
"APIC-register virtualization", "Virtual-interrupt delivery" and
"Process posted interrupts".

If the physical platform only support APICv basic feature, enable "Use TPR shadow"
and "Virtualize APIC accesses" for xAPIC mode; enable "Use TPR shadow" and
"Virtualize x2APIC mode" for x2APIC. Otherwise, if the physical platform support
APICv advanced feature, enable APICv feature for xAPIC mode and x2APIC mode.

Tracked-On: #1842
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2019-03-12 20:37:06 +08:00
Kaige Fu
2b74e1a91e HV: PAE: Add stac()/clac() in local_gva2gpa_pae
Accessing memory of guest will cause page fault when SMAP is enabled.
This patch stac()/clac() correspondingly to get rid of this situation.

Tracked-On: #2713
Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-12 09:28:35 +08:00
Viktor Sjölind
5f51e4a762 pci.c: assert MSIX table count <= config max
Assert that PCI devices discovered while booting the hypervisor do not
have more table entries than allowed by the compile-time configuration
(CONFIG_MAX_MSIX_TABLE_NUM).

The case were `msix.table_count` > `CONFIG_MAX_MSIX_TABLE_NUM` is fatal
since the init function in the handler for MSI-X (vmsix_init) only looks
at `table_count` when populating the table. Since
`CONFIG_MAX_MSIX_TABLE_NUM` is the max size of the table array entry in
the pci_msix struct. This will cause the msix handler to write outside of
the table array.

Tracked-On: #2624
Signed-off-by: Viktor Sjölind <vsjolind@luxoft.com>
2019-03-08 23:04:12 +08:00
Sainath Grandhi
137892fdd5 hv: Remove multiple definitions for dmar translation structures
Except for few translation structures in x86 IOMMU, all translation
structures are 128-bit. All the translation structures used by ACRN
are 128 bit. So removed multiple definitions and defined a struct
that accomodates 128 bit entries.

Tracked-On: #2668
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
2019-03-08 15:23:20 +08:00
Zide Chen
bf1aa5c134 hv: destroy IOMMU domain after vpci_cleanup()
In partition mode, unassign_iommu_device() is called from vpci_cleanup(),
so when shutdown_vm() is called, unassign_iommu_device() could fail because
of "domain id mismatch" and DMAR is not cleared.

Also move destroy_ept() after the call to destroy_iommu_domain().

Tracked-On: #2700
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-08 13:20:11 +08:00
yuhong.tao@intel.com
c0400b99fb HV: Fix modularization vm config code lost CAT code
Previous change 'HV: modularization vm config code', commit id
1bb15c64a6, lost CAT code when move
sanitize_vm_config() from vm.c to vm_config.c

Tracked-On: #2291
Signed-off-by: Tao Yuhong <yuhong.tao@intel.com>
2019-03-08 12:38:48 +08:00
Victor Sun
649406b049 HV: refine location of platform_acpi_info header
platform_acpi_info.h should be BOARD specific so move the header file
to configs/$(CONFIG_BOARD)/ folder.

So the target acpi info file detect process is:

Compiler search for $(CONFIG_BOARD)_acpi_info.h under
hypervisor/arch/x86/$(CONFIG_BOARD)/ first (the file is supposed to be
generated by offline tool so it is not included in original source), if
found, then the file is the target acpi info file. If not and at the
same time the ENFORCE_VALIDATED_ACPI_INFO Kconfig was set, the compiler
will stop and hint user to add target acpi info file by offline tool.
If ENFORCE_VALIDATED_ACPI_INFO was unset, then compiler will continue to
search for platform_acpi_info.h as target acpi info file under
hypervisor/arch/x86/$(CONFIG_BOARD) folder (with this file we could bypass
ENFORCE_VALIDATED_ACPI_INFO check and benifit for development). If this
file is not exist, then hypervisor/arch/x86/configs/platform_acpi_info.h
will be included as final target acpi info.

The process should work for UEFI path also, with a valid platform acpi
info file, S3/S5 should work on UEFI platform.

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-08 10:34:14 +08:00
Mingqiang Chi
55f52978db hv:move several tsc APIs to timer.c
-- change 'tsc_khz' to static
-- move these APIs from rtl.h to timer.c
   us_to_ticks()
   ticks_to_us()
   ticks_to_ms()
   rdtsc()

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-07 20:23:22 +08:00
Yonghua Huang
36f6a412b7 hv:validate ID and state of vCPU for related APIs
to validate the ID and state of vCPU in below functions:
  - hcall_set_vcpu_regs()
  - hcall_notify_ioreq_finish()
  - shell_vcpu_dumpreq()

Tracked-On: #861
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-07 20:22:42 +08:00
Minggui Cao
9922c3a7f5 HV: correct COM_IRQ default config type
change the config type of COM_IRQ from "hex" to "int"; make
it consistent with its default value.

Tracked-On: #2689
Signed-off-by: Minggui Cao <minggui.cao@intel.com>
Reviewed-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
2019-03-07 17:52:56 +08:00
Yan, Like
741501c2e3 hv: refine vlapic_calc_dest()
This commit extracts the common logic of vlapic_calc_dest() and vlapic_calc_dest_lapic_pt()
to static inline functions, in order to make vlapic_calc_dest() clean and easy to read.

Tracked-On: #1842
Signed-off-by: Yan, Like <like.yan@intel.com>
2019-03-06 11:43:51 +08:00
Li, Fei1
ca3d4fca55 hv: vlapic: move LVT IRQ vector check to vlapic_fire_lvt
We could simple the vector check for LVT IRQ by move this check to
vlapic_fire_lvt when the IRQ is fixed mode.

Tracked-On: #1842
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2019-03-05 13:33:36 +08:00
Li, Fei1
473d31c073 hv: vlapic: add vector check for x2apic SELF IPI
Set when the local APIC detects an illegal vector (one in the range 0 to 15)
in the message that it is sending. This occurs as the result of a write to the
ICR (in both xAPIC and x2APIC modes) or to SELF IPI register (x2APIC mode only)
with an illegal vector.

Tracked-On: #1842
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-05 13:33:36 +08:00
Li, Fei1
e5d3a49894 hv: vlapic: call vlapic_accept_intr directly in vlapic_set_error
LVT ERROR is an edge and fixed mode interrupt. We could call vlapic_accept_intr
to fire it directly. Otherwise, if LVT ERR vector is invalid, an invalid
interrupt will be accepted in IRR.

Tracked-On: #1842
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2019-03-05 13:33:36 +08:00
Zide Chen
2b35c07857 hv: do EPT mapping only for physical memory backed GPA on pre-launched VMs
Currently for pre-launched VMs, HV intends to do EPT mapping for all GPA
space, which implies that it wastes HPA to back PCI hole and other vE820
entries that are not backed by physical memory.

This patch solves this issue and fixes ve820 entries whose length is not
aligned to 4K, and changes the lowmem entry's start GPA from 1MB to 2MB.

Tracked-On: #2587
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2019-03-05 10:05:24 +08:00
Shiqing Gao
da14c96135 hv: simplify get_primary_vcpu and vcpu_from_vid
This patch simplifies `get_primary_vcpu` and `vcpu_from_vid`.
The target_vcpu could be get from the index directly.

Tracked-On: #1842
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-04 13:45:02 +08:00
Li, Fei1
3d0d8609cc hv: vlapic: correct wrong use of vector
Correct wrong use of vector where lvt_index should be used.

Tracked-On: #1842
Signed-off-by: Min He <min.he@intel.com>
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2019-03-04 13:44:15 +08:00
Xinyun Liu
0943a836bd [hv] set ECX.bit31 to indicate the presence of a hypervisor
ECS.bit31 is not used and always return 0 in SDM Vol.2A 3-195. It's a
standard way to indicate whether there is a hypervisor.

Tracked-On: #2490
Ref: https://lwn.net/Articles/301888/
Signed-off-by: Xinyun Liu <xinyun.liu@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2019-03-04 13:43:48 +08:00
Sainath Grandhi
f6758fd621 hv: fix a redundant check in general_sw_loader
vcpu returned by get_primary_vcpu API is BSP vcpu of the VM. So
checking is_vcpu_bsp on vcpu is redundant.

Tracked-On: #2668
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
2019-03-04 10:08:20 +08:00
Sainath Grandhi
b49df10a23 hv: Remove redundant get_dmar_info API calls
get_dmar_info API is called from multiple functions in vtd.c. This patch
calls get_dmar_info once during init and uses the cached info during
runtime.

Tracked-On: #2657
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-02 07:10:25 +08:00
Mingqiang Chi
308d4e8c4e hv:move forward the initialization for iommu & ptdev
move 'init_iommu()' & 'ptdev_init()' before starting
all secondary cores to avoid access uninitialized resource
in partition mode.

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-02 07:10:12 +08:00
dongshen
6794660e4f HV: use the common functions defined in vdev.c to reduce duplicate code
Both sharing mode and parittioin mode code can use the pci_find_vdev_by_pbdf
and pci_find_vdev_by_vbdf functions defined in vdev.c instead,
and remove the corresponding functions in other files.

Tracked-On: #2534
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-01 14:12:14 +08:00
dongshen
be3fbaa461 HV: add generic vdev functions to vdev.c
Add vdev functions so they can be reused by both partition mode
and sharing mode code:
pci_find_vdev_by_vbdf: search for vdev by virtual bdf
pci_find_vdev_by_pbdf: search for vdev by physical bdf

Tracked-On: #2534
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-01 14:12:14 +08:00
dongshen
731b0444b1 HV: rename core.c to vdev.c
core.c contains functions all related to pci vdev management, so it makes sense
to give it a more meaningful file name.

Tracked-On: #2534
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-01 14:12:14 +08:00
dongshen
819bcec693 HV: remove sharing_mode_vdev_array from sharing_mode.c
Sharing mode has its own static global variables to store
number of vdevs and vdev list, we already have the per vpci pci_vdev[]
in struct acrn_vpci, so use the vpci_vdev in acrn_vpci instead to unify
the vdev list management for both sharing mode and partition mode.

Tracked-On: #2534
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-01 14:12:14 +08:00
dongshen
00f9b85072 HV: move pci_vdevs[] array from vm.h to vpci.h
pci_vdevs is vpci stuff so it would be better to make it managed by vpci rather than by vm.h,
both sharing mode and partition mode can use pci_vdevs[] to maintain its own
per vm vdev list.

Tracked-On: #2534
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-01 14:12:14 +08:00
Victor Sun
ff65a10391 HV: vm_configs array refinement
- merge sharing_config.c and partition_config.c to vm_config.c;

- make vm_configs[] static;

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-01 10:32:49 +08:00
Victor Sun
0d90515bf6 HV: refine is_lapic_pt
- Do not refer vm_configs[] directly in vm module;

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-01 10:32:49 +08:00
Victor Sun
1bb15c64a6 HV: modularization vm config code
- move sanitize_vm_config() from vm.c to vm_config.c;

- move get_vm_config() from vm.h to vm_config.h;

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-01 10:32:49 +08:00
Jian Jun Chen
c69dab0a11 hv: add support of EPT mapping of high MMIO
Enlarge hypervisor BSS section to support EPT mapping of additional
1G address space. This is used to support 64bit PCI bar whose address
is strictly above 4G.

Tracked-On: #2577
Signed-off-by: Jian Jun Chen <jian.jun.chen@intel.com>
Reviewed-by: Yu Wang <yu1.wang@intel.com>
Reviewed-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-02-28 18:33:11 +08:00
Minggui Cao
a89c41dd4c HV: cleanup header files under hypervisor/common
it removes hypervisor.h and just includes needed header files.

Tracked-On: #1842
Signed-off-by: Minggui Cao <minggui.cao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-02-28 14:59:22 +08:00
Minggui Cao
3cb5542b0a HV: cleanup header files under hypervisor/dm
it removes hypervisor.h and just includes needed header files.

Tracked-On: #1842
Signed-off-by: Minggui Cao <minggui.cao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-02-28 14:59:22 +08:00
Mingqiang Chi
e38ff18be3 hv:cleanup header files for release folder
cleanup release folder, only include some necessary
header files,doesn't include hypervisor.h

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>

	modified:   release/console.c
	modified:   release/dump.c
	modified:   release/hypercall.c
	modified:   release/logmsg.c
	modified:   release/npk_log.c
	modified:   release/profiling.c
	modified:   release/trace.c
	modified:   release/vuart.c
2019-02-28 12:52:36 +08:00
yuhong.tao@intel.com
3b2784ec1b HV: CAT: support config CAT from acrn_vm_config
When CAT is supported, UOS can setup acrn_vm_config.clos, to use CAT
feature. Eg.,

struct acrn_vm_config vm_configs[CONFIG_MAX_VM_NUM] = {
    {
        .guest_flags |= CLOS_REQUIRED,
        .clos = 1,
    },
};

sanitize_vm_config() will check if CAT is supported and
vm_configs.clos is valid.

Tracked-On: #2462
Signed-off-by: Tao Yuhong <yuhong.tao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-02-28 11:22:29 +08:00
yuhong.tao@intel.com
43ee5590a4 HV: CAT: capability enumaration
Enumarate capability of Cache Allocation Technology(CAT) on X86 platform,
when HV init the primary cpu. If CAT is supported, store its info
to global struct cat_hw_info.

Tracked-On: #2462
Signed-off-by: Tao Yuhong <yuhong.tao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-02-28 11:22:29 +08:00
yuhong.tao@intel.com
cf524e684d HV: CAT: add platform specified info for CLOS
IF CAT is supported, and we want setup initial values to
IA32_Type_MASK_n MSRs, We can define a global structure
platform_clos_array[PLATFORM_CLOS_NUM], it has 2 members:

1.msr_index, the MSR address of IA32_Type_MASK_n
2.clos_masky, the initial valuses

Global varible platform_clos_num is the number of  IA32_Type_MASK_n,
from IA32_Type_MASK_0 to IA32_Type_MASK_<CLOS_MAX_NUM - 1>

Tracked-On: #2462
Signed-off-by: Tao Yuhong <yuhong.tao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-02-28 11:22:29 +08:00
Li, Fei1
2e60adef7c hv: vmcs: simplify update EOI-exit bitmap
1) The previous implementaion will recalculate the whole EOI-exit bitmap for
each RTE once the destination, trigger mode, delivery mode or vector of a RTE
has changed and update the EOI-exit bitmap for each vcpu of the VM.
In this patch, only set the corresponding bit of EOI-exit bitmap for
a vcpu when a level triggered interrupt has accepted in IRR or clear the
corresponding bit of EOI-exit bitmap for a vcpu when a dege triggered interrupt
has accepted in IRR which means only update a bit of EOI-exit bitmap in a vcpu
when updating TMR.
2) Rename set eoi_exit related API to set eoi_exit_bitmap.

Tracked-On: #1842
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-02-27 15:28:37 +08:00
Mingqiang Chi
501b3f7e82 hv:cleanup header files for debug folder
cleanup debug folder, only include some necessary
header files,doesn't include hypervisor.h

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>

	modified:   debug/console.c
	modified:   debug/dbg_cmd.c
	modified:   debug/dump.c
	modified:   debug/hypercall.c
	modified:   debug/logmsg.c
	modified:   debug/npk_log.c
	modified:   debug/printf.c
	modified:   debug/profiling.c
	modified:   debug/sbuf.c
	modified:   debug/shell.c
	modified:   debug/string.c
	modified:   debug/trace.c
	modified:   debug/uart16550.c
	modified:   debug/vuart.c
	modified:   include/debug/console.h
	modified:   include/debug/vuart.h
2019-02-27 11:12:48 +08:00
Mingqiang Chi
511d4c158b hv:cleanup console.h
--move several uart API declarations from console.h to uart16550.h
 --move several shell API declarations from console.h to shell.h
 --add dbg_cmd.h, move 'handle_dbg_cmd' declaration from console.h
   to dbg_cmd.h
 --move debug/uart16550.h to include/debug/uart16550.h since some
   uart APIs will be called by external files

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>

	modified:   arch/x86/guest/vm.c
	modified:   arch/x86/init.c
	modified:   bsp/uefi/cmdline.c
	modified:   debug/console.c
	modified:   debug/dbg_cmd.c
	modified:   debug/uart16550.c
	modified:   debug/vuart.c
	modified:   hw/pci.c
	modified:   include/arch/x86/multiboot.h
	modified:   include/debug/console.h
	new file:   include/debug/dbg_cmd.h
	new file:   include/debug/shell.h
	renamed:    debug/uart16550.h -> include/debug/uart16550.h
2019-02-27 11:12:48 +08:00
Zide Chen
cca87579f9 hv: remove the duplicated init_vm_boot_info() for partition mode
In terms of parsing multboot info, the differences between pre-launched VM
and SOS are minor:

- pre-launched VMs don't take bootargs from multiboot info.
- The kernel_load_addr is different between pre-launched VMs and SOS.

This patch removes the partition mode specific init_vm_boot_info(), and
handle SOS and pre-launched VMs differently in one single init_vm_boot_info().

Also, this makes ramdisk available for pre-launched VMs.

Tracked-On: #2587
Signed-off-by: Zide Chen <zide.chen@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2019-02-27 09:54:42 +08:00
Zide Chen
cf1515d63c hv: optimize the assignment of load addresses for multiboot images
bootargs_load_addr (GPA) and zero page which locates at one page follows it:
- SOS: currently it's fixed at 0x24EFC000. Theoretically, this address may
  not exist if the system has small memory size.
- pre-launched VMs: currently it's at (vm_config->memory.size - 8KB).
  It doesn't work if the guest has been assigned for more than 4GB memory
  size, because zero page must be under 4GB.
- This patch reserves 8KB for bootargs_load_addr right before kernel_load_addr
  for either SOS or pre-launched VMs.

ramdisk_load_addr (GPA):
- pre-launched VMs: currently it doesn't allow ramdisk.
- SOS: currently it's assigned at mods[].mm_mod_start. It's a bug because it
  misses the hpa2gpa() conversion.
- This patch puts ramdisk_load_addr right after (kernel_load_addr + kernel_size),
  which has 2 benefits:
  - for pre-launched VMs, mods[].mm_mod_start may be out of its GPA range.
  - it may be better to consolidate everything (bootarg, kernel, ramdisk) in
    consecutive GPA, other than spread them out in different places.

Tracked-On: #2587
Signed-off-by: Zide Chen <zide.chen@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
Reviewed-by: Victor Sun <victor.sun@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2019-02-27 09:54:42 +08:00
Qi Yadong
3f0ff2ec43 hv: search additional argument when parsing seed from ABL
Due to ABL design change, it will reword the "dev_sec_info.param_addr="
to "ABL.svnseed" in command line.

Tracked-On: #2611
Signed-off-by: Qi Yadong <yadong.qi@intel.com>
Acked-by: Zhu Bing <bing.zhu@intel.com>
2019-02-26 18:38:45 +08:00
Victor Sun
f5504e8077 HV: vpci_vdev_array cleanup
remove vpci_vdev_array in vm_config struct as it is not used any more;

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-02-26 17:04:49 +08:00
Victor Sun
a25f1a4060 HV: remove default folder in configs
Add sos_vm.h as a template in configs folder and is linked to
configs/$(CONFIG_BOARD)/sos_vm.h.

If customer need a board specific sos_vm.h, make a copy in
configs/$(CONFIG_BOARD)/ and replace the symbol link.

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-02-26 17:04:49 +08:00
Victor Sun
f9b5e21bdc HV: rename board name of up2 to apl-up2
The Kconfig file of UP2 board was named as up2.config, rename to apl-up2.config
to make it consistent with naming of apl-mrb/kbl-nuc ...

The name change is also applied in Makefile to make sure compile success.

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-02-26 17:04:49 +08:00
Zide Chen
94e1227559 hv: code style fix for partition mode specific code
There are still some misra-c violations when CONFIG_PARTITION_MODE is defined.

arch/x86/configs:
- remove the unused macro: PRE_LAUNCH_VM_NUM
- pt_dev.c: VMx_CONFIG_PCI_PTDEV_NUM has been defined in partition_config.h,
  should not hard code them again in pt_dev.c.
- ve820.c: use "UL" suffix instead of "U" for 64 bits variables.

vmid is uint16_t in ACRN, so vuart_vmid should be uint16_t as well.

Fix another few other miscellaneous misra-c violations.

Tracked-On: #861
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-02-26 14:00:32 +08:00
Tianhua Sun
8478a328a3 HV: return an error code when REQ state mismatch in acrn_insert_request
This issue is triggered when launch fuzzing test.
Fuzzing test thread will call destroy_vm(IC_DESTROY_VM)
to set the guest vCPU state to VCPU_ZOMBIE then VCPU_INIT
and then VCPU_OFFLINE, it will cause post-work can't resume
the guest vCPU and can't changes the state of the
corresponding I/O request slot to REQ_STATE_FREE.

so replace improper use of ASSERT with return error code.

Tracked-On: #2606
Signed-off-by: Tianhua Sun <tianhuax.s.sun@intel.com>
Reviewed-by: Yonghua Huang <yonghua.huang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-02-26 09:23:24 +08:00
Li, Fei1
987ddafa6b hv: vlapic: refine apicv_post_intr to internal function
Rename vlapic_post_intr to apicv_post_intr and move it to internal function
since it's only used in vlaic.c.

Tracked-On: #1842
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2019-02-25 14:17:27 +08:00
Li, Fei1
5dd6e79fe7 hv: vlapic: refine vlapic_enabled to internal function
Since it's only used in vlaic.c

Tracked-On: #1842
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-02-25 14:17:27 +08:00
Li, Fei1
e218efd576 hv: vm: move vm_active_cpus to vm.h
Move vm_active_cpus from vlapic.c to vm.h since it's vm related
not vlapic related.

Tracked-On: #1842
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-02-25 14:17:27 +08:00
dongshen
8bc0e128a9 HV: remove pbdf from struct pci_vdev
pci_vdev contains a pointer to pdev, which stores pbdf, so there is no need
to store a separate pbdf in vdev.

Tracked-On: #2534
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-02-25 09:03:09 +08:00
dongshen
4d11985366 HV: define function bdf_is_equal() to compare bdf
Use a function to compare bdf instead and some related code cleanup

Tracked-On: #2534
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-02-25 09:03:09 +08:00
dongshen
028663537a HV: fix comments issue
Fix typo/formatting for comments

Tracked-On: #2534
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-02-25 09:03:09 +08:00
dongshen
1454dd371d HV: this patch fixes bar address non-zero checking for 64-bit bars
For 64-bit bars, previously the code will do bar size calculation only if the
lower 32-bit bar address is nonzero, changed to do bar size calculation when the whole
64-bit bar address is nonzero.

Tracked-On: #2534
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-02-25 09:03:09 +08:00
Zhi Jin
eee7d8e70a hv: debug: mark the mmio address for npk log as hv owned
Otherwise, page fault will be triggered when writing npk log
to these mmio addresses.

Tracked-On: #2589
Signed-off-by: Zhi Jin <zhi.jin@intel.com>
Reviewed-by: Yonghua Huang <yonghua.huang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-02-22 15:26:45 +08:00
Mingqiang Chi
bd1e7a46b3 hv:cleanup header files for arch folder
cleanup arch folder, only include some necessary,
doesn't include hypervisor.h

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>

	modified:   arch/x86/configs/apl-mrb/pt_dev.c
	modified:   arch/x86/configs/apl-mrb/ve820.c
	modified:   arch/x86/configs/dnv-cb2/pt_dev.c
	modified:   arch/x86/configs/dnv-cb2/ve820.c
	modified:   arch/x86/configs/partition_config.c
	modified:   arch/x86/configs/sharing_config.c
	modified:   arch/x86/cpu.c
	modified:   arch/x86/cpu_state_tbl.c
	modified:   arch/x86/e820.c
	modified:   arch/x86/gdt.c
	modified:   arch/x86/init.c
	modified:   arch/x86/ioapic.c
	modified:   arch/x86/irq.c
	modified:   arch/x86/lapic.c
	modified:   arch/x86/mmu.c
	modified:   arch/x86/notify.c
	modified:   arch/x86/page.c
	modified:   arch/x86/pagetable.c
	modified:   arch/x86/static_checks.c
	modified:   arch/x86/timer.c
	modified:   arch/x86/trampoline.c
	modified:   arch/x86/vmx.c
	modified:   arch/x86/vtd.c
	modified:   boot/include/acpi.h
	modified:   include/arch/x86/e820.h
	modified:   include/arch/x86/ioapic.h
2019-02-22 13:14:36 +08:00
Mingqiang Chi
ac7a8a7249 hv:merge MACROs E820_MAX_ENTRIES and NUM_E820_ENTRIES
merge E820_MAX_ENTRIES and NUM_E820_ENTRIES
to E820_MAX_ENTRIES.

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
2019-02-22 13:14:36 +08:00
Binbin Wu
02ae775bfa hv: pae: fix a issue of loading pdptrs when handle cr4
PDPTE registers should be loaded in PAE paging mode.
However, current code load PDPTE registers in long mode.

Tracked-On: #2561
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-02-21 18:54:22 +08:00
Binbin Wu
253852419a hv: pae: fix bug when calculate PDPT address
There are two bugs related to PDPT address calculation for PAE mode.

1. Current code doesn't ignore the "Ignored" fileds when load pdpt registers.
Mask the "Ignored" fileds according to SDM Figure 4-7 Vol3.

2. Current code only ignores 4bits instead of 5bits in low "Ignored" filed when
calculate PDPT address in PAE mode for guest memory address translation.

Tracked-On: #2561
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-02-21 18:54:22 +08:00
Tw
5300e91188 config: enable parsing dmar table dynamically on UP2
We need to parse dmar table on UP2+SBL, otherwise all
the interrupts from IOAPIC don't work.

Tracked-On: #2572
Signed-off-by: Tw <wei.tan@intel.com>
Reviewed-by: Binbin Wu <binbin.wu@intel.com>
2019-02-21 13:25:10 +08:00
Mingqiang Chi
b24a8a0f59 hv:cleanup header file for guest folder
cleanup arch/x86/guest, only include some necessary
header files, doesn't include hypervisor.h

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
	modified:   arch/x86/guest/assign.c
	modified:   arch/x86/guest/ept.c
	modified:   arch/x86/guest/guest_memory.c
	modified:   arch/x86/guest/instr_emul.c
	modified:   arch/x86/guest/io_emul.c
	modified:   arch/x86/guest/pm.c
	modified:   arch/x86/guest/trusty.c
	modified:   arch/x86/guest/ucode.c
	modified:   arch/x86/guest/vcpu.c
	modified:   arch/x86/guest/vcpuid.c
	modified:   arch/x86/guest/virq.c
	modified:   arch/x86/guest/virtual_cr.c
	modified:   arch/x86/guest/vlapic.c
	modified:   arch/x86/guest/vm.c
	modified:   arch/x86/guest/vmcall.c
	modified:   arch/x86/guest/vmcs.c
	modified:   arch/x86/guest/vmexit.c
	modified:   arch/x86/guest/vmsr.c
	modified:   arch/x86/guest/vmtrr.c
	modified:   arch/x86/pm.c
	modified:   include/arch/x86/guest/assign.h
	modified:   include/arch/x86/guest/ept.h
	modified:   include/arch/x86/guest/guest_memory.h
	modified:   include/arch/x86/guest/instr_emul.h
	modified:   include/arch/x86/guest/io_emul.h
	modified:   include/arch/x86/guest/trusty.h
	modified:   include/arch/x86/guest/vcpu.h
	modified:   include/arch/x86/guest/vmcs.h
	modified:   include/arch/x86/io_req.h
	modified:   include/arch/x86/irq.h
	modified:   include/arch/x86/lapic.h
	modified:   include/arch/x86/mmu.h
	modified:   include/arch/x86/pgtable.h
	modified:   include/common/ptdev.h
	modified:   include/debug/console.h
2019-02-21 10:38:30 +08:00
Mingqiang Chi
75f6cab554 hv:cleanup header file for per_cpu.h
remove hypervisor.h from per_cpu.h

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
2019-02-21 10:38:30 +08:00
Mingqiang Chi
c093638bf6 hv:merge two header files to one with the same name
merge include/arch/x86/irq.h and include/common/irq.h
-->   include/arch/x86/irq.h

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
2019-02-21 10:38:30 +08:00
Mingqiang Chi
04c30fb380 hv:move 2 APIs from hypervisor.h to guest_memory.c
move gva2hva() & hva2gpa() to guest_memory.c,
we will remove hypervisor.h in the future.

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
2019-02-21 10:38:30 +08:00
Binbin Wu
827fffedda hv: exception: fault type exception should set resume flag in rflags
According to SDM 17.3.1.1, for any fault-class exception except a
debug exception generated in response to an instruction breakpoint,
the value pushed for RF is 1.

This patch set Resume Flag for fault class exceptions.

Tracked-On: #2405
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-02-20 13:21:45 +08:00
Peter Fang
caab595ed4 hv: vlapic: properly initialize DCR
DCR is initialized to 0 which means divisor shift is 1. Currently, both
are initialized to 0 which result in incorrect APIC timer counts if the
vLAPIC's DCR is never programmed.

This bug was exposed by OVMF because OVMF does not program DCR during
LAPIC initialization.

Tracked-On: #2543
Signed-off-by: Peter Fang <peter.fang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-02-19 09:43:55 +08:00
Binbin Wu
2fd6e119ca hv: vmcall: hv should not change guest RAX vmcall is undefined
HV passes the return value of vmcall by register RAX unconditionally.
However, if the vmcall is undefined for a guest, RAX value of guest vcpu
should not be changed.

According to SDM Vol. 3C 30-9, VMCALL is allowed from any CPL in guest.
VMCALL is NOT allowed from  CPL > 0 in vmx root mode.
ACRN hypervisor doesn't call VMCALL in vmx root mode, though.

In current code, ACRN also deny VMCALL from CPL > 0 in guest.
So for this case, #GP will not be injected, instead, modify the RAX to
notify the return value.

Tracked-On: #2405
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-02-18 11:56:42 +08:00
Binbin Wu
3e0c0550a4 hv: vmcall: unsupported vmcall from UOS should be handle first.
ACRN HV hide VMX capability from guest. Only vmcall from SOS or some
specific vmcall from UOS are allowed.
Unsupported vmcall from UOS should be considered a "not in VMX operation" case,
and should be handled first according to SDM Vol. 3C 30-9.

Tracked-On: #2405
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-02-18 11:56:42 +08:00
Arindam Roy
f660d9cf80 HV: Remove snoopy_mem from iommu
Removed the remaining reference of acrn vm from
inside of vtd.c.
Removed usage of snoopy_mem, and added code to achieve
the same using iommu_snoop.
Initialize iommu_snoop to true in create deault iommu.

Tracked-On: #2496
Signed-off-by: Arindam Roy <arindam.roy@intel.com>
2019-02-14 10:16:21 +08:00
Arindam Roy
de8d85753e HV: Modularize vtd.c to remove acrn_vm usage
This patch is a modified one. It removes the usage
of acrn_vm struct from inside vtd.c.
It also puts struct iommu_domain inside vtd.h,
from vtd.c.
It modifies the signature of init_iommu_domain
in order to remove dependency on acrn_vm from
inside vtd.c.
Incorporated comments from Jason and Eddie.
Changed the name of sos_vm_domain to
fallback_iommu_domain
Removed any reference of sos_vm from vtd.[c|h]
files, including comments.

Tracked-On: #2496
Signed-off-by: Arindam Roy <arindam.roy@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
2019-02-06 08:53:46 +08:00
Yonghua Huang
c855b78230 hv:refine coding style for trusty_hypercallc.
remove some redundant code

Tracked-On: #861
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-02-03 15:06:05 +08:00
Mingqiang Chi
229fbdd81d hv:cleanup header file for vcpu.c & vcpu.h
For vcpu.c and vcpu.h,only include some necessary
header files, doesn't include hypervisor.h

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-02-03 13:50:42 +08:00
Mingqiang Chi
3d878a9123 hv:cleanup header file for vm.c & vm.h
-- now hypervisor.h is the universal set of header file,
   this patch doesn't include hypervisor.h, only include
   some necessary header files for vm.c and vm.h
-- move 'struct vcpuid_entry' from vm.h to vcpuid.h
-- remove dead code 'enum vm_privilege_level'
-- move 'enum vpic_wire_mode' from vm.h to vpic.h

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-02-03 13:50:42 +08:00
Shiqing Gao
b5f4757650 hv: refine guest.h
- move functions related vmexit from `guest.h` to `vmexit.h`
- move functions related msr from `guest.h` to `msr.h`
- move functions related vm_sw_loader from `guest.h` to `vm.h`
- move function `vmx_vmrun` from `guest.h` to `vcpu.h`
- move MACROs related to vcpu from `guest.h` to `vcpu.h`
- move MACRO `E820_MAX_ENTRIES` from `guest.h` to `e820.h`
- move MACROs related to irq from `guest.h` to `irq.h`
- rename `guest.h` to `guest_memory.h`

Tracked-On: #2503
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-02-03 13:00:42 +08:00
Victor Sun
827d24ccb9 HV: repace vpci_vdev_array with pci_ptdev config
Use acrn_vm_pci_ptdev_config struct for PCI PT devices configuration
in acrn_vm_config, the only needed configure item is PT devices's
vBDF and pBDF info. When init PT devices, the BDF info will be stored
in pci_vdevs[] of acrn_vm.

With this patch, the previous vpci_vdev_array struct is not needed.

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-02-03 08:18:54 +08:00
Mingqiang Chi
af1e5d5742 hv:remove several redundancy variables related memory
Remove redundancy code since they are not used now.
-- remove 'max_ram_blk_base' & 'max_ram_blk_size' in
   struct e820_mem_params
-- remove 'gpa_lowtop' in struct vm_hw_info
-- remove MACRO 'UOS_DEFAULT_START_ADDR'

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-02-02 22:59:34 +08:00
Victor Sun
d05af3526f HV: vm description clean up
The partition mode vm config in vm_description.c is abandoned,
so delete the file. Its related struct in vm.h is also removed;

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-02-02 17:41:33 +08:00
Victor Sun
55efc763ae HV: switch vm configs array for partition mode
The previous VM configs array for partition mode is inside struct of
vm_config_partition and named as vm_config_array[], now switch to
global vm_configs[];

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-02-02 17:41:33 +08:00
Victor Sun
9e33178998 HV: add vm config files for partition mode
Add VM configure files for Intel apl-mrb and dnv-cb2 platforms.

The board specific config header is named as partition_config.h and
the PCI passthrough device list is named as pt_dev.c under
hypervisor/arch/x86/configs/$CONFIG_BOARD folder.

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-02-02 17:41:33 +08:00
dongshen
f4adb109de HV: store a pointer to pdev instead to save memory.
As we store the physical pci device info in a global pdev array, the vdev struct can
store a pointer to pdev instead.

Tracked-On: #2431
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Reviewed-by: Anthony Xu <anthony.xu@intel.com>
2019-02-02 15:24:43 +08:00
Victor Sun
6ba07e64b9 HV: remove ptdev ops init in vm description
The ptdev ops will be initialized automatically during ptdev init, so
remove the hardcoded ops in vm_description.c

Tracked-On: #2431
Signed-off-by: Victor Sun <victor.sun@intel.com>
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Reviewed-by: Anthony Xu <anthony.xu@intel.com>
2019-02-02 15:24:43 +08:00
Victor Sun
69d883560a HV: remove bar info in vm description
We have enabled bar decoding in init ptdev, so hard-coded bar info is not needed
any more.

Tracked-On: #2431
Signed-off-by: Victor Sun <victor.sun@intel.com>
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Reviewed-by: Anthony Xu <anthony.xu@intel.com>
2019-02-02 15:24:43 +08:00
Victor Sun
f082176df0 HV: init ptdev bar during runtime for partition mode
Current pt devices bar info for partion mode is hardcoded in
vm_description.c, now we remove the hardcoded info and parse the bar
info during pt devices init.

Tracked-On: #2431
Signed-off-by: Victor Sun <victor.sun@intel.com>
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Reviewed-by: Anthony Xu <anthony.xu@intel.com>
2019-02-02 15:24:43 +08:00
dongshen
983b717a61 HV: use the cached pci device info for sharing mode
Tracked-On: #2431
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Reviewed-by: Anthony Xu <anthony.xu@intel.com>
2019-02-02 15:24:43 +08:00
dongshen
e0f9d14011 HV: scan all physical PCI devices and store all needed info in array
Tracked-On: #2431
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Signed-off-by: Victor Sun <victor.sun@intel.com>
Reviewed-by: Anthony Xu <anthony.xu@intel.com>
2019-02-02 15:24:43 +08:00
dongshen
65f9370d76 HV: move struct pci_bar and pci_pdev to pci.h
Tracked-On: #2431
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Reviewed-by: Anthony Xu <anthony.xu@intel.com>
2019-02-02 15:24:43 +08:00
Victor Sun
0f745b4d15 HV: e820 refinement
- add e820 info in struct acrn_vm;

- rename rebuild_sos_vm_e820() to create_sos_vm_e820();

- add create_prelaunched_vm_e820() for partition mode;

- rename create_e820_table() to create_zeropage_e820() and merge for
  both sharing mode and partition mode;

- move create_xxx_vm_e820() to vm.c;

- move create_zeropage_e820() to vm_load.c;

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-02-02 11:53:37 +08:00
Victor Sun
11bfe3d43e HV: move e820 entry out of vm description
move e820_default_entries[] from vm_description.c to ve820.c and rename
to ve820_entry[] as a temparary solution for partiton mode e820 management;

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-02-02 11:53:37 +08:00
Li, Fei1
ce19dd423e hv: vlapic: make vlapic deliver interrupt related functions more readable
Rename vlapic_deliver_intr to vlapic_receive_intr: ioapic/msi device
deliver an interrupt to lapic.
Rename vlapic_pending_intr to vlapic_find_deliverable_intr: find a
deliverable interrupt which pending in irr and its priority large than ppr.
Rename vlapic_intr_accepted to vlapic_get_deliverable_intr: get the deliverable
interrupt from irr and set it in isr (which also raise ppr update)

Tracked-On: #1842
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2019-02-02 09:31:49 +08:00
Yonghua Huang
123c2b5fa4 hv: rename MACROs 'VMX_CRx_MASK"
CRx 'guest/host mask' is widely used when talking
  about CR0/CR4 virtualization in SDM spec,
  rename them to 'VMX_CRx_GUEST_HOST_MASK'.

Tracked-On: #861
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-02-01 16:49:39 +08:00
Shiqing Gao
49623fc073 hv: refine guest.c
- move `vcpumask2pcpumask` from `guest.c` to `vcpu.c`
- move `prepare_sos_vm_memmap` from `guest.c` to `vm.c`
- rename `guest.c` to `guest_memory.c`

Tracked-On: #2484
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-02-01 16:30:55 +08:00
Sainath Grandhi
f122d6bd32 hv: Add Interrupt Remapping Enable/Disable APIs
This patch adds IR enable/disable APIs. Upon boot, enabling IR is
deferred until the first interrupt source is programmed. This is done
for UEFI platforms as UEFI bootloader depends on timer interrupt and
the programming of timer interrupt source is done before ACRN gets a
chance to run during boot.

Tracked-On: #2426
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2019-02-01 15:54:55 +08:00
Sainath Grandhi
970821462b hv: Use Interrupt Remapping format for programming interrupt sources
When a corresponding IOMMU is found for the device, this patch adds
support to program Interrupt Remapping hardware RTEs and the original
interrupt sources (MSI or IOAPIC) with IR format.

Tracked-On: #2426
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
Reviewed-by: Binbin Wu <binbin.wu@intel.com>
2019-02-01 15:54:55 +08:00
Grandhi, Sainath
7104f0a512 hv: Add support to add IR tables
Interrupt Remapping hardware in x86 can hold 64K entries with each entry
of size 16 bytes. So 256 entries occupy 4K. Adding a configuration for
developer to choose number of IR entries, in multiples of 256. ACRN does
not boot on platforms that does not support Interrupt Remapping and
Extended Interrupt Mode

Tracked-On: #2426
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
Reviewed-by: Binbin Wu <binbin.wu@intel.com>
2019-02-01 15:54:55 +08:00
Grandhi, Sainath
cb46937bf5 hv: Enumerate IOAPIC info from DMAR table
IOAPIC info from DMAR table is needed to match the IOAPIC info from
MADT. This patch adds support to get id and bus, devfn for IOAPIC
from DMAR. IOAPIC info for SBL platform is hardcoded in the header
file.

Tracked-On: #2426
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
Reviewed-by: Binbin Wu <binbin.wu@intel.com>
2019-02-01 15:54:55 +08:00
Grandhi, Sainath
4ff9f5dfb2 hv: Enumerate IOAPIC info from MADT
IOAPIC info, specifically ID, is needed to map the IOAPIC to
corresponding DMAR. DMAR table in ACPI has a field that has IOAPIC
ID, that matches the info provided in MADT. Both (IOAPIC info from
MADT and from DMAR) is needed for remapping IOAPIC interrupts.

Tracked-On: #2426
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2019-02-01 15:54:55 +08:00
Grandhi, Sainath
fb6e9267f3 hv: Support Queued Invalidation
As we enable Interrupt Remapping Hardware in ACRN, Queued Invalidation
(QI) needs to be used clear DMAR hardware caches. This patch introduces
Queued Invalidation APIs. Code related to Register based Invalidation
is removed from ACRN and platforms that do not support QI cannot boot
with ACRN after this patch.

Tracked-On: #2426
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
Reviewed-by: Binbin Wu <binbin.wu@intel.com>
2019-02-01 15:54:55 +08:00
Min Lim
342d29eea8 profiling: fix the system freeze issue when running profiling tool
The msr load/restore during vmexit/vmentry is enabled in HV by
default. The profiling has assumption that it's only user for this
feature, which could overwrite of HV default setting.

This fix combine the msr load list for vmexit when profiling.

Tracked-On: #2422
Signed-off-by: Min Lim <min.yeol.lim@intel.com>
2019-02-01 13:21:15 +08:00
Min Lim
ec4dd2284c profiling: enable to capture dropped samples while buffering
Since the profiling utilizes the limited size of buffer to capture
sample data, dropping samples could happen while collecting data
if data is generated faster than flushing by consumer. Capturing
the dropped sample info is critical to understand how much the data
is reliable to use.

To capture the information, the new hypercall "PROFILING_GET_STATUS"
is introduced.

Tracked-On: #2474
Signed-off-by: Manisha Chinthapally <manisha.chinthapally@intel.com>
Signed-off-by: Min Lim <min.yeol.lim@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-02-01 11:44:04 +08:00
Yonghua Huang
0f5c6e2c18 HV: fix address type violation for MSR_LOAD/STORE
According to SDM 24.7.2, these two MSRs should be
  configured with physical address.

Tracked-On: #861
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-31 22:23:41 +08:00
Yan, Like
17f4cd18a3 hv: fix dest of IPI for CPU with lapic_pt
With lapic_pt based on vlapic, guest always see vitual apic_id.
We need to convert the virtual apic_id from guest to physical apic_id
before writing ICR.

SMP for VM with lapic_pt is supported with this fix.

Tracked-On: #2351
Signed-off-by: Yan, Like <like.yan@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-31 18:18:44 +08:00
yuhong.tao@intel.com
eb7091bb1f HV: add rdmsr/wrmsr debug cmd
Add these commands to  HV console:
1.rdmsr [-p<pcpu_id>] [msr_index]
  read MSR register, eg., 'rdmsr 0xc8f' read MSR with address 0xc8f;
  'rdmsr -p1 0xc8f' read MSR address 0xc8f, on PCPU1.

1.wrmsr [-p<pcpu_id>] [msr_index] [value]
  write to MSR register, eg., 'wrmsr 0xc8f 0x100000000' write
  0x100000000 to MSR, which address is 0xc8f;
  'wrmsr -p1 0xc8f 0x100000000' write 0x100000000 to MSR address
  0xc8f, on PCPU1.

Tracked-On: #2462
Signed-off-by: Tao Yuhong <yuhong.tao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-31 11:33:15 +08:00
yuhong.tao@intel.com
648450c62c HV: cpu: add msr_read_pcpu()& msr_write_pcpu()
Use smp_call_function() to read/write MSR register on target PCPU

Tracked-On: #2462
Signed-off-by: Tao Yuhong <yuhong.tao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-31 11:33:15 +08:00
Tw
39ffd29aa3 schedule: add magic number at the bottom of schedule stack
Add this magic number to prevent potential overflow when dumping
host stack.

Tracked-On: #2455
Signed-off-by: Tw <wei.tan@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-31 11:28:29 +08:00
Tw
efc64d778f hv: fix host call stack dump issue
As scheduler uses its own stack for now,
there is no need to check stack validity,
so wipe it out.

Tracked-On: #2455
Signed-off-by: Tw <wei.tan@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-31 11:28:29 +08:00
Li, Fei1
5214a60bbf hv: replace improper use of ASSERT with panic for parse_madt
ASSERT could be used in some situations, such as, there are some pre-assumption
for some code, using ASSERT here for debug. It could not be used for detect error
when system booting where panic should be used.

Tracked-On: #861
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-31 11:09:39 +08:00
Li, Fei1
9291fbe4d6 hv: multiboot: replace improper use of ASSERT with panic
ASSERT could be used in some situations, such as, there are some pre-assumption
for some code, using ASSERT here for debug. It could not be used for detect error
when system booting where panic should be used.

Tracked-On: #861
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@inte.com>
2019-01-31 11:09:39 +08:00
Li, Fei1
2474c60141 hv: replace improper use of panic with ASSERT
Panic should only be used when system booting. Once the system boot done,
it could never be used. While ASSERT could be used in some situations, such
as, there are some pre-assumption for some code, using ASSERT here for debug.

Tracked-On: #861
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@inte.com>
2019-01-31 11:09:39 +08:00
Mingqiang Chi
7da9161d7d hv:no need to use lock for the bit operations of local variable
Use bitmap_set_nolock/bitmap_clear_nolock instead of
bitmap_set_lock/bitmap_clear_lock for the local variable.

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-31 08:25:33 +08:00
Mingqiang Chi
2ffc683d01 hv: move some api declaration from mmu.h to ept.h
-- add ept.h, and move ept related api declaration
   from mmu.h to ept.h
-- move lookup_address()declaration from mmu.h to pgtable.h

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
2019-01-30 20:43:04 +08:00
Mingqiang Chi
615c2bf88b hv:move e820 related macro and structure to e820.h
move 'struct e820_entry' 'E820_TYPE_XXX' from mmu.h
to e820.h

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-30 20:43:04 +08:00
Mingqiang Chi
2b2dbe43d7 hv:move some files to guest folder
move the following files to guest folder:
renamed:    arch/x86/assign.c -> arch/x86/guest/assign.c
renamed:    arch/x86/ept.c -> arch/x86/guest/ept.c
renamed:    arch/x86/io_emul.c -> arch/x86/guest/io_emul.c
renamed:    arch/x86/trusty.c -> arch/x86/guest/trusty.c
renamed:    arch/x86/virq.c -> arch/x86/guest/virq.c
renamed:    arch/x86/virtual_cr.c -> arch/x86/guest/virtual_cr.c
renamed:    arch/x86/vmcs.c -> arch/x86/guest/vmcs.c
renamed:    arch/x86/vmexit.c -> arch/x86/guest/vmexit.c
renamed:    arch/x86/vmx_asm.S -> arch/x86/guest/vmx_asm.S
renamed:    include/arch/x86/assign.h ->
	    include/arch/x86/guest/assign.h
renamed:    include/arch/x86/io_emul.h ->
	    include/arch/x86/guest/io_emul.h
renamed:    include/arch/x86/trusty.h ->
            include/arch/x86/guest/trusty.h
renamed:    include/arch/x86/virtual_cr.h ->
            include/arch/x86/guest/virtual_cr.h
renamed:    include/arch/x86/vmcs.h -> include/arch/x86/guest/vmcs.h
renamed:    include/arch/x86/vmexit.h ->
            include/arch/x86/guest/vmexit.h

After these files movement, all the files in arch/x86 are native
hardware related, and all the files in arch/x86/guest are
virtualiztion related.

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
2019-01-30 20:43:04 +08:00
Mingqiang Chi
e9bb4267a7 hv:move vpic.h & vioapic.h to dm folder
move the following files to dm folder
renamed:    include/arch/x86/guest/vioapic.h -> include/dm/vioapic.h
renamed:    include/arch/x86/guest/vpic.h -> include/dm/vpic.h

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
2019-01-30 20:43:04 +08:00
Chaohong guo
89b6dc593f HV: MISRA clean in reloc.c
The patch is to fix MISRA violation in reloc.c by:
 - remove multi-returns in relocate();
 - remove non useful checking in relocate();
 - add suffix U to macro definition

Tracked-On: #861
Signed-off-by: Chaohong guo <chaohong.guo@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2019-01-30 20:40:11 +08:00
Minggui Cao
723ff1f4ee HV: modularization improve UEFI macro control code
1. in UEFI bsp code, not need UEFI macro; it is controlled in makefile.
2. in vm/acpi/interrupt code, unify the API name for SBL & UEFI.
3. remove unnecessary header including and unused code.

Tracked-On: #1842
Signed-off-by: Minggui Cao <minggui.cao@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
2019-01-30 16:11:39 +08:00
Binbin Wu
fea541bddf hv: exception: low prioirity exception inject fix
In current code, there is a logic bug when inject low priority
exceptions.
If guest irq enabled, low priority exception will not be injected to guest.
This patch fix the logic error, if there is no eligible vector before
handling low priority exceptions, then inject low priority exception if
any.

Tracked-On: #2405
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2019-01-29 13:13:38 +08:00
Binbin Wu
c6d2908f70 hv: vmexit: add handler for vmexit not supported for guest
Acrn doesn't support nested virtualization, so vmx operations should be
undefined opcode for guest.
Current code handle vmx operations with unhandled_vmexit_handler.
According to the spec, if guest execute vmx operation instruction, a #UD
exception should be inject.
This patch inject a #UD exception when guest execute vmx operation instruction.

Tracked-On: #2405
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2019-01-29 13:13:38 +08:00
Mingqiang Chi
cc2c0c3a9a hv:Move several inline APIs from vm.h to *.c
-- move vm_pic() from vm.h to vpic.c since it is
   only used in vpic.c
-- move vm_ioapic() from vm.h to vioapic.c
   change vioapic_reset(struct acrn_vioapic *vioapic) -->
          vioapic_reset(struct acrn_vm *vm)
   then vm_vioapic() is only used in vioapic.c
-- move vm_vuart() from vm.h to vuart.c,
   now this api is used in vuart.c and shell.c

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
2019-01-29 11:29:59 +08:00
Tw
61552458f0 Kconfig: enlarge range of maximum number of IOMMU
Some arches have more than two IOMMUs, so change this limitation.

Tracked-On: #2435
Signed-off-by: Tw <wei.tan@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2019-01-29 11:01:34 +08:00
Yan, Like
b038ade21c hv: fix misra-c violations in reused partition mode functions
Fixed violations in vlapic_x2apic_pt_icr_access()
- Procedure has more than one exit point;
- Value is not of appropriate type;
- Narrower init conversion without cast;
- Implicit conversion: actual to formal param (MR)
Fixed violation in switch_apicv_mode_x2apic()
- No space between if, while, for and expresn.

Tracked-On: #861
Signed-off-by: Yan, Like <like.yan@intel.com>
2019-01-29 09:50:07 +08:00
Yan, Like
e2cecfb560 hv: send IPI instead of irq injection to notify vcpu with lapic pt
For VM with local apic pt for realtime scenatios, we support virtio device with PMD backend.
But we still need to inject MSI to notify the front-end, to avoid changing the front-end drivers.

Since the lapic is passed through, irq injection to vlapic won't work.
This commit fix it by sending IPI with vector need to inject.

Tracked-On: #2351
Signed-off-by: Yan, Like <like.yan@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2019-01-28 19:47:33 +08:00
Yan, Like
16df57aa44 hv: don't remap msi for pt devices if lapic_pt
Since lapic is passed through, MSI/MSIx should be configured with the
vector allocated within guest OS, instead of physical vector allocated
in hypervisor.

Tracked-On: #2351
Signed-off-by: Yan, Like <like.yan@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2019-01-28 19:47:33 +08:00
Yan, Like
a073ebeeca hv: extend lapic pass-through for DM launched VM
This commit extend lapic pass-through for DM launched VM, generally for hard RT scenarios.
Similar to the partition mode, the vlapic is working under the xapic mode at first, only
when x2apic mode is enabled, lapic is passed through, because the physical LAPICs are
under x2apic mode.

Main changes includes:
- add is_lapic_pt() to check if a vm is created with lapic pt or not, to combine
  codes of partition mode and DM launched vm with lapic passthrough, including:
  - reuse the irq delievery function and rename it to dispatch_interrupt_lapic_pt();
  - reuse switch_apicv_mode_x2apic();
  - reuse ICR handling codes to avoid malicious IPI;
- intercept ICR/APICID/LDR msr access when lapic_pt;
- for vm with lapic passthrough, irq is always disabled under root mode.

Tracked-On: #2351
Signed-off-by: Yan, Like <like.yan@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-28 19:47:33 +08:00
Yonghua Huang
c853eb4bc2 hv: remove redundant code for virtual interrupt injection
- vlapic_pending_intr() is called only for case no
    APICv/VID(Virtual Interrupt Delivery) feature support,
    in this case, there is no need to test VID case.

  - remove 'apicv_pending_intr()' function.

Tracked-On: #2427
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-28 11:36:17 +08:00
Sainath Grandhi
6d5456a0df hv: Bit Representation for IOAPIC RTE
As we enable Interrupt Remapping, bit positions in IOAPIC RTEs
have a different syntax for programming. ACRN should handle original
format for vIOAPIC as well IR representation for physical IOAPIC.
This patch adds bit granularity IOAPIC RTE.

Tracked-On: #2407
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
2019-01-26 23:25:34 +08:00
Sainath Grandhi
7d57eb056e hv: Add bit representation for MSI addr and data
As we enable Interrupt Remapping, bit positions in MSI address and
data registers have a different syntax for programming. This patch adds
bit granularity for MSI address and data structs.

Tracked-On: #2407
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
2019-01-26 23:25:34 +08:00
Mingqiang Chi
6825043078 hv:Move severl variable declaration for boot code
-- add header file ld_sym.h in include/arch/x86/boot/
-- move 'ld_bss_start/end' from cpu.h to ld_sym.h,
   avoid reverse dependency
-- move 'ld_text_end' from mmu.h to ld_sym.h
-- move 'ld_trampoline_load/start/end' to ld_sym.h

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2019-01-25 21:32:21 +08:00
Victor Sun
c20d095a63 HV: refine sos_vm config header
The sos_vm config under arch/x86/configs/$(CONFIG_BOARD) folder should be
customer specific configuration, leave it back to customer.

When hypervisor start building, it will check whether BOARD specific sos_vm.h
exist in configs/$(CONFIG_BOARD) folder. If exist, then include this header;
if not, then include default sos_vm config header under configs/default folder.

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-25 21:30:49 +08:00