Commit Graph

5561 Commits

Author SHA1 Message Date
Qian Wang
928bc38bf6 hv: add NULL-pointer check for security
Added a check to prevent NULL-pointer dereference when
parsing PTCT.

Tracked-On: #5330

Signed-off-by: Qian Wang <qian1.wang@intel.com>
2020-09-27 18:52:52 +08:00
Liu Long
dec8c09d04 dm: fix fault Injection into VirtIO console backend
Add Null pointer check in init vq ring and add vq ring descriptor
 check in case cause Nullpointer exception.

Tracked-On: #5355
Signed-off-by: Liu Long <long.liu@intel.com>
Reviewed-by: Wang, Yu1 <yu1.wang@intel.com>
2020-09-27 18:42:31 +08:00
Yonghua Huang
ade53aa53a hv: fix potential NULL pointer dereference in 'memcpy_s'
'd' should be checked before calling 'memset()'.

Tracked-On: #5359
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
2020-09-27 18:40:55 +08:00
Jie Deng
e778acc3e0 virtio: add virtio callbacks check
This patch is back porting from mainline:

We can only call these callbacks when they are not NULL.

Tracked-On: #5357

Signed-off-by: Jie Deng <jie.deng@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2020-09-27 18:40:55 +08:00
Qian Wang
772ab3a95c hv: remove UNCACHED for pSRAM EPT memmap segment
We remove the UNCACHED bit for pSRAM EPT memmap segment,
otherwise access to pSRAM region may bypass pSRAM.

Tracked-On: #5330

Signed-off-by: Qian Wang <qian1.wang@intel.com>
Signed-off-by: Li Fei1 <fei1.li@intel.com>
2020-09-24 14:15:14 +08:00
Jian Jun Chen
0287b3c05a hv: pci: Hide PCI bridge 00:1c.0 from SOS
It is found that SOS will reset the PCI devices under PCI
bridge 00:1c.0 when 00:1c.0 is exposed to SOS. If a PCI
device under 00:1c.0 is passed through to pre-launched VM,
it will be reset by SOS at startup hence the passthrough
will not work properly. This patch provides a workaround
by hiding PCI bridge 00:1c.0 from SOS in this case.

Tracked-On: #5346
Signed-off-by: Jian Jun Chen <jian.jun.chen@intel.com>
2020-09-23 15:24:42 +08:00
dongshen
b2b1aee7fb acrn-config: fix hang issue for board EHL (hybrid_rt)
P2SB_BAR_ADDR related macros should only be defined in misc_cfg.h only when
p2sb is enabled in scenario xml.

Tracked-On: #5340
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
2020-09-22 10:02:45 +08:00
Shuang Zheng
4c55a2ad8e acrn-config: add the TSN device passthrough to pre-launched VM on TGL
add the TSN device in tgl-rvp board XML and configure it to
passthrough to pre-launched VM for hybrid_rt scenario on tgl-rvp.

Tracked-On: #5266

Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Reviewed-by: Victor Sun <victor.sun@intel.com>
2020-09-21 14:36:26 +08:00
Qian Wang
78f42ca16b dm: bug fix & code refine
1. Fix the bug that RTVM may fail to launch
when its allocated memory is too little and
makes use of pSRAM. Now we added an assert
to inform users to allocate enough memory
for RTVM.
2. Refined some codes.

Tracked-On: #5330

Signed-off-by: Qian Wang <qian1.wang@intel.com>
2020-09-21 14:20:54 +08:00
Qian Wang
793b99e3f6 hv: add method to deal with ">4G MMIO" BIOS option
1. Fixed the bug that HV may crush when ">4G MMIO"
BIOS option is disabled.
2. Fixed the bug that RTVM may encounter problems
at reboot time when it makes use of pSRAM
3. HV will skip PTCM initialization when it cannot
find PTCM.
4. Some codes are refined.

Tracked-On: #5330

Signed-off-by: Qian Wang <qian1.wang@intel.com>
2020-09-21 14:20:54 +08:00
Qian Wang
57a6d35188 dm: added fix-me for guest e820 initialization
Added a fix-me for guest e820 initialization.

Tracked-On: #5330

Signed-off-by: Qian Wang <qian1.wang@intel.com>
Signed-off-by: Li Fei1 <fei1.li@intel.com>
2020-09-21 14:20:54 +08:00
Qian Wang
8dfd59de5e dm: ptcm: add cmdline to enable PTCM
Add cmdline to enable PTCM.

Tracked-On: #5330

Signed-off-by: Qian Wang <qian1.wang@intel.com>
Signed-off-by: Li Fei1 <fei1.li@intel.com>
2020-09-21 14:20:54 +08:00
Qian Wang
0f6d33c479 dm: ptct: reserve e820 table
Reserve e820 Table for PTCT. Now for OVMF, we need do the reserve in OVMF.

Tracked-On: #5330

Signed-off-by: Qian Wang <qian1.wang@intel.com>
Signed-off-by: Li Fei1 <fei1.li@intel.com>
2020-09-21 14:20:54 +08:00
Qian Wang
c9d6565798 dm: ptct: pass through PTCT ACPI Table
Pass through PTCT ACPI Table to the guest which wants to use PTCT.
Now we assume the GPA of resources of the PTCT is equal to the HPA.

Tracked-On: #5330

Signed-off-by: Qian Wang <qian1.wang@intel.com>
Signed-off-by: Li Fei1 <fei1.li@intel.com>
2020-09-21 14:20:54 +08:00
Li Fei1
f94ad6aef7 hv: ptcm: enable ptcm by default
Enable PTCM by default if the platform support it. We could check it by whether
the PTCM ACPI Table is exist. Besides to parse the PTCM ACPI Table and call
PTCM command interface to init pSRAM on all CPU cores, we need to ignore
WBINVD to flush the cache of th pSRAM.

Tracked-On: #5330

Signed-off-by: Qian Wang <qian1.wang@intel.com>
Signed-off-by: Li Fei1 <fei1.li@intel.com>
Reviewed-by: Wang, Yu1 <yu1.wang@intel.com>
2020-09-21 14:20:54 +08:00
Li Fei1
7125c522ef hv: ptct: init psram on all cores
Call PTCM command interface to initialize pSRAM on all CPU cores.
Becuase HV need to call PTCM command interface which is not a HV code text,
now we WA to remove the NX for HV.

Tracked-On: #5330

Signed-off-by: Qian Wang <qian1.wang@intel.com>
Signed-off-by: Li Fei1 <fei1.li@intel.com>
Reviewed-by: Wang, Yu1 <yu1.wang@intel.com>
2020-09-21 14:20:54 +08:00
Li Fei1
8bc963a27c hv:ptct: add funtion to parse ptct acpi table
Add function to parse PTCT ACPI Table. For now, we need to parse:
1. Where's the PTCM_Binary
2. The range of pSRAM

Tracked-On: #5330

Signed-off-by: Qian Wang <qian1.wang@intel.com>
Signed-off-by: Li Fei1 <fei1.li@intel.com>
Reviewed-by: Wang, Yu1 <yu1.wang@intel.com>
2020-09-21 14:20:54 +08:00
Peter Fang
60456577bd OVMF release v2.2 (updated)
- ovmf: reserve e820 table for PTCM
- GvtGopDxe: Adjust the offset of gop in pvinfo page

Tracked-On: #5303
Signed-off-by: Peter Fang <peter.fang@intel.com>
2020-09-17 10:19:56 +08:00
Shuang Zheng
de0b588fff acrn-config: update config xmls to make ivshmem size in decimal MB
update config xmls to make ivshmem size in decimal MB at description
and values.

Tracked-On: #4853

Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
2020-09-16 14:49:20 +08:00
Shuang Zheng
08ca320130 acrn-config: make ivshmem size configured in decimal and MB
make ivshmem size configured in decimal and MB in config tool
UI and XMLs to simplify input from users.

Tracked-On: #4853

Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
2020-09-16 14:49:20 +08:00
Jian Jun Chen
ce2a82479b hv: vmsi: add default BAR GPA for vmsi over msi
No GPA is specified for the vmsi BAR in the case of vmsi over
msi. This patch hard coded the GPA as 0x80000000 which is the
base addr of 32bit PCI hole in the predefined e820 table of
pre-launched VM. This is a workaround and the final solution
is to enhance acrn-config tool to come up with the GPA for
these BARs.

Tracked-On: #5316
Signed-off-by: Jian Jun Chen <jian.jun.chen@intel.com>
2020-09-16 10:51:27 +08:00
Shixiong Zhang
a4832a0566 acrn-config: fix the issue of generating the vuart with incorrect name
When generate the launch scripts, the pm_by_vuart setting of pm_notify_channel
in launch setting should be according to the config of SOS vuart1.

Tracked-On: #5154

Signed-off-by: Shixiong Zhang <shixiongx.zhang@intel.com>
2020-09-16 10:23:02 +08:00
Shixiong Zhang
c38335c3b5 acrn-config: make the get available ttysn function shareable
Move the function which are used to get available ttysn
from board catalogue to library catalogue

Tracked-On: #5154

Signed-off-by: Shixiong Zhang <shixiongx.zhang@intel.com>
2020-09-16 10:23:02 +08:00
Zheng Shuang
bac0779579 Update doc/tutorials/using_hybrid_mode_on_nuc.rst
add space between VM0 and (Zephyr)

Co-authored-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
2020-09-15 08:34:18 -07:00
Shuang Zheng
ae8fb058f0 doc: update pre-launched VMs launched with offline ACPI
We use offline ACPI generator tool to create offline ACPI tables for
pre-launched VMs. Update getting start guide for hybrid and logical
partition mode to launch pre-launched VMs with offline ACPI binaries.

Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
2020-09-15 08:34:18 -07:00
Shuang Zheng
43670b03d5 acrn-config: move source code of IVSHMEM region name to ivshmem_cfg.h
move MACRO of IVSHMEM region name to ivshmem_cfg.h and bug fix that
avoids multiple declarations of mem_regions in ivshmem_cfg.h

Tracked-On: #4853

Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
2020-09-15 15:47:35 +08:00
Shuang Zheng
67426ed69c acrn-config: move the MACRO of IVSHMEM shared region name to ivshmem_cfg.h
The MACRO of IVSHMEM shared region name is relevant to scenario, move
the MACRO from pci_devices.h which should be consistent for different
scenarios to ivshmem_cfg.h which is the configuration for IVSHMEM and
could vary in sceanrios.

Tracked-On: #4853

Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
2020-09-15 15:47:35 +08:00
Yuan Liu
bed82b3736 hv: move mem_regions to ivshmem.c
This is a bug fix that avoids multiple declarations of mem_regions

Tracked-On: #4853

Signed-off-by: Yuan Liu <yuan1.liu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2020-09-15 15:47:35 +08:00
dongshen
67d06bc3a0 acrn-config: update configuration source code
so that vm_configurations.h/vm_configurations.c are consistent for
same scenario

Tracked-On: #5229
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
2020-09-15 15:09:28 +08:00
dongshen
fb4a9634d8 acrn-config: add comments to the generated misc_cfg.h code
Comments will be added for the HV_SUPPORTED_MAX_CLOS/MAX_MBA_CLOS_NUM_ENTRIES/MAX_CACHE_CLOS_NUM_ENTRIES
macros in generated code

Tracked-On: #5229
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
2020-09-15 15:09:28 +08:00
dongshen
42f572fe37 acrn-config: update missing or outdated configuration source code
so that vm_configurations.h/vm_configurations.c are consistent for
same scenario

Upload configuration source code for:
Board               scenarios
whl-ipc-i5          industry, hybrid, hybrid_rt, logical_partiton
whl-ipc-i7          industry, hybrid, hybrid_rt, logical_partiton
ehl-crb-b           industry, hybrid, hybrid_rt, logical_partition
nuc7i7dnb           industry, hybrid, logical_partition

Tracked-On: #5229
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
2020-09-15 09:56:00 +08:00
dongshen
539bdba4b7 acrn-config/hv: create new file pt_intx_c.py to generate the pt_intx.c file
Move struct pt_intx_config vm0_pt_intx[] defintion to pt_intx.c
so that vm_configurations.h/vm_configurations.c are consistent for different boards

Tracked-On: #5229
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
2020-09-15 09:56:00 +08:00
dongshen
f6e3469515 acrn-config: always generate P2SB_BAR_ADDR related boilerplate code in vm_configurations.c
so that vm_configurations.h/vm_configurations.c are consistent for different boards

The boilerplate code is protected by #ifdef P2SB_BAR_ADDR/#endif, so it will
not hurt if we always produce related code.

Define new macros P2SB_BAR_ADDR_GPA and P2SB_BAR_SIZE to make the code more flexible.

Tracked-On: #5229
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
2020-09-15 09:56:00 +08:00
dongshen
d99f51aa4e acrn-config: always generate pt_tpm2 boilerplate code in vm_configurations.c
so that vm_configurations.h/vm_configurations.c are consistent for different boards

The boilerplate code is protected by #ifdef VM0_PASSTHROUGH_TPM/#endif, so it will
not hurt if we always produce related code.

Define a new macro VM0_TPM_BUFFER_BASE_ADDR_GPA to define the allocated gpa for VM0_TPM_BUFFER_BASE_ADDR
to make the code more flexible.

Tracked-On: #5229
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
2020-09-15 09:56:00 +08:00
dongshen
12984d724d acrn-config: always generate .clos boilerplate code in vm_configurations.c
so that vm_configurations.h/vm_configurations.c are consistent for different boards

The boilerplate code is protected by #ifdef CONFIG_RDT_ENABLED/#endif, so it will
not hurt if we always produce the .clos code.

Tracked-On: #5229
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
2020-09-15 09:56:00 +08:00
dongshen
6c549a9303 acrn-config: define VMx_BOOT_ARGS macros in misc_cfg_h.py
so that vm_configurations.h/vm_configurations.c are consistent for different boards

Debugged and refactored the split_cmdline() function

Tracked-On: #5229
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
2020-09-15 09:56:00 +08:00
dongshen
15d2b6c621 acrn-config: move VMx_CONFIG_PCI_DEV_NUM macro to misc_cfg_h.py
so that vm_configurations.h/vm_configurations.c are consistent for different boards

Tracked-On: #5229
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
2020-09-15 09:56:00 +08:00
dongshen
33ed978d70 acrn-config: move cpu affinity macro to misc_cfg_h.py
so that vm_configurations.h/vm_configurations.c are consistent for different boards

Tracked-On: #5229
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
2020-09-15 09:56:00 +08:00
dongshen
530703e85c acrn-config: use ordered dictionary to guarantee dict order
For python versions prior to 3.7, dict order is not guaranteed.

Use ordered dict to ensure consistent ordering for the same input,
otherwise, the generated config files may change every time the config tool runs

Fix some error messages in code/comment

Tracked-On: #5229
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
2020-09-15 09:56:00 +08:00
Shuang Zheng
0882f92457 acrn-config: fix issue of acrn build failed on industry scenario when ivshmem configured
add extern acrn_vm_pci_dev_config variables in vm_configuration.c
when ivshmem configured on scenarios with ivshmem configured.

Tracked-On: #5298

Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
2020-09-15 09:38:57 +08:00
Peter Fang
22736dad45 OVMF release v2.2
- GvtGopDxe: Adjust the offset of gop in pvinfo page

Tracked-On: #5303
Signed-off-by: Peter Fang <peter.fang@intel.com>
2020-09-14 16:28:33 +08:00
Yuan Liu
0b8cefbc9c dm: refine ivshmem usage interface
Change shared memory name prefix from sos to dm
Change shared memory size unit from byte to megabyte

Tracked-On: #4853

Signed-off-by: Yuan Liu <yuan1.liu@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2020-09-14 16:16:07 +08:00
Victor Sun
08f7f247e3 HV: correct hpa calculation for pre-launched VM
The commit of da81a0041d
"HV: add e820 ACPI entry for pre-launched VM" introduced a issue that the
base_hpa and remaining_hpa_size are also calculated on the entry of 32bit
PCI hole which from 0x80000000 to 0xffffffff, which is incorrect;

Tracked-On: #5266

Signed-off-by: Victor Sun <victor.sun@intel.com>
2020-09-14 16:06:00 +08:00
Shixiong Zhang
2c26c033c3 acrn-config: remove uuid in config
Use vm_type to configure the load_type/uuid/severity,
Delete uuid lines in config scenario.

Tracked-On: #4641

Signed-off-by: Shixiong Zhang <shixiongx.zhang@intel.com>
Reviewed-by: Victor Sun <victor.sun@intel.com>
2020-09-14 15:25:42 +08:00
Shuang Zheng
6b8bfcb957 acrn-config: increase the length of DSDT table
increase the length of DSDT table to avoid memory overwrited by
subsequent ACPI tables.

Tracked-On: #5266

Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
2020-09-10 13:50:06 +08:00
Shuang Zheng
ae3eaca594 acrn-config: add OTN1 device config in offline ACPI table
add TSN device OTN1 config into offline ACPI table for TSN device
passthrough to pre-launched RTVM.

v2) update TSN device list from bdf list to vid:pid list.

Tracked-On: #5266

Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
2020-09-10 13:50:06 +08:00
Shuang Zheng
bae215a5c5 acrn-config: upload generated ASL code of ACPI tables for pre-launched VMs
generate ASL code of ACPI tables for pre-launched VMs on nuc7i7dnb,
whl-ipc-i5, whl-ipc-i7, ehl-crb-b boards

Tracked-On: #5266

Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Reviewed-by: Victor Sun <victor.sun@intel.com>
2020-09-09 15:31:20 +08:00
Mingqiang Chi
6508d44460 Revert "hv:refine vm & vcpu lock" for release2.2_branch
This reverts commit a67a85c70d.

this revert only for release_2.2 branch to fix WaaG reboot failed
restore memset in create_vm because sub-module use uninitialized data
in vm structure after reboot

Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Tracked-On: #4958
2020-09-09 15:24:34 +08:00
Victor Sun
8b86714af8 HV: fix uart hang issue caused by bdf overridden
On a PCI type HV uart, the bdf value is in a union together with
mmio_base_vaddr, then the value would be overridden by mmio_base_addr
in uart16550_init(), result in is_pci_dbg_uart() returns a wrong value
and then uart hang.

Tracked-On: #5288

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2020-09-09 10:10:06 +08:00
Shuang Zheng
feb0772a53 acrn-config: enable TPM2 config on ehl-crb-b board
enable TPM2 config on ehl-crb-b board and update TPM2 configs on
legacy boards.

Tracked-On: #5266

Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Reviewed-by: Victor Sun <victor.sun@intel.com>
2020-09-09 09:52:21 +08:00