Commit Graph

247 Commits

Author SHA1 Message Date
Yin Fengwei
26627bd1fc hv: add function to set AP entry
With reset_vcpu_regs as pre-condition, we only need to set
cs_selector and cs_base for AP.

We call set_ap_entry in two places:
 1. When emulation AP SIPI
 2. When sos BSP resume from S3. The BSP is resumed to real
    mode with entry set to wakeup_vec. We call set_ap_entry
    API here with entry twisted from wakeup_vec.

Tracked-On: #1231
Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-10-12 16:27:45 +08:00
Yin Fengwei
f7b11c8341 hv: add function to reset vcpu registers
This reset_vcpu_regs function will reset the vcpu registers to
default value: realmode with entry 0xFFFFFFF0

Make call to reset_vcpu_regs during create_vcpu and reset_vcpu

Tracked-On: #1231
Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-10-12 16:27:45 +08:00
Mingqiang Chi
790d8a5ce7 hv:Remove CONFIG_VM0_DESC
If defined CONFIG_VM0_DESC, HV will use predefined vm0_desc
to config VM0,now it is unneccessary, then remove these code.

Tracked-On: #861
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-10-12 14:41:48 +08:00
Huihuang Shi
c5f4c5109c HV:fix type related violations
1.Function return type inconsistent
2.cast on a constant value

V1->V2 add () to return type
V2->V3 keep the sbuf_get and sbuf_put return code

Tracked-On: #861
Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-10-10 13:02:00 +08:00
Li, Fei1
2b24b3780f hv: mmu: add some API for guest page mode check
add is_long_mode to check whether the processor is operating in IA-32e mode
add is_paging_enabled to check whether paging is enabled
add is_pae to check whether physical address extension is enabled.

Tracked-On: #1379
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2018-10-10 09:35:29 +08:00
Mingqiang Chi
eff2ac7a90 hv: Remove vm_list
Loop the global vm_array[] instead of the vm_list.

Tracked-On: #861
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-10-09 13:24:21 +08:00
Mingqiang Chi
ff3f9bd1e6 hv: Remove const qualifier for struct vm
This patch is ready for next one,we will switch from
pointer to embedded structures such as structure vcpu,
some const qualifiers can be improper and raise compilation errors,
this patch remove const qualifier for struct vm.

Tracked-On: #861
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-10-09 13:24:04 +08:00
Sainath Grandhi
5b28b37842 hv: Fix for PARTITION_MODE compilation
This patch fixes compilation issue for PARTITION_MODE.

Tracked-On: #1404
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
2018-10-08 22:04:27 +08:00
Jason Chen CJ
3b88d3c2ac vioapic: add pin_state bitmap to set irq
a guest may use per-cpu vector allocation mechanism which may lead to
same vector on different vcpu for different vioapic pins.
when we broadcast EOI from vlapic to vioapic, it could trigger
ptdev_intx_ack for incorrect vioapic pin which will lead to incorrect
vioapic irq deassert.

old implementation is recording assert & deassert by acnt, like:
- assert -> acnt++
- deassert -> acnt--
which means an incorrect deassert may descrease acnt from 0 to -1, it leads
to error.

this patch change the recording method for a pin assert/deassert, it
just use pin_state bit set/clear to indicate line state:
- high -> pin_state bitmap set
- low -> pin_state bitmap clear
and the irq assert will be triggered based on polarity setting during line
state changing.

it can avoid the failure of incorrect deassert on old implementation, and for
ptdev sharing irq, the dev hardware could re-trigger interrupt after deassert.
but for emulated device, there is no mechanism to re-trigger interrupt if
there is irq sharing - for DM, we already has constraint to restrict vGSI
sharing, so there is no problem of it.

Tracked-On: #1269
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
2018-09-30 15:24:59 +08:00
Shiqing Gao
4544d28ee1 hv: fix 'User name starts with underscore'
There are chances that names with leading underscore declared by
developers are conflict with the ones reserved for the compiler.

What this patch does:
- rename these functions/variables/macros starting with
  underscore to avoid such unintentational mistakes.
- remove gpr.h without any contents

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-09-30 14:45:37 +08:00
Yin Fengwei
1c0a3d9a02 hv: Add API to set vcpu register
set_vcpu_regs function is added to set vcpu registers.

Tracked-On: #1231
Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
2018-09-29 15:34:02 +08:00
Yin Fengwei
0e0dbbaca3 hv: Move the strcut acrn_vcpu_regs to public header file
Move struct acrn_vcpu_regs, acrn_descriptor_ptr and
acrn_gp_regs to acrn_common.h. The struct acrn_vcpu_regs
will be used as parameter of hypercall

Tracked-On: #1231
Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
2018-09-29 15:34:02 +08:00
Yin Fengwei
adc7913741 hv: efi_context refine
For SBL platform, struct acrn_vcpu_regs are used as boot context.
Now the boot_ctx is only for UEFI platform. Rename struct boot_ctx
to efi_context.

Tracked-On: #1231
Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
2018-09-29 09:24:00 +08:00
Yin Fengwei
ba1aa40707 hv: add struct acrn_vcpu_regs
Add struct acrn_vcpu_regs and make struct boot_ctx based on
struct acrn_vcpu_regs.

vm0_boot_context is also changed from struct boot_ctx to struct
acrn_vcpu_regs.

Tracked-On: #1231
Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
2018-09-29 09:24:00 +08:00
Yin Fengwei
843f7721f0 hv: Change the struct cpu_gp_regs name to acrn_gp_regs
We will define the hypercall to set acrn vcpu registers and
move this struct to acrn_commmon.h for reference from hypercall
parameter definition.

Tracked-On: #1231
Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
2018-09-29 09:24:00 +08:00
Junjun Shan
5c92329606 hv:clear up the usage of printf data struct
The printf related functions have been called by other various
functions, e.g. get_ptdev_info(), get_ioapic_info, etc. The patch
is used to clear up the usage.

Tracked-On: #861
Signed-off-by: Junjun Shan <junjun.shan@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-09-28 16:40:07 +08:00
Mingqiang Chi
07e71212cc hv:Replace dynamic memory allocation for vuart
Replace dynamic allocation for vuart rx/tx buffer
with static array.

v2-->v3:
 --  Reduce the size of vuart tx buffer from 64K to 8K
 --  For non-partition mode, will use global rx/tx buffer,
     for partition mode, will use per VM rx/tx buffer.
 --  Change several APIs to inline
v1-->v2:
 --  Move vuart rx/tx buffer into acrn_vuart data structure

Tracked-On: #861
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Li, Fei1 <fei1.li@intel.com>
Reviewed-by: Anthony Xu <anthony.xu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-09-28 13:59:50 +08:00
Yonghua Huang
9a05fbea78 HV: remove IRQSTATE_ASSERT/IRQSTATE_DEASSERT/IRQSTATE_PULSE
- replace vpic/vioapic_xassert_irq() APIs
      with vpic/vioapic_set_irq()

   - unify the description of IRQ/PIN state in vpic. & vioapic.c

Tracked-On: #861
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-09-28 13:14:30 +08:00
Shiqing Gao
026ae83bd5 hv: include: fix 'Unused procedure parameter'
MISRA-C requires that there should be no unused parameters in
functions.

This patch removes the unused parameters that is not being used
unconditionally.

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-09-27 10:46:52 +08:00
Shiqing Gao
8787c06d3b hv: arch: fix 'Unused procedure parameter'
MISRA-C requires that there should be no unused parameters in
functions.

In some cases, we will keep the unused parameters.
vmexit handler is one example. It is used as function pointer.
Some of the vmexit handlers use the input parameter 'vcpu', some of
them don't. We still need to keep the unused parameters 'vcpu' for
those handlers don't use 'vcpu'.

This patch removes the unused parameters that is not being used
unconditionally.

v1 -> v2:
 * remove the non-implemented API 'vlapic_id_write_handler'

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-09-26 10:48:55 +08:00
Minggui Cao
918403f925 HV: modify code for intr storm detect & handling
This patch is to enhance the feature of "interrupt storm
mitigation"; when interrupt storm happens on one UOS
it should keep as smaller effect to SOS as possible.

Add variables in PTdev entry & VM, used to record one
UOS's pass-thru devices' interrupt data; add a function
to collect the data.

Also add a timer used to delay UOS pass-thru devices'
interrupt injection if an "interrupt storm" detected
by SOS.

Tracked-On: #866
Signed-off-by: Minggui Cao <minggui.cao@intel.com>
Reviewed-by: Li Fei1 <fei1.li@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-09-25 11:09:35 +08:00
Shiqing Gao
9d602208e5 hv: remove unused MACROs
MISRA-C states that redundant macros reduce the maintainability of code.

In some cases, we would like to keep the current unused macros for code
completeness, such as cpu registers. These macros might be used later.

This patch removes some unused macros that is not critical for code
completeness.

v1 -> v2:
 * Keep TRUSTY_VERSION in trusty.c.
   Yadong will cook another patch which will utilize TRUSTY_VERSION.

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-09-18 09:43:43 +08:00
Xiangyang Wu
bb0a2bc2ab HV:Hypercall:Remove redundant error checking
In the current hypervisor hypercall, first all vcpu is
allocated to SOS, vcpu's vm field is initialized to vm0.
When the vcpu is offlined, vcpu will be paused and vcpu's
vm field is set as NULL by DM. When UOS is created, vcpu's
vm field is set as UOS's vm. So when vmcall_vmexit_handler
is invoked, vcpu's vm filed is always non-NULL.
error checking for vm pointer is done in the function
"vmcall_vmexit_handler", vmcall_vmexit_handler will
guarantee that vm is vm0.

So all hypercall functions (these functions is just for handler
hypercall, except vmcall_vmexit_handler) don't need to check
whether invoking vm is NULL and don't need to check whether
invoking vm is vm0 or not.

Remove related invoking vm error checking for hypercall handling.

V1 --> V2:
	Add pre-condition for hypercall in the head file.
V2 --> V3:
	Add pre-condition for copy_from_gpa and copy_to_gpa.
V3 --> V4:
	Add pre-condition both in the head file and source file.

Tracked-On:#1258

Signed-off-by: Xiangyang Wu <xiangyang.wu@linux.intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-09-18 09:43:24 +08:00
Junjun Shan
83d1ddc6d8 hv:Delete the dead code
Delete the dead code get_irq_info(), local_get_irq_info() in io_request.c
and definition in guest.h.

v1->v2
 *the dead code used pointers which not checked before use, therefore it
  causes "pointer not checked for null before use". To make it clearly,
  modify the subject to "delete the dead code" directly.

 *remove dead code local_get_irq_info() in io_request.c and definition
  in guest.h together.

Tracked-On: #861
Signed-off-by: Junjun Shan <junjun.shan@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-09-17 09:52:02 +08:00
Junjun Shan
4fd5102edc hv:treewide:fix multiple MISRAC violations
MISRAC has requirements about literal value requires a U suffix and
signed/unsigned conversion with cast. This patch is used to solve
these violations.

v1->v2
 *Drop the cast of sz from uint32_t to int32_t, the signed/unsigned
  violation of nchars will be solved by other patch together with
  printf/sprintf/console/vuart/uart code.

 *Delete the unnecessary L suffix of shifting operand.

Tracked-On: #861
Signed-off-by: Junjun Shan <junjun.shan@intel.com>
Reviewed by: Junjie Mao <junjie.mao@intel.com>
2018-09-13 11:12:29 +08:00
Mingqiang Chi
60c05ace1a hv:Replace vlapic pointer with instance in vcpu_arch
-- update 'vlapic' in 'struct vcpu_arch' from pointer
   to instance
-- add inline function(vcpu_vlapic) in vcpu.h

Tracked-On: #861
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-09-12 09:20:07 +08:00
Mingqiang Chi
f744762ad3 hv:Remove redundancy 'vlapic' in 'struct vcpu'
It has been defined in 'struct vcpu_arch'

Tracked-On: #861
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-09-12 09:20:07 +08:00
Mingqiang Chi
aae5018bec hv:Move vlapic structure to vlapic.h
move structure vlapic_pir_desc/vlapic_timer/
acrn_vlapic from vlapic_priv.h to vlapic.h

Tracked-On: #861
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-09-12 09:20:07 +08:00
Mingqiang Chi
887ebf0b08 hv: Replace dynamic memory allocation for MSR bitmap
Replace pointer with static memory for msr_bitmap
inside structure vm_arch.

Tracked-On: #861
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Anthony Xu <anthony.xu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-09-12 09:20:07 +08:00
Mingqiang Chi
02e7edc063 hv: Replace dynamic memory allocation for I/O bitmaps
-- Replace pointer with static memory for io_bitmap
  inside structure vm_arch.
-- Refine allow_guest_pio_access/deny_guest_pio_access

Tracked-On: #861
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Anthony Xu <anthony.xu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-09-12 09:20:07 +08:00
Mingqiang Chi
eada04b800 hv:Replace dynamic memory allocation for vmcs region
Replace vmcs pointer with static memory for vmcs region
inside structure vcpu_arch.

Tracked-On: #861
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Anthony Xu <anthony.xu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-09-12 09:20:07 +08:00
Shiqing Gao
bcaede0c0e hv: treewide: fix 'Use of function like macro'
- convert function like macros to inline functions based on MISRA-C
  requirement
- remove some unused and duplicated macros

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
2018-09-11 10:49:48 +08:00
Jason Chen CJ
457ac7408d vcpu: replace start_vcpu with run_vcpu
run_vcpu should be a more suitable name

Tracked-On: #1199
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
2018-09-11 10:47:34 +08:00
Minggui Cao
99285f844a HV: improve pass-thru device interrupt process
for each pass-thru device and its entry owned by one VM, so
change the pass-thru device's softirq lock & entry list into
per VM, so one VM's PT device interrupt process will not
interfere with other VMs; especially in case one user OS
"interrupt storm" happens, it will have little effect on
service OS.

Tracked-On: #866
Signed-off-by: Minggui Cao <minggui.cao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-09-10 10:12:45 +08:00
Shiqing Gao
4360235edf hv: treewide: fix 'Macro parameter not in brackets'
Add the brackets for Macro parameter to avoid the unintentional
mistakes.

A simple example that may cause mistakes:
        #define minus(x) -x
When the following call is made,
        z = minus(a-b)
it becomes:
        z = -a-b;
where "-a - b" is equivalent to "(-a) - b" rather than "- (a - b)", as
expected.

v2 -> v3:
 * convert DMAR_WAIT_COMPLETION to inline function
 * remove the macro PIC_PIN_FOREACH and implement the well-formed
   for loop in each case
 * replace __CPP_STRING with STRINGIFY and remove the unused CPP_STRING

v1 -> v2:
 * Remove some changes to function like macro since MISRA-C requires to
   use inline functions if it is possible.
   These MACRO brackets violations will be fixed together when fixing
   other issues related to function like macro.

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
2018-09-07 10:22:00 +08:00
Shiqing Gao
f2f719cfa8 hv: fix 'Procedure is not called or referenced in code analysed'
MISRA-C requires that each function defined and declared shall be called
or referenced in code analyzed.

In some cases, we would like to keep the non-called functions for code
completeness, such as
vcpu_inject_extint/vcpu_inject_nmi/vcpu_inject_gp/vcpu_inject_pf
/vcpu_inject_ud/vcpu_inject_ac/vcpu_inject_ss.

This pacth removes some functions that are independent and are not
called in our code base.

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-09-06 12:01:30 +08:00
Shiqing Gao
54439ecae1 hv: treewide: fix 'Expression is not Boolean'
MISRA-C requires that the controlling expression of an if statement or
an iteration-statement shall be Boolean type.

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
2018-09-03 11:23:53 +08:00
Shiqing Gao
2a184f353c hv: code clean up regarding to guest_msrs
Change guest_msrs in vcpu data structure from pointer to array, which
could avoid the dynamic memory allocation.

v1 -> v2:
 * Remove the unnecessary initialization for guest_msrs[] since vcpu is
   allocated by calloc.

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-08-28 11:08:48 +08:00
Mingqiang Chi
4e8798e018 hv:Replace vioapic pointer with instance in structure vm
-- rename struct vioapic --> struct acrn_vioapic
-- update 'vioapic' field in 'struct arch_vm' from pointer
   to instance
-- change vm_ioapic(vm) to inline, and move it to vm.h
-- change vioapic_init to void type

Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Anthony Xu <anthony.xu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-08-27 09:49:12 +08:00
Mingqiang Chi
29dbd1084d hv:Replace vuart pointer with instance in structure vm
-- update 'vuart' field in 'struct vm' from pointer
   to instance
-- replace MACRO with inline function for vm_vuart,
   and move it to vm.h
-- change vuart_init to void type
-- rename struct vuart -->struct acrn_vuart

Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Anthony Xu <anthony.xu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-08-27 09:49:12 +08:00
Mingqiang Chi
0b54946bac hv:Replace vpic pointer with instance in structure vm
-- update 'vpic' field in 'struct vm' from pointer
  to instance, and move it from 'struct vm' to 'struct arch_vm'
-- replace MACRO with inline function for vm_pic, and move it
   to vm.h
-- changed vpic_init to void type
-- removed vpic_cleanup
-- move struct acrn_vpic/i8259_reg_state from vpic.c to vpic.h

Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Anthony Xu <anthony.xu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-08-27 09:49:12 +08:00
Yonghua Huang
7bc1a3f925 HV: Refine APICv capabilities detection
- by default, ACRN will not support platform without
   below APICv features:
    -- Use TPR shadow
    -- APIC-register virtualization

 - remove mmio emualtion of local APIC for guest

Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-08-24 09:58:58 +08:00
Yu Wang
a0c625b85a hv: apicv: change the apicv related API with vlapic_apicv prefix
The apicv is one hardware acceleration feature of vlapic. All vlapic
APIs should keep vlapic_ as the prefix.

Signed-off-by: Yu Wang <yu1.wang@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-08-23 08:55:30 +08:00
Mingqiang Chi
c43d0e4f01 hv:Changed several APIs to void type
Since these APIs always return 0,
change them to void type,
vcpu_set_cr0()
vmx_write_cr0()
vcpu_set_cr4()
vmx_write_cr4()
kick_notification()
tsc_deadline_handler()
dmar_fault_handler()
ptdev_interrupt_handler()

Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
2018-08-23 08:54:54 +08:00
Shiqing Gao
3e598ebb28 hv: fix 'No definition in system for prototyped procedure'
Remove the functions without definition.

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
2018-08-22 13:11:25 +08:00
Shiqing Gao
8924f6dabb hv: vmx: fix 'Array has no bounds specified'
MISRAC requires that the array size should be declared explicitly.

This patch fixes the issues caused by vm0_boot_context.

Fix pattern is like below:
   extern char start_of_ROM, end_of_ROM, start_of_FLASH;
   memcpy (& start_of_FLASH, & start_of_ROM, & end_of_ROM - &
start_of_ROM);

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
2018-08-21 13:03:28 +08:00
Shiqing Gao
7a4dcfcc1a hv: treewide: fix 'Function prototype/defn param type mismatch'
Fix the parameter type mismatch between API declaration and definition.

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-08-21 09:55:12 +08:00
Shiqing Gao
431ef57076 hv: vioapic: fix 'No definition in system for prototyped procedure'
Remove two APIs without definition

Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
2018-08-21 09:53:55 +08:00
Minggui Cao
b37008d74e HV: check secure/normal world for EPTP in gpa2hpa
for secure and normal world has different EPTP, in secure world,
it could trap to hypervisor and call gpa2hpa function. So it need
check if it is in normal or secure world for EPTP selection.

Detailed explanation from Yadong Qi <yadong.qi@intel.com>:
Currently, trusty OS does not handle interrupt, so when an interrupt
is delivering in trusty, trusty will set it to LAPIC IRR register by
inject self_ipi() and then call world_switch to switch to Android,
So android will receive/handle the interrupt properly.Since the
vLAPIC is enabled in ACRN, so when trusty try to inject self_ipi(),
APIC-ACCESS vmexit will happen. Then ACRN will do instruction
decode/emulation, so the GPA2HPA will fail since page walk is using
nworld_eptp. It is probability an issue.

Signed-off-by: Minggui Cao <minggui.cao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-08-17 14:31:43 +08:00
Arindam Roy
d3db5a6705 HV: Add const qualifiers where required
V1:
In order to better comply with MISRA C,
add const qualifiers whereeven required.
In the patch, these are being added to pointers
which are normally used in "get" functions.

V2: Corrected the issues in the patch
pointed by Junjie in his review comments.
Moved the const qualifiers to the correct
places. Removed some changes which are not
needed.

V3: Updated patch comment.
This modifies a subset of all the functions
which might need constant qualifiers
for the their parameters.
This is not and exhaustive patch. This only
targets obvious places where we can use
the const qualifier. More changes will be
submitted in future patches, if required.

Signed-off-by: Arindam Roy <arindam.roy@intel.com>
2018-08-17 10:02:12 +08:00
Sainath Grandhi
022ef92b62 hv: Add vrtc emulation support for ACRN partition mode
This patch adds code to support read-only RTC support for guests
run by partition mode ACRN. It supports RW for CMOS address port 0x70
and RO for CMOS data port 0x71. Reads to CMOS RAM offsets are fetched
by reading CMOS h/w directly and writes to CMOS offsets are discarded.

Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
2018-08-16 16:23:11 +08:00
Mingqiang Chi
de487fff2b hv:fix return value violations for vpic/vioapic
-- Change these APIs to void type, add pre-conditions,
   and move parameter-check to upper-layer functions.
   handle_vpic_irqline
   vpic_set_irqstate
   vpic_assert_irq
   vpic_deassert_irq
   vpic_pulse_irq
   vpic_get_irq_trigger
   handle_vioapic_irqline
   vioapic_assert_irq
   vioapic_deassert_irq
   vioapic_pulse_irq
-- Remove dead code
   vpic_set_irq_trigger

v1-->v2:
   add cleanup vpic
   change some APIs to void type, add pre-conditions,
   and move the parameter-check to upper-layer functions.

Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-08-16 09:01:08 +08:00
Jason Chen CJ
f8f49d410f dump vcpu registers on correct vcpu
after updated cpu context get/set method, the vcpu_dumreg cmd is not
correct anymore as the registers may read from VMCS but meantime hv
shell may not be running on target vcpu.

this patch take use of smp_call_function for vcpu dumpreg and make the
dump always come from correct vcpu.

v2:
- use str pointer to get vcpu_dumpreg context instead of print out directly
  in notify handler.

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-08-15 12:05:18 +08:00
Binbin Wu
69522dc861 hv: move boot_ctx offset definitions
Move the definitions of offset of fields in boot_ctx to the same header
file that the struct boot_ctx is in, to reduce the possibility that some
modification would make the offset inconsistant with the fields within
the structure.

Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-08-14 13:05:06 +08:00
Sainath Grandhi
c25a62e5b0 hv: Create E820 entries for OS in partitioning mode ACRN
1) This patch creates static E820 entries for VMs launced by ACRN in
partition mode.
2) Moves vm_description entries from bsp/sbl/ to partition/
3) Removes unused API get_vm_desc_base

Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
2018-08-13 13:58:32 +08:00
Sainath Grandhi
7380c167ed hv: Add vuart flag to VM descriptions in partition mode
ACRN in partition mode emulates UART for the VMs directly launced
from HV. This patch adds an option to enable/disable vUART for a
VM.

Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
2018-08-13 09:34:35 +08:00
Sainath Grandhi
e40b998d21 hv: Add EPT mapping for UOS in partitioning mode
Adding code to map memory for UOS in partitioning mode ACRN.
HPA starting above 4GB is used for UOS memory. Supports only contiguous memory
from host for UOS. Current implementation supports only 2 GB for UOS memory.

Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
2018-08-10 10:22:06 +08:00
Shiqing Gao
40196d16af hv: treewide: fix 'inline function should be declared static'
MISRAC does not allow the use of an inline function with external
linkage.

What this patch does:
- Add the static keyword for the function that is only used in the
  definition file.
- Remove the inline keyword for the function that is used in multiple
  files.

v1 -> v2:
 * Move some functions to headers as static inline function if it is
    possible

Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
2018-08-10 10:16:04 +08:00
dongshen
f60fcb6b16 HV: Defining the per-vm static vpci table for partition hypervisor
V4:
- Renamed members for struct pcibar
- License header fix
- Added vpci_vdev_array to struct vm_description

V3:
 - Defined the static centralized vpci table to reduce code size,
   previously many of the settings are obtained/generated dynamically

Reviewed-by: Anthony Xu <anthony.xu@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
2018-08-10 10:09:00 +08:00
Binbin Wu
33e1149b29 hv: init: unify init logic for vm0 bsp
In current code, VM0 BSP start mode is hardcoded, in this patch VM0 BSP
start mode is decided by the boot context prepared by bootloader/BIOS.

In current code, VM0 BSP VMCS is override only on UEFI platform.
In this patch, VM0 BSP VMCS is override on both SBL & UEFI platforms.

Also restructure the code of guest init code.
In this patch, a vcpu run_context is initilaized first according to vcpu mode.
Then write the value to vmcs according to run_context value.

Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-08-09 16:43:58 +08:00
Binbin Wu
4acce9338a hv: move save_segment/load_segment to a header file
save_segment/load_segment is common code and can be used outside of trusty,
move to a header file.

Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-08-09 16:43:58 +08:00
Binbin Wu
43db87cfed hv: rename acrn_efi.h to vm0_boot.h
The structures defined in acrn_efi.h is x86 related, move it
to acrh/x86/guest/.
Also, the headfile will be used on both SBL & UEFI platforms,
rename it to vm0_boot.h

Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-08-09 16:43:58 +08:00
Binbin Wu
adddf512a6 hv: move define of struct cpu_gp_regs to a separate headfile
EFI stub code need to reference to the struct cpu_gp_regs, which
is currently defined in vcpu.h, however include vcpu.h in EFI stub code
will include other header files not requried by EFI stub code.
After moving the define of struct cpu_gp_regs to a separate
headfile, the file can be included in EFI stub code without other header
files.

Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-08-09 16:43:58 +08:00
Qi Yadong
2fc3bdec40 HV: trusty: new hypercall to save/restore context of secure world
New field in VM's structure:
    sworld_snapshot: save cpu_context of secure world.

New hypercall: HC_SAVE_RESTORE_SWORLD_CTX
    In UOS S3 suspend path: trusty kernel driver will call this hypercall
    to require Hypervisor save context of secure world.
    In UOS S3 resume path: virtual firmware will call this hypercall to
    require Hypervisor restore context of secure world.

New bit in secure_world_control.flag:
    ctx_saved: indicate whether cpu_context of secure world is saved.

Signed-off-by: Qi Yadong <yadong.qi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-08-09 15:09:15 +08:00
Qi Yadong
b5b769f45a HV: trusty: refine secure_world_control
Define Bitmap flag to indicate secure world's state:
    supported: 0(not supported), 1(supported)
    active:    0(inactive), 1(active)

Refine secure_world_memory:
    base_gpa_in_sos: base_gpa from SOS's view
    base_gpa_in_uos: base_gpa from UOS's view, this is the original base_gpa
                     allocated by bootloader.
    Recording above GPA is for usage of trusty EPT destroy and re-create.
    There is an assumption: the secure world's memory address is contiguous
    in both SOS and physical side.

Signed-off-by: Qi Yadong <yadong.qi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-08-09 15:09:15 +08:00
Sainath Grandhi
ff96453993 hv: Boot multiple OS for Partitioning mode ACRN
ACRN in partitioning mode boots multiple OS. Adding code to parse
VM description structure and a reference description structure for
booting 2 OSes.

Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
2018-08-09 15:01:57 +08:00
Yin Fengwei
63fe48c27f hv: get correct fault address for copy_to/from_gva
When doing copy_to/from_gva, it's possible the guest no page
happens on none-first page. In this case, we need get correct
fault address from gva2gpa.

Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
Acked-by: Eddie Dong <Eddie.dong@intel.com>
2018-08-09 14:46:13 +08:00
Sainath Grandhi
04b4c9110c hv: Adding a wrapper on top of prepare_vm0
Added prepare_vm function as a wrapper function on top of prepare_vm0.
This makes adding support for partition mode ACRN to boot multiple
VMs from HV cleaner.

Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
2018-08-08 15:53:46 +08:00
Jason Chen CJ
63ef1236de move global x2apic_enabled into arch dir
the x2apic_enabled should be x86 specific field.

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Xu, Anthony <anthony.xu@intel.com>
2018-08-07 09:55:13 +08:00
Jason Chen CJ
8a95b2abdc vcpu: add ext context support for world switch
move most of fields from run_context into ext_context for world switch.
these fields do not need doing runtime save/restore during vm exit/entry.

v3:
- update cr0/cr4 registers switch method

v2:
- use struct name ext_context instead of saved_context
- updated according to previous v2 patch

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-08-07 09:55:13 +08:00
Jason Chen CJ
3d5d6c96ec vcpu: add get/set register APIs
there will be 3 types of vcpu runtime contexts:
- runtime contexts always saved/restored during VM exit/entry, which
  include general registers rax/rcx/rdx/rbx/rbp/rsi/rdi/r8~r15, cr2 and
  msr for spectre control (ia32_spec_ctrl)
- runtime contexts on-demand cached/updated during VM exit/entry, which
  include frequently used registers rsp, rip, efer, rflags, cr0 and cr4
- runtime contexts always read/write from/to VMCS, which include left
  registers not in above

this patch add get/set register APIs for vcpu runtime contexts, and unified
the save/restore method for them according to above description.

v3:
- update vcpu_get/set_cr0/4 as unified interface to get/set guest cr0/cr4,
  use on-demand cache for reading, but always write to VMCS for writing.

v2:
- use reg_cached/reg_updated for on-demand runtime contexts
- always read/write cr3 from/to VMCS

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-08-07 09:55:13 +08:00
Shiqing Gao
b4a2ff5022 hv: treewide: fix 'Prototype and definition name mismatch'
Fix the parameter name mismatch between API declaration and definition.

v2 -> v3:
 * Fix two more violations which are missed in previous report.
   shell_puts and console_write

v1 -> v2:
 * Replace 'ret_desc' with 'desc'

Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
2018-08-06 16:04:40 +08:00
Yu Wang
f96f048f71 hv: vioapic: change the variable type of pin to uint32_t
To make vioapic simpler, avoid lots of code to convert variable type
between uint8_t and uint32_t.

This patch changes all variable type of pin related variables to
uint32_t instead of original uint_8.

Signed-off-by: Yu Wang <yu1.wang@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-08-06 12:32:35 +08:00
Mingqiang Chi
7345677bbb hv:cleanup vmid related code
Remove structure vm_attr
Wrap two APIs alloc_vm_id and free_vm_id

Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-08-06 12:27:53 +08:00
Sainath Grandhi
6643adff8b HV: Adding mptable support for partition mode ACRN
Partitioning mode of ACRN needs to build mptable for UOS.
UOS uses mptable instead of ACPI tables.

Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
2018-08-03 13:36:40 +08:00
Shiqing Gao
fd0c9187ef hv: treewide: fix 'Procedure parameter has a type but no identifier'
Add the parameter identifier for typedef function pointer.

Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-08-03 13:29:24 +08:00
Shiqing Gao
a71dedecd4 hv: treewide: fix 'Array has no bounds specified'
MISRAC requires that the array size should be declared explicitly.

This patch fixes the issues caused by the arrays that are defined in
link_ram.ld.in or assembly file.

v1 -> v2:
 * Update the solution based on the info from the following link.
   https://sourceware.org/binutils/docs/ld/Source-Code-Reference.html

   Fix pattern is like below:
   extern char start_of_ROM, end_of_ROM, start_of_FLASH;
   memcpy (& start_of_FLASH, & start_of_ROM, & end_of_ROM - &
start_of_ROM);

Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-08-03 12:40:21 +08:00
Mingqiang Chi
a3b44a2fa8 hv:Replace 0(cpu_id) with BOOT_CPU_ID
Replace 0(pcpu_id/vcpu_id) with BOOT_CPU_ID

Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-08-03 11:27:52 +08:00
Mingqiang Chi
ae8836d960 hv:fix return value violation for vioapic_get_rte
Change this API to void type
Add pre-condition, state the input parameters are not NULL.

Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-08-02 14:47:43 +08:00
Yin Fengwei
f576f97ea8 hv: add vm restart API
And export the API to DM. DM will do system reboot/S3 resume based
on this API.

Also add the pre-assumption description for some vm APIs.

Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-08-02 13:14:03 +08:00
Shiqing Gao
51c75e9e3c hv: treewide: fix 'Function prototype/defn param type mismatch'
Fix the parameter type mismatch between API declaration and definition.

Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-08-01 15:53:29 +08:00
Xiangyang Wu
6e77a8d5f1 HV:treewide:rename enum vpic_wire_mode, stack_canary, segment_override, pde_index
For data structure types "enum vpic_wire_mode, struct stack_canary",
its name is identical with variable name in the same scope.
This MISRA C  violation is detected by static analysis tool.
For variables "segment_override, pde_index", its name is identical
with function name. This MISRA C  violation is detected.
Naming convention rule:Variable name can be shortened from
its data structure type name.

The following udpates are made:
enum vpic_wire_mode vpic_wire_mode-->enum vpic_wire_mode wire_mode
struct stack_canary stack_canary-->struct stack_canary stk_canary
uint8_t segment_override:1 --> uint8_t seg_override:1
uint32_t pde_index--> uint32_t pde_idx

V1-->V2:
	Remove update "enum cpu_state cpu_state-->enum cpu_state state"
	and "enum irqstate irqstate-->enum irq_ops_mode ops_mode", other
	patch will cover it.
V2-->V3:
	Update "uint32_t pde_index--> uint32_t pde_idx".

Signed-off-by: Xiangyang Wu <xiangyang.wu@linux.intel.com>
2018-07-31 11:20:21 +08:00
Xiangyang Wu
2c95a8c4aa HV:treewide:rename struct pic and iommu_domain
For data structure types "struct pic and struct iommu_domain",
its name is identical with variable name in the same scope.
This MISRA C  violation is detected.

Naming convention rule:If the data structure type is used by only one
module and its name meaning is simplistic, its name needs prefix
shorten module name.
Naming convention rule:Variable name can be shortened from its
data structure type name.

The following udpates are made:
struct pic pic-->struct i8259_reg_state i8259
struct iommu_domain iommu_domain-->struct iommu_domain iommu

V1-->V2:
	Update "struct iommu_domain iommu_domain-->struct iommu_domain iommu"

Signed-off-by: Xiangyang Wu <xiangyang.wu@linux.intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
2018-07-31 10:33:22 +08:00
Junjie Mao
17771c0ac2 HV: io: refine state transitions of VHM requests
Instead of using two members for maintaining the state of a VHM request, this
patch replaces the transitions with a single state. Basically the lifecycle of a
VHM request shall be:

    FREE -> PENDING -> PROCESSING -> COMPLETE -> FREE -> ...

The structure header of vhm_request has more details of the transitions access
limitations under different states.

Also drop the set but unused member vcpu.ioreq_pending.

For backward-compatibility, the obsolete 'valid' member is still kept and
maintained before SOS and DM adapts to the new state transitions.

v2 -> v3:

    * Use complete_ioreq to mark an I/O request finished in
      dm_emulate_(pio|mmio)_post.

Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-31 10:22:03 +08:00
Xiangyang Wu
159d57b703 HV:treewide:rename union lapic_id and struct segment
For data structure types "union lapic_id and struct segment",
its name is identical with variable name in the same scope. This MISRA C
violation is detected by static analysis tool.

Naming convention rule:If the data structure is corresponding
to hardware resource (such as register, segment selector),
its name need resource shorten name suffix (such as _reg, _sel).

The following udpates are made:
union lapic_id-->union lapic_id_reg
struct segment-->struct segment_sel

Signed-off-by: Xiangyang Wu <xiangyang.wu@linux.intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
2018-07-30 10:18:39 +08:00
Huihuang Shi
59771ff461 HV:treewide:fix "Reference parameter to procedure is reassigned"
Parameter's type which is pointer should not be changed in the
scope of function,assign it's value to local variable to fixed
it out.

Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-27 12:17:12 +08:00
Xiangyang Wu
58b42baa74 HV:treewide:rename struct vpic as struct acrn_vpic
There are many naming violations detected by static analysis
tool. Data structure type name is the same as variable name.
According to naming convention rules, If the data structure
type is used by multi modules and its name meaning is
simplistic (such as vcpu, vm), its name needs prefix "acrn_".

Rename struct vpic as struct acrn_vpic.
Replace regular expression:s/struct vpic\([ ),;\t\*]\+\)/struct acrn_vpic\1

Signed-off-by: Xiangyang Wu <xiangyang.wu@linux.intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-27 11:27:12 +08:00
Xiangyang Wu
33fdfd05f1 HV:treewide:rename struct vlapic as struct acrn_vlapic
There are many naming violations detected by static analysis
tool. Data structure type name is the same as variable name.
According to naming convention rules, If the data structure
type is used by multi modules and its name meaning is
simplistic (such as vcpu, vm), its name needs prefix "acrn_".

Rename struct vlapic as struct acrn_vlapic
Replace regular expression:s/struct vlapic\([ ),;\t\*]\+\)/struct acrn_vlapic\1

Signed-off-by: Xiangyang Wu <xiangyang.wu@linux.intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-27 11:27:12 +08:00
Junjie Mao
88f74b5dbb HV: io: unify vhm_request req and mem_io in vcpu
The current struct vcpu has two members, namely 'struct vhm_request req' and
'struct mem_io mmio', that hold similar info, including the address, direction, size,
value and status of mmio reqeusts.

As a step towards a unified framework for both MMIO/PIO, this patch unifies
these two members by a tailored version of vhm_reqeust, mostly with the reserved
fields dropped. The definitions to request types, directions and process status
are reused.

Handling errors during emulations will be revisited after the I/O emulation
paths are unified. Thus for this patch the mmio.mmio_status in inherited by
io_req.processed which is not yet properly processed.

Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-27 10:50:19 +08:00
Junjie Mao
1915eec632 HV: io: separate I/O emulation interface declarations
Currently the I/O emulation structures and interfaces are scattered among mmu.h,
io.h and guest.h, and tangled with other interfaces there. This patch moves the
former to a separate header ioreq.h.

Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-27 10:50:19 +08:00
Huihuang Shi
5189bcd272 HV:treewide:fix "Attempt to change parameter passed by value"
In the function scope,the parameter should not be
changed as Misra required.
V1->V2 recover some violations because of ldra's false positive.
V2->V3 sync local variable' type to parameter's type with the prefix of const.

Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-26 09:35:52 +08:00
Jason Chen CJ
589c72382a add CONFIG_VM0_DESC support
if defined CONFIG_VM0_DESC, HV will use predefined vm0_desc to config
VM0, otherwise, HV will run VM0 with all physical cpus.

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-25 17:18:14 +08:00
Jason Chen CJ
22833787ce refine definition for foreach_vcpu
foreach_vcpu will go through all vcpu_array and only call the following
code when vcpu != NULL

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-25 17:18:14 +08:00
Binbin Wu
b2802f3d1d hv: cpu: align general-purpose register layout with vmx
In current code, general-purpose register layout in run_context is not align with the
general-purpose register index when vmexit. So hv needs to map the index used during
vmexit to the index of the general-purpose register in run_context.
This patch align the layout, so that no mapping needed.

Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-07-25 13:05:38 +08:00
Li, Fei1
1815a1bb01 hv: ept: store virtual address of EPT PML4 table
Most of the time, we use the virtual address of EPT PMl4 table,
not physical address.

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-20 10:40:32 +08:00
Shiqing Gao
0252ae9e11 hv: treewide: fix 'No definition in system for prototyped procedure'
- Remove those APIs without definition

- Minor changes to make sure the line length is less than 80

Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-20 10:38:32 +08:00
Xiangyang Wu
d28fff2b06 HV:treewide:Update the type of return value and parameters of atomic operations
There are many type conversions in the atomic
operations invoking reported by static analysis tool. These
type conversions voilate MISRA C.

To keep uniform naming convention, rename atomic operation
function names:
atomic_set_int/long --> atomic_set32/64;
atomic_clear_int/long --> atomic_clear32/64;
atomic_load --> atomic_load32;
atomic_store --> atomic_store32;
atomic_swap --> atomic_swap32;
atomic_readandclear --> atomic_readandclear32;
atomic_inc --> atomic_inc32;
atomic_dec --> atomic_dec32;
atomic_cmpxchg --> atomic_cmpxchg32;
atomic_xadd --> atomic_xadd32.
Update the type of atomic_load32/64, atomic_store32/64,
atomic_swap32/64, atomic_cmpxchg32/6.
Update related variables and callers.

Note: the type of return value and parameters of atomic_xadd32/64
still keep signed int/long since caller pass
negative variable to atomic_xadd32/64;

V1-->V2:
	Add comments for atomic_set/clear to differ from
	bitmap_set/clear.

Signed-off-by: Xiangyang Wu <xiangyang.wu@intel.com>
Reviewed-by: Junjie.Mao <junjie.mao@intel.com>
2018-07-19 14:39:47 +08:00
Zheng, Gen
20c80ea72a HV: bug fix on emulating msi message from guest
Current code has a mistake associating destination with
redirectionhint. So just use the destination mode to work out
destination mode.

When injecting the msi interrupt to vcpu in hypervisor layer,
current code ingnores the redirection hint(RH) bit of msi address
message from guest, and just use the destination mode and
destination ID. So correctly before injecting, check the RH bit,
if set, choose the vcpu that has lowest priority to inject msi.

Signed-off-by: Zheng, Gen <gen.zheng@intel.com>
Reviewed-by: Zhao, Yakui <yakui.zhao@intel.com>
Reviewed-by: Yin, Fengwei <fengwei.yin@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-19 11:09:09 +08:00
Xiangyang Wu
612cdceaca HV:treewide:Add exec_vmread32 and exec_vmwrite32 functions
In the hypervisor, VMCS fields include 16-bit fields,
32-bit fields, 64-bit fields and natural-width fields.
In the current implement, no exec_vmread32/exec_vmwrite32
is for accessing 32-bit fields. So there are many type
casting for the return value and parameters vmread/vmwrite
operations.

Create exec_vmread32 and exec_vmwrite32 functions to
access 32-bit fields in VMCS;
Update related variables type for vmread/vmwrite operations;
Update related caller according to VMCS fields size.

V1--V2:
        This is new part of this patch serial to only
        update 32 bit vmread/vmread opertions and related
        caller.
V2-->V3:
	Update related variables type in data structure
	 for exec_vmread32/exec_vmwrite32.
	Rename temp variable 'low' into 'value' for
	exec_vmread32;
V3-->V4:
	Remove useless type conversion.

Signed-off-by: Xiangyang Wu <xiangyang.wu@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
2018-07-18 12:31:42 +08:00
Huihuang Shi
f2774e496b HV:common:fix "integer type violations"
fix integer type violations,keep some violations which
related to hypcall and msix_entry_index.

V1->V2:1.modified API_MAJOR_VERSION from Makefile
       2.sync acrn_common.h changed to device model

Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-18 12:31:14 +08:00