Commit Graph

114 Commits

Author SHA1 Message Date
Mingqiang Chi
e4e38e1bfb hv:Check if VMX capability is locked with incorrect value
Check if the VMX capability is locked with incorrect value,
at the time when HV do the hardware capability detect.

Tracked-On: #861
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-09-07 10:23:04 +08:00
Mingqiang Chi
1b334ec08f hv: replace 'return' with 'panic' in bsp_boot_post
If hardware_detect_support() failed,as it return to
bsp_boot_init with a different stack and thus returning
from bsp_boot_init becomes an undefined behavior.

Tracked-On: #861
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-09-06 12:07:26 +08:00
Li, Fei1
06ab2b829f hv: mmu: add 1GB page capability check when CPU boot
Add 1GB large page support limit on our platform.

Tracked-On: #1124

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-09-03 09:32:49 +08:00
Yonghua Huang
7bc1a3f925 HV: Refine APICv capabilities detection
- by default, ACRN will not support platform without
   below APICv features:
    -- Use TPR shadow
    -- APIC-register virtualization

 - remove mmio emualtion of local APIC for guest

Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-08-24 09:58:58 +08:00
Yu Wang
a6c2065b2e hv: apicv: change the name of vapic to apicv
Remove the vapic name and unify to apicv.

Signed-off-by: Yu Wang <yu1.wang@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-08-23 08:55:30 +08:00
Mingqiang Chi
bdcc3aef22 hv: fixed compiling warning
removed some unnecessary variables and functions.

v1-->v2:
   Replace div-by-zero with an inline ASM code

Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-08-17 12:36:53 +08:00
Jason Chen CJ
e19d36fa6c change pcpu_sync_sleep to wait_sync_change
pcpu_sync_sleep monitor "uint64_t sync" change to "1UL << mask_bit",
which is not very clear to take use of it.
change it to wait_sync_change, means monitor "uint64_t sync" change to
"wake_sync", make the function clear to use.
And expose it for the usage of the following patches.

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
2018-08-15 12:05:18 +08:00
Jason Chen CJ
64a9b2b423 Revert "[REVERT-ME]: disable turbo mode"
This reverts commit b3690987bd.
2018-08-15 11:05:49 +08:00
Binbin Wu
a9151ff3fa hv: add compile time assert for static checks
Add two files to do compile time assert.
One is arch specific, and put in hypervisor/arch/x86/.
The other one is common, and put in hypervisor/common/.

If the statement is not true, there will be error during compile time.
The file will not increase the size of HV binary.

Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-08-14 13:05:06 +08:00
Zhao Yakui
e0eeb8a558 HV: Limit the CPUID with >= 0x15 leaf
In order to add the emulation of CPUID 0x16, it is expected that it is
handled when the CPUID 0x15 is supported. Otherwise we will have to emulate
other CPUID leaf, which makes it complex.
At the same time as Acrn HV has the requirements on the CPUs, it is restricted
that the CPUID should support the leaf >=0x15.

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-08-14 13:04:21 +08:00
Yang, Yu-chu
2fbf70780e HV: Logical conjunction needs brackets
The bracket is required when the level of precedence of
the operators is less than 13. Add the bracket to logical
conjunctions. The commit applys the rule to the files under

Signed-off-by: Yang, Yu-chu <yu-chu.yang@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-08-14 09:53:32 +08:00
Edwin Zhai
ab2961473f HV: VMX reshuffle: put EPT check before enabling
Current EPT check runs after EPT enabling in init_exec_ctrl. This
patch fixes wrong order.

Signed-off-by: Edwin Zhai <edwin.zhai@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-08-13 11:12:46 +08:00
Shiqing Gao
4e99afcc2f hv: treewide: fix 'Empty parameter list to procedure/function'
Use func(void) rather than func() for the function declaration and
definition based on MISRAC requirement.

Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
2018-08-13 09:28:12 +08:00
Shiqing Gao
40196d16af hv: treewide: fix 'inline function should be declared static'
MISRAC does not allow the use of an inline function with external
linkage.

What this patch does:
- Add the static keyword for the function that is only used in the
  definition file.
- Remove the inline keyword for the function that is used in multiple
  files.

v1 -> v2:
 * Move some functions to headers as static inline function if it is
    possible

Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
2018-08-10 10:16:04 +08:00
Shiqing Gao
cdd19dc51b hv: treewide: fix 'Variable should be declared static'
Declare a variable with the static qualifier if it is of file scope and
not used in another file.

v1 -> v2:
 * remove the unnecessary change to the following variables, which is
    due to the report issue

   struct multiboot_info *mbi = (struct multiboot_info *)
                        (HPA2HVA((uint64_t)boot_regs[1]));
   struct multiboot_mmap *mmap =
                                (struct multiboot_mmap *)
                                HPA2HVA((uint64_t)mbi->mi_mmap_addr);

Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
2018-08-10 10:15:36 +08:00
Sainath Grandhi
ff96453993 hv: Boot multiple OS for Partitioning mode ACRN
ACRN in partitioning mode boots multiple OS. Adding code to parse
VM description structure and a reference description structure for
booting 2 OSes.

Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
2018-08-09 15:01:57 +08:00
Sainath Grandhi
04b4c9110c hv: Adding a wrapper on top of prepare_vm0
Added prepare_vm function as a wrapper function on top of prepare_vm0.
This makes adding support for partition mode ACRN to boot multiple
VMs from HV cleaner.

Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
2018-08-08 15:53:46 +08:00
Jason Chen CJ
b1612e3072 add cpu_do_idle to handle idle
add wrap function cpu_do_idle in default_idle to handle arch cpu specific
idle operation.

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-08-08 10:00:51 +08:00
Jason Chen CJ
63ef1236de move global x2apic_enabled into arch dir
the x2apic_enabled should be x86 specific field.

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Xu, Anthony <anthony.xu@intel.com>
2018-08-07 09:55:13 +08:00
Jason Chen CJ
8a95b2abdc vcpu: add ext context support for world switch
move most of fields from run_context into ext_context for world switch.
these fields do not need doing runtime save/restore during vm exit/entry.

v3:
- update cr0/cr4 registers switch method

v2:
- use struct name ext_context instead of saved_context
- updated according to previous v2 patch

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-08-07 09:55:13 +08:00
Yonghua Huang
2299926a88 HV: Refine 'hv_main()' function usage
'hv_main()' wraps several logic which has no dependencies
   each other(enable VMX, prepare to create service os VM..),
   in this case, split this function to make code logic clear.

   remove 'is_vm0_bsp()' & 'hv_main()'
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-08-06 10:34:43 +08:00
Shiqing Gao
a71dedecd4 hv: treewide: fix 'Array has no bounds specified'
MISRAC requires that the array size should be declared explicitly.

This patch fixes the issues caused by the arrays that are defined in
link_ram.ld.in or assembly file.

v1 -> v2:
 * Update the solution based on the info from the following link.
   https://sourceware.org/binutils/docs/ld/Source-Code-Reference.html

   Fix pattern is like below:
   extern char start_of_ROM, end_of_ROM, start_of_FLASH;
   memcpy (& start_of_FLASH, & start_of_ROM, & end_of_ROM - &
start_of_ROM);

Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-08-03 12:40:21 +08:00
Xiangyang Wu
6e77a8d5f1 HV:treewide:rename enum vpic_wire_mode, stack_canary, segment_override, pde_index
For data structure types "enum vpic_wire_mode, struct stack_canary",
its name is identical with variable name in the same scope.
This MISRA C  violation is detected by static analysis tool.
For variables "segment_override, pde_index", its name is identical
with function name. This MISRA C  violation is detected.
Naming convention rule:Variable name can be shortened from
its data structure type name.

The following udpates are made:
enum vpic_wire_mode vpic_wire_mode-->enum vpic_wire_mode wire_mode
struct stack_canary stack_canary-->struct stack_canary stk_canary
uint8_t segment_override:1 --> uint8_t seg_override:1
uint32_t pde_index--> uint32_t pde_idx

V1-->V2:
	Remove update "enum cpu_state cpu_state-->enum cpu_state state"
	and "enum irqstate irqstate-->enum irq_ops_mode ops_mode", other
	patch will cover it.
V2-->V3:
	Update "uint32_t pde_index--> uint32_t pde_idx".

Signed-off-by: Xiangyang Wu <xiangyang.wu@linux.intel.com>
2018-07-31 11:20:21 +08:00
Mingqiang Chi
ae3004028b hv:Reshuffle console/uart code
The current hierarchy :
  CONSOLE --> SERIAL -->UART DRIVER
This patch remove SERIAL layer, that is console will
call UART driver directly, change it to:
  CONSOLE  --> UART DRIVER
Remove some related data structures and registration and callback.
Cleanup vuart.c

Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-30 16:25:16 +08:00
Xiangyang Wu
c477211d4e HV:treewide:rename struct key_info, pir_desc, map_params
For data structure types "struct key_info, struct pir_desc,
struct map_params", its name is identical with variable name
in the same scope. This MISRA C  violation is detected by
static analysis tool.
Naming convention rule:If the data structure type is used by only one
module and its name meaning is simplistic, its name needs prefix
shorten module name.

The following udpates are made:
struct key_info-->struct trusty_key_info
struct pir_desc-->struct vlapic_pir_desc
struct map_params-->struct mem_map_params

Signed-off-by: Xiangyang Wu <xiangyang.wu@linux.intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
2018-07-30 10:18:39 +08:00
Arindam Roy
a2fe964de8 HV: Rename functions beginning with "_"
V1:
In order to remove MISRA C violations for rule
219S, rename functions, macros whose name
starts with "_".
Also removed some __mmio functions because they are
duplicates and are not used anywhere.
Renamed functions like __assert, to asm_assert,
because they were only wrappers around asm calls.

V2:
Over and above the changes on V1, modified bitmap
functions names to lock (corresponding to unlock)
introduced in V1

Signed-off-by: Arindam Roy <arindam.roy@intel.com>
2018-07-30 10:11:54 +08:00
Huihuang Shi
a661ffa618 fix x86 dir integer violations
Fix x86 directory violations which related to integer problems,
some of problems are skipped because of ldra's false positive.

V1->V2 1.modified the code style
       2.fix all macro VM_EXIT_IO_INSTRUCTION related

Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-07-25 15:29:34 +08:00
Binbin Wu
b2802f3d1d hv: cpu: align general-purpose register layout with vmx
In current code, general-purpose register layout in run_context is not align with the
general-purpose register index when vmexit. So hv needs to map the index used during
vmexit to the index of the general-purpose register in run_context.
This patch align the layout, so that no mapping needed.

Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-07-25 13:05:38 +08:00
Yang, Yu-chu
91337da5a1 HV: logical and high level precedence expression needs brackets
Added brackets for expression to make it easy to understand and
reduce the mistake of precedence. The rule is applied to the
mixed same level of prevedence opeartors, high level presedence
operators and logical expression.

Signed-off-by: Yang, Yu-chu <yu-chu.yang@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-07-24 10:10:39 +08:00
Huihuang Shi
f2774e496b HV:common:fix "integer type violations"
fix integer type violations,keep some violations which
related to hypcall and msix_entry_index.

V1->V2:1.modified API_MAJOR_VERSION from Makefile
       2.sync acrn_common.h changed to device model

Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-18 12:31:14 +08:00
Mingqiang Chi
aa2b2d80d4 hv: change several APIs to void type
Change these 6 APIs to void type:
  init_default_irqs
  interrupt_init
  early_init_lapic
  init_lapic
  init_iommu
  destroy_iommu_domain
It has checked the argument of destroy_iommu_domain in shutdown_vm,
then no need to check it again inside destroy_iommu_domain.

Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-18 12:30:37 +08:00
Minggui Cao
2f2d108b1e HV: handle integral issue report by MISRA-C
The main focus on: constant suffix U/UL; parameters cast like
uint32 to a uint16 variable; unify some APIs interface,
consist with the callers.

also modify some places to unify code style

Signed-off-by: Minggui Cao <minggui.cao@intel.com>
2018-07-16 16:24:29 +08:00
Yin Fengwei
619c600021 hv: cpu state update should be moved just before halt.
The cpu offline requester monitor the target cpu state
to detect whether target cpu is put to offline already.

So we should only update the cpu state to offline after
all other operations are finished.

Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Reviewed-by: Eddie Dong <Eddie.dong@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-07-16 13:06:08 +08:00
Shiqing Gao
cb0009f4d2 hv: cpu: fix 'Pointer arithmetic is not on array'
Use the array for lapic_id directly to avoid the unnecessary pointer
arithmetic.

With current implementation,
  lapic_id_base is always a byte array with CPU_PAGE_SIZE elements

What this patch does:
 - replace 'uint8_t *lapic_id_base' with 'uint8_t
   lapic_id_array[CPU_PAGE_SIZE]' to make the boundary explicit
 - add a range check to ensure that there is no overflow

 v2 -> v3:
 * update the array size of lapic_id_array per discussion with Fengwei

 v1 -> v2:
 * remove the unnecessary range check in parse_madt in cpu.c

Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-13 13:08:05 +08:00
Arindam Roy
88a3205d3c HV: Fix missing brackets for MISRA C Violations
Patch 1 of 7.
Added changes to make sure Misra C violations are fixed
for rules 11S and 12S.

Signed-off-by: Arindam Roy <arindam.roy@intel.com>
2018-07-13 09:09:12 +08:00
Zide Chen
5cb9972919 hv: cleanup cpu.c and cpu.h
- move all relocatoin code from cpu.c and cpu.h to reloc.c and reloc.h
- no any logic changes

Signed-off-by: Zide Chen <zide.chen@intel.com>
Reviewed-by: Yin fengwei <fengwei.yin@intel.com>
2018-07-11 10:25:16 +08:00
Zide Chen
92cd2612fc hv: fixup addresses in the c code for relocation
- Trampoline code doesn't have the same relocation delta with HV,
  Need to manually patch them when referenced from HV
- replace all references to CONFIG_RAM_START with the actual HV load
  address

Signed-off-by: Zheng Gen <gen.zheng@intel.com>
Signed-off-by: Zide Chen <zide.chen@intel.com>
Reviewed-by: Yin Fengwei <fengwei.yin@intel.com>
2018-07-11 10:25:16 +08:00
Jason Chen CJ
b3690987bd [REVERT-ME]: disable turbo mode
there is a bug for system hang on SBL bootloader after we enabled turbo mode.
so add tmp patch to disable turbo mode as the work-around.
after SBL fixed it, we revert this patch.

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-10 16:37:40 +08:00
Xiangyang Wu
1185884b97 HV:treewide:Clean up field names of struct cpuinfo_x86
In the data struct cpuinfo_x86, some field names have
prefix x86, others don't have prefix.

In order to unify names, update field names of struct
cpuinfo_x86 as per its usage purpose, remove prefix x86.

V1-->V2:
	Resolve conflict in cpu.c by rebase command
V2-->V3:
        Remove track-on id as per jack's comments

Signed-off-by: Xiangyang Wu <xiangyang.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-10 13:24:55 +08:00
Yang, Yu-chu
39159ebe16 HV: Assignment should not mix with operator
Removed the postfix and prefix operation in assignment expression.
Noncompliant code example:
1) *a++ = *b ++;
2) a = arr[--b];

Signed-off-by: Yang, Yu-chu <yu-chu.yang@intel.com>
2018-07-10 11:56:36 +08:00
Yonghua Huang
2e3135042a HV: Rename 'CPU_BOOT_ID' to 'BOOT_CPU_ID'
- code cleanup to set a more smooth name

Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
2018-07-10 11:51:12 +08:00
Xiangyang Wu
b79f350977 HV:CPU: Add 'U/UL' for constant value in CPU module
There are unsinged constant values don't have 'U/UL' suffix
in the HV reported by static analysis tool.

Add 'U/UL' suffix for unsigned constant values as needed.

Tracked-on: ccm0001001-247033
Signed-off-by: Xiangyang Wu <xiangyang.wu@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
2018-07-10 10:28:33 +08:00
Xiangyang Wu
90d8e28560 HV:CPU: Narrow integer conversion
There are some narrow integer conversion violations
in the HV reported by static analysis tools.

The narrow integer conversions are resolved by
following methods:
	* Explicit type conversion as needed;
	* Update suffix of constant value as 'U'
	  as needed.

cked-on: ccm0001001-247033
Signed-off-by: Xiangyang Wu <xiangyang.wu@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
2018-07-10 10:28:33 +08:00
Xiangyang Wu
49d1dc1534 HV:treewide: Clean up -1U or -1UL
According to C99 standard, -1 integer constant with 'U/UL'
suffix has no type.

To explicit the integer constant:
Update -1U or -1UL as ~0U or ~0UL, or invalid number according
to usage case.

V1-->V2:
	Update parameter name and type of send_startup_ipi since
	the second parameter is used as pcpu_id;
	Update related comments for code clearity.
V2-->V3:
	Update comments of struct acrn_irqline;
	rename  cpu_startup_dest as dest_pcpu_id in the second
	parameter of send_startup_ipi.

Tracked-on: ccm0001001-247033
Signed-off-by: Xiangyang Wu <xiangyang.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-10 10:27:33 +08:00
Jack Ren
d924482ca7 hv: update versioning scheme
* introduce EXTRA_VERSION to replace RC_VERSION
* add daily tag into the version information
* unify the hypervisor and device model version

Signed-off-by: Jack Ren <jack.ren@intel.com>
2018-07-09 18:12:14 +08:00
Xiangyang Wu
474e9af216 HV:CPU: Add 'U/UL' for unsigned const value
According to MISRA C:2012, suffix 'U/UL' shall be for
unsigned const value, the member of enum variable should
not be used to compare with integer variable.

Add 'U/UL' for unsigned const value in the CPU module;
Use Macro insteading of enum feature_word since the member
of feature_word is used to compare with integer variable;
Use hex number insteading of Macro in the assembly code.

V1-->V2:

        Update the suffix of some constant value as 'UL'
        according to its'storage variable;
        Split MACRO updates used in the assembly code
	in other patch.

Signed-off-by: Xiangyang Wu <xiangyang.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-09 10:27:21 +08:00
Mingqiang Chi
deb44402e3 hv:fix "missing for discarded return value" for memcpy_s and strcpy_s
It will print error information inside memcpy_s if
the parameteter is invalid, the caller can not check
the return value for memcpy_s/strcpy_s/strncpy_s
code like this:
int a(void) {
return 0;
}
int b(void){
a();
}
fix as follow:
int a(void) {
return 0;
}
int b(void){
(void)a();
}

Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
2018-07-09 09:22:37 +08:00
Xiangyang Wu
b5b83ca0d8 HV:CPU:Clean up variable type for CPU module
There are some implicit type conversion in the CPU module,
this voilates MISRA C:2012 required rules.

We walk through each functions of CPU module, update
some variable type and the return value type of
the function, and add 'U/UL' for related const value.

V1-->V2:
        Rebase the branch, resolve some conflict.
V2-->V3:
        Update commit info for V2.
V3-->V4:
        Few updates for fixing error instroduced during
	resolving conflict.

Signed-off-by: Xiangyang Wu <xiangyang.wu@intel.com>
2018-07-06 11:32:50 +08:00
Mingqiang Chi
666430a3d4 hv:fix "missing for discarded return value" for memset
No need to check the return value for memset
code like this:
int a(void) {
	return 0;
}
int b(void){
	a();
}
fix as follow:
int a(void) {
	return 0;
}
int b(void){
	(void)a();
}

Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-05 14:14:48 +08:00
Yonghua Huang
3f9b0d53f5 HV: rename functions in cpu.c
- rename 'cpu_set_logical_id()' to 'set_current_cpu_id()'
- rename 'cpu_find_logical_id()' to 'get_cpu_id_from_lapic_id()'
- some clean up in cpu.c & trampolines.s

Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
2018-07-05 12:45:44 +08:00