Commit Graph

184 Commits

Author SHA1 Message Date
Binbin Wu
efb249235a hv: vtd: merge lines for a statement if needed.
Becuase the number of character of a line is 120.
Merge lines for a statement if needed.

Tracked-On: #1855
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-20 13:30:13 +08:00
Binbin Wu
e35a8e8cff hv: vtd: typo fix
dmar_uint -> dmar_unit
remove i in line 756 added by accident.

Tracked-On: #1855
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-20 13:30:13 +08:00
Zheng, Gen
b32e689a64 hypervisor: use "wbinvd" carefully in RT environment
Due to the side-effect to cache of "wbinvd" instruction, just apply it
in case of noncoherent DMA.

Tracked-On: #1824
Signed-off-by: Zheng, Gen <gen.zheng@intel.com>
Reviewed-by: Binbin Wu <binbin.wu@intel.com>
2018-11-16 10:24:23 +08:00
Binbin Wu
2c7c909e38 hv: vtd: fix the pre-allocated context table number
In current code, there is an out of range access to the array buses defined in struct struct context_table.
This patch defines CONFIG_IOMMU_BUS_NUM to replace CONFIG_IOMMU_INIT_BUS_LIMIT, which is clearer.
CONFIG_IOMMU_BUS_NUM equals to (CONFIG_IOMMU_INIT_BUS_LIMIT + 1).

Tracked-On: #1807
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-14 09:18:18 +08:00
Huihuang Shi
7bb09f75da fix "Procedure is not pure assembler"
Misra C reqires assembly code should comply with
the rules list below:
  The assembly code's functionality should match the function's
name.If not,pls encapsulate the assembly code and give a suitable
name for describing the functionality.
V1->V2:
    1.remove the dead code
    2.update detail comment

V2->V3:
    1.replace the macro name with upper case.
    2.remove the typedef and rename the struct name
"_descriptor_table_" to "descriptor_table".

Tracked-On: #861
Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-13 16:28:58 +08:00
Binbin Wu
0800624fe5 hv: vtd: use pre-defined function for bdf calculation
Use pre-defined inline function for pci bus/slot/function calculation.

Tracked-on: #1747
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-08 09:12:30 +08:00
Tw
a8a1e22981 hv:vtd: fix minor bug in domain count
domain count should be CONFIG_MAX_VM_NUM+1 instead of CONFIG_MAX_IOMMU_NUM+1

Tracked-On: #861
Signed-off-by: Tw <wei.tan@intel.com>
Reviewed-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-07 15:36:12 +08:00
Shiqing Gao
366042cac2 hv: fix integer violations
- Fix the integer violations related to the following rules:
  1. The operands to shift operations (<<, >>) shall be unsigned
     integers.
  2. The operands to bit operations (&, |, ~) shall be unsigned
     integers.

- Replace 12U with CPU_PAGE_SHIFT when it is address shift case.

v1 -> v2:
 * use existed MACRO to get bus/slot/func values
 * update PCI_SLOT MACRO to make it more straightforward
 * remove the incorrect replacement of 12U with CPU_PAGE_SHIFT
   dmar_fault_msi_write

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-06 16:18:56 +08:00
Xiangyang Wu
99586e32cc HV:treewide:rename vm data structure
For data structure types "struct vm", its name is identical
with variable name in the same scope. This is a MISRA C  violation.

Naming convention rule:If the data structure type is used by multi
modules, its corresponding logic resource is exposed to external
components (such as SOS, UOS), and its name meaning is simplistic
(such as vcpu, vm), its name needs prefix "acrn_".

The following udpates are made:
struct vm *vm-->struct acrn_vm *vm

Tracked-On: #861

Signed-off-by: Xiangyang Wu <xiangyang.wu@linux.intel.com>
2018-11-05 15:35:49 +08:00
Li, Fei1
f1ed6c503c hv: mmu: remove alloc_page() API
No one would call this API for now. So remove it.

Tracked-On: #861
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2018-11-02 13:15:48 +08:00
Shiqing Gao
111f9726d0 hv: fix integer violations
The operands to shift operations (<<, >>) shall be unsigned integers.

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-02 11:05:32 +08:00
Binbin Wu
43f6bdb726 hv: vtd: fix device assign failure for partition mode
For partition mode, there is no vm0_domain created for iommu.
In current code, it will return error when try to remove a device
from vm0_domain, which casue failure of device assignment in
partition mode.

Tracked-On: #1680
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-01 09:34:49 +08:00
Shiqing Gao
60d0a75243 hv: fix integer violations
The operands to shift operations (<<, >>) shall be unsigned integers.

v1 -> v2:
 * replace 12U with CPU_PAGE_SHIFT when it is address shift case.
 * replace 6UL with 0x6UL

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-10-31 15:01:57 +08:00
Tw
4d01e60eda hv: vtd: remove dynamic allocation for iommu_domain
Replace list of iommu_domains with static array

Tracked-On: #861
Signed-off-by: Tw <wei.tan@intel.com>
Reviewed-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-10-31 13:06:07 +08:00
Tw
dda08957d7 hv: vtd: remove dynamic allocation for dmar_drhd_rt
Predefine a dmar_drhd_rt table for all possible dmar unit

Tracked-On: #861
Signed-off-by: Tw <wei.tan@intel.com>
Reviewed-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-10-31 13:06:07 +08:00
Tw
f05bfeb961 hv: vtd: remove dynamic page allocation for root&ctx table
Preserve pages for each vtd root table and ctx table

Tracked-On: #861
Signed-off-by: Tw <wei.tan@intel.com>
Reviewed-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-10-31 13:06:07 +08:00
Kaige Fu
05834927cc HV: Fix boot failure of partition mode
When drdh_info_array[0].ignore = false with partition mode enabled,the following
assert error will be triggered when trying to boot vm:

Assertion failed in file arch/x86/vtd.c: fatal error

The root cause is that root_table_addr reading from CPU3(vm2's bsp) is NULL.

This patch move the init_iommu which initialize root_table_addr before starting
secondary cores and flush the cache at the end if the function to avoid getting
NULL pointer from secondary cores.

Tracked-On: #1160
Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Reviewed-by: Binin Wu <binbin.wu@intel.com>
2018-10-26 09:16:56 +08:00
Huihuang Shi
ea32c34ae1 HV:fix "Pointer param should be declared pointer to const"
Fix violations for function whose parameter can be read-only.

Tracked-On: #861
Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-10-25 13:45:14 +08:00
Sainath Grandhi
09193c3913 hv: x2apic support for acrn
All the platforms supported by ACRN supports x2APIC. So enabled
x2APIC for ACRN hv. Removed any code that is needed for xAPIC mode
of operation.

Tracked-On: #1455
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
Reviewed by:  Yonghua Huang <yonghua.huang@intel.com>
2018-10-25 13:41:29 +08:00
Jason Chen CJ
6485666a93 Revert "hv: x2apic support for acrn"
This reverts commit 348e2ba168.
2018-10-19 17:24:56 +08:00
Sainath Grandhi
348e2ba168 hv: x2apic support for acrn
All the platforms supported by ACRN supports x2APIC. So enabled
x2APIC for ACRN hv. Removed any code that is needed for xAPIC mode
of operation.

Tracked-On: #1455
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
Reviewed by:  Yonghua Huang <yonghua.huang@intel.com>
2018-10-17 08:46:42 +08:00
Huihuang Shi
c6c1e42b79 HV:fix 'missing for discarded return value' violations
Return value should be checked,fix it by add
"void" when the function return value is not used.

V1->V2:
    replace printf with pr_warn.
V2->V3:
    change the commit to make read easily.

Tracked-On:#861

Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-10-16 13:31:02 +08:00
Shiqing Gao
0317cfb2b6 hv: fix 'No brackets to then/else'
- add missing brackets for 'if/else' statements based on MISRA-C
  requirements

v1 -> v2:
 * add brackets for each conditions in 'if' statements to improve
   the readability
 * modify 'ptdev_init' to make the logic clearer

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
2018-10-11 16:48:11 +08:00
Binbin Wu
2111fcffa5 hv: vtd: add config for bus limitation when init
Currently, hypervisor doesn't have the information of pci devices
on the platform when init. In order to reduce boot time and memory
usage, hypervisor set a bus limitation for pci devices when init vtd.
However, maximum bus number varies on different platforms.
This patch add a config for the bus limitation.
Set 0xF as the default value for the maximum bus number on sbl platform.
Set 0xFF as the default value for the maximum bus number on uefi platfrom.

Tracked-On: #1339
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-09-27 11:05:22 +08:00
Junjun Shan
89ca54cafa hv:Fix unused var value on all paths
MISRAC checks whether a variable is assigned a value not used in
all branches of a program. Var value which is unused on all paths
can be removed with a consequent improvement in the readability
and efficiency of the code. This patch is used to fix these
violations.

Tracked-On: #861
Signed-off-by: Junjun Shan <junjun.shan@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-09-26 11:10:21 +08:00
Sainath Grandhi
8c9e0d17db hv: init_iommu rework to enable IOMMU for partition mode ACRN
Current code enables IOMMU from init_iommu_vm0_domain which is called
from vm0/sos boot sequence. For partition mode VMs, this is not called as
VMs are numbered from 1.

This patch adds support to initialize root table pointer for each IOMMU
and enable all IOMMUs from init_iommu. Hence IOMMUs are enabled even
though ACRN does not boot vm0.

This patch also has changes to fix #1270.

Tracked-On: #1246 #1270
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
2018-09-20 11:14:07 +08:00
Zhang, wenling
d4afddc0a7 Revert "hv: init_iommu rework to enable IOMMU for partition mode ACRN"
This reverts commit d8508e4229.
2018-09-19 09:24:02 +08:00
Shiqing Gao
9d602208e5 hv: remove unused MACROs
MISRA-C states that redundant macros reduce the maintainability of code.

In some cases, we would like to keep the current unused macros for code
completeness, such as cpu registers. These macros might be used later.

This patch removes some unused macros that is not critical for code
completeness.

v1 -> v2:
 * Keep TRUSTY_VERSION in trusty.c.
   Yadong will cook another patch which will utilize TRUSTY_VERSION.

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-09-18 09:43:43 +08:00
Sainath Grandhi
d8508e4229 hv: init_iommu rework to enable IOMMU for partition mode ACRN
Current code enables IOMMU from init_iommu_vm0_domain which is called
from vm0/sos boot sequence. For partition mode VMs, this is not called as
VMs are numbered from 1.

This patch adds support to initialize root table pointer for each IOMMU
and enable all IOMMUs from init_iommu. Hence IOMMUs are enabled even
though ACRN does not boot vm0.

Tracked-On: #1246
Signed-off-by: Sainath Grandhi sainath.grandhi@intel.com
2018-09-18 09:21:31 +08:00
Binbin Wu
5329ced1ea hv: vtd: fix potential buffer overflow in suspend/resume
In current code of suspend_iommu/resume_iommu, there is potential buffer overflow
according to the code.
This patch put the buffer to struct dmar_drhd_rt, so that no need to access the buffer
via index.

Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Tracked-On: #1252
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-09-18 09:09:18 +08:00
Shiqing Gao
b1ba12ae1b hv: clean up spinlock wrappers
- remove the following unnecessary spinlock wrappers
  #define IOMMU_LOCK(u) spinlock_obtain(&((u)->lock))
  #define IOMMU_UNLOCK(u) spinlock_release(&((u)->lock))
- remove the unnecessary comments in vpic.c

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-09-13 09:28:20 +08:00
Shiqing Gao
bcaede0c0e hv: treewide: fix 'Use of function like macro'
- convert function like macros to inline functions based on MISRA-C
  requirement
- remove some unused and duplicated macros

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
2018-09-11 10:49:48 +08:00
Shiqing Gao
97aeb7f4ff hv: pgtable: fix 'Use of function like macro'
Convert HPA2HVA, HVA2HPA, GPA2HVA and HVA2GPA to inline functions.

v1 -> v2:
 * Modify the following statement.
   rsdp = biosacpi_search_rsdp((char *)hpa2hva((uint64_t)(*addr << 4)),
                                                                0x400);
   Instead of "(uint64_t)(*addr << 4)", "(uint64_t)(*addr) << 4U" would
   be clearer.

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
2018-09-07 11:11:06 +08:00
Shiqing Gao
4360235edf hv: treewide: fix 'Macro parameter not in brackets'
Add the brackets for Macro parameter to avoid the unintentional
mistakes.

A simple example that may cause mistakes:
        #define minus(x) -x
When the following call is made,
        z = minus(a-b)
it becomes:
        z = -a-b;
where "-a - b" is equivalent to "(-a) - b" rather than "- (a - b)", as
expected.

v2 -> v3:
 * convert DMAR_WAIT_COMPLETION to inline function
 * remove the macro PIC_PIN_FOREACH and implement the well-formed
   for loop in each case
 * replace __CPP_STRING with STRINGIFY and remove the unused CPP_STRING

v1 -> v2:
 * Remove some changes to function like macro since MISRA-C requires to
   use inline functions if it is possible.
   These MACRO brackets violations will be fixed together when fixing
   other issues related to function like macro.

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
2018-09-07 10:22:00 +08:00
Shiqing Gao
54439ecae1 hv: treewide: fix 'Expression is not Boolean'
MISRA-C requires that the controlling expression of an if statement or
an iteration-statement shall be Boolean type.

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
2018-09-03 11:23:53 +08:00
Shiqing Gao
96dba0d8fe hv: fix MISRA-C issues related to space or newline
This patch fixes the following issues:
- No newline after semi colon.
- No space after semi colon in for expression.
- No space between if, while, for and expresn.

v1 -> v2:
 * Fix the typo for the for loop change.

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
2018-09-03 09:35:15 +08:00
Binbin Wu
f95d07dc43 hv: vtd: use EPT as translation table for PTDev in SOS
In current code, the address translation type for passthrough devices
in SOS is passthrough type, which means the device in SOS can access
the whole physcial memory.
This patch uses SOS EPT to translate address for passthrough
devices. So that the memory of VMM or trusty can be protected from
SOS PTDev.

Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Reviewed-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-08-23 11:46:57 +08:00
Mingqiang Chi
c43d0e4f01 hv:Changed several APIs to void type
Since these APIs always return 0,
change them to void type,
vcpu_set_cr0()
vmx_write_cr0()
vcpu_set_cr4()
vmx_write_cr4()
kick_notification()
tsc_deadline_handler()
dmar_fault_handler()
ptdev_interrupt_handler()

Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
2018-08-23 08:54:54 +08:00
Yan, Like
a8cd6925fc hv: pirq: clean up irq handlers
There are several similar irq handlers with confusing function names and it's
not friendly to call update_irq_handler() to update a proper handler after
request_irq().

With this commit, a single generic irq handler is being used, in which, no lock
need to be acquired because our design could guarantee there is no concurrent
irq handling and irq handler request/free.
A flags field is added to irq_desc struct to select the proper processing flow
for an irq. Irqflags is defined as follows:
 IRQF_NONE       (0U)
 IRQF_LEVEL      (1U << 1U)       /* 1: level trigger; 0: edge trigger */
 IRQF_PT         (1U << 2U)       /* 1: for passthrough dev */

Because we have only one irq handler, update_irq_handler() should be replace by
set_irq_trigger_mode(), whichs set trigger mode flag of a certian irq.
Accordingly, the code where called update_irq_handler() need to be updated.

Signed-off-by: Yan, Like <like.yan@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-08-17 14:25:52 +08:00
Yan, Like
f77d885d7e hv: pirq: clean up unnecessary fields of irq_desc
This commit cleans up fiels of struct irq_desc:
- remove name, irq_desc_state, irq_cnt and irq_lost_cnt which are not used.
- remove irq_ prefix of irq_lock field of struct irq_desc;
- change enum irq_state to enum irq_use_state;

Signed-off-by: Yan, Like <like.yan@intel.com>
Reviewed-by: Li, Fei <fei1.li@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-08-17 14:25:52 +08:00
Yan, Like
08dd698d99 hv: pirq: rename common irq APIs
This commit cleans up the irq APIs which are a bit confusing.
 - pri_register_handler(), normal_register_handler() and
   common_register_handler() into request_irq(), and removed
   the unnecessary struct irq_request_info;
 - rename the unregister_common_handler() to free_irq();

After the revision, the common irq APIs becomes:
 - int32_t request_irq(uint32_t irq,
                    irq_action_t action_fn,
                    void *action_data,
                    const char *name)

 - void free_irq(uint32_t irq)

Signed-off-by: Yan, Like <like.yan@intel.com>
Reviewed-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-08-15 10:40:43 +08:00
Yan, Like
f6e45c9b13 hv: pirq: remove unnecessary dev_handler_node struct
Since we don't support shared irq, dev_handler_node which works as action node,
is not needed anymore.

This commit removes the dev_handler_node struct and does some relevant changes,
including:
 - moves necessary fields to struct irq_desc: action, priv_data, name; and
   removes unused handler_data;
 - changes return type of pri_/normal_register_handler() from dev_handler_node*
   to int32_t, which is irq num (>= 0) on success, and errno (> 0) on failure.
 - changes unregister_irq_handler() to take argument unint32_t instead of
   dev_handler_node*;
 - changes are made to the places where these APIs are called.

Signed-off-by: Yan, Like <like.yan@intel.com>
Reviewed-by: Eddie Dong  <eddie.dong@intel.com>
2018-08-14 16:48:45 +08:00
Yan, Like
d773df9135 hv: pirq: remove support of physical irq sharing
Because multiple physical devices sharing a single physical pin would be
assigned to a same VM, so UOS could handle the irq sharing. So that we could
remove the physical irq sharing support in HV.

This commit removes the irq sharing support, changes including:
 - removed the dev_list field in irq_desc, and clean up codes for the list
   operation;
 - replace IRQ_ASSIGNED_SHARED and IRQ_ASSIGNED_NOSHARE with IRQ_ASSIGNED;
 - remove argument indicating irq is shared;
 - revise irq request flow for pt devices to remove dependency on irq sharing:
   register irq on adding remapping entery and unregister irq on removal an
   entry, and do not register/unregister at remapping an entry.

Signed-off-by: Yan, Like <like.yan@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-08-14 16:48:45 +08:00
Yan, Like
c492a14e53 hv: pirq: do not indicate priority when allocate vector
It's not necessary to specify priority for dynamic allocated vector, because
nested irq is not supported on HV, and irq of any priority would cause VM exit.

This commit makes the following changes:
 - remove the argument indicating priority in struct irq_request_info and
   following functions:
    ptdev_activate_entry()
    find_available_vector()
    irq_desc_alloc_vector()
    normal_register_handler()
 - change the macro of vector ranges:
    VECTOR_DYNAMIC_START/END for dynamically allocable vectors;
    VECTOR_FIXED_START/END for fixed allocated vectors, such as vector for
    timer etc.

Signed-off-by: Yan, Like <like.yan@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-08-10 10:20:31 +08:00
Shiqing Gao
b4a2ff5022 hv: treewide: fix 'Prototype and definition name mismatch'
Fix the parameter name mismatch between API declaration and definition.

v2 -> v3:
 * Fix two more violations which are missed in previous report.
   shell_puts and console_write

v1 -> v2:
 * Replace 'ret_desc' with 'desc'

Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
2018-08-06 16:04:40 +08:00
Mingqiang Chi
61782d7430 hv:Rename port/mmio read and write APIs
mmio_write_long --> mmio_write32
mmio_write_word --> mmio_write16
mmio_write_byte --> mmio_write8
mmio_read_long  --> mmio_read32
mmio_read_word  --> mmio_read16
mmio_read_byte  --> mmio_read8

io_write_long --> pio_write32
io_write_word --> pio_write16
io_write_byte --> pio_write8
io_read_long  --> pio_read32
io_read_word  --> pio_read16
io_read_byte  --> pio_read8
io_write      --> pio_write
io_read       --> pio_read

setl --> set32
setw --> set16
setb --> set8

igned-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
2018-08-02 14:03:38 +08:00
Xiangyang Wu
27fbf9b215 HV:treewide:Fixing pointer castings
In the hypervisor, there are many casts from
an void pointer to integer pointer, then from
integer pointer to structure pointer.
These pointer castings are detected by static analysis
tool. All pointer casts are violations, There are
some duplicated pointer cast. This will make deviation
analysis complex.
BTW, there are one useless pointer casting and one
wrong pointer casting in the hypervisor.

Remvoe duplicated pointer casts to make deviation analysis
simple;
Remove one useless pointer casting;
Update one wrong pointer casting.

Note: There are many void type pointer casts, non-void type
pointer is casted to void type pointer, char type pointer casts,
non-char type pointer is casted to char type pointer. These pointer
casting is need by the memory management module, IO moudle etc.
Deviation analysis will be made and recoded in the analysis report.

V1-->V2:
	Fix mixing pointer and array voilation.
V2-->V3:
	Remvoe pointer casting from integer pointer into
	non-void/non-char pointer directly;
	Remove redundant type conversion.

Signed-off-by: Xiangyang Wu <xiangyang.wu@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
2018-07-24 10:56:24 +08:00
Yang, Yu-chu
91337da5a1 HV: logical and high level precedence expression needs brackets
Added brackets for expression to make it easy to understand and
reduce the mistake of precedence. The rule is applied to the
mixed same level of prevedence opeartors, high level presedence
operators and logical expression.

Signed-off-by: Yang, Yu-chu <yu-chu.yang@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-07-24 10:10:39 +08:00
Huihuang Shi
c0b55cdf1b HV:vtd:fix all integer related violations
Fix vtd.h and vtd.c all integer violations.

Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
2018-07-23 10:22:32 +08:00
Huihuang Shi
a17653b3cc HV:transfer DMAR_[GS]ET_BITSLICE to inline function
Transfer DMAR_[GS]ET_BITSLICE to inline function
to limit the parameter type and return type.

Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
2018-07-23 10:22:32 +08:00
Mingqiang Chi
aa2b2d80d4 hv: change several APIs to void type
Change these 6 APIs to void type:
  init_default_irqs
  interrupt_init
  early_init_lapic
  init_lapic
  init_iommu
  destroy_iommu_domain
It has checked the argument of destroy_iommu_domain in shutdown_vm,
then no need to check it again inside destroy_iommu_domain.

Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-18 12:30:37 +08:00
Huihuang Shi
8017ebdf82 HV:vtd:dma change the macro to the inline function
Function like macro changed to be inline function to limit
the return type and parameter type.

V1->V2:change the apis to letter case.
Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-17 15:42:26 +08:00
Huihuang Shi
d8c376503f HV:vtd:cap change the macro to the inline function
Function like macro changed to be inline function to limit
the return type and parameter type.

Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-17 15:42:26 +08:00
Huihuang Shi
aa5027a30c HV:misc:fix "signed/unsigned conversion with cast"
Signed/unsigned conversion should add cast explicitily
or change the type of them to the same.

V1->V2:Fixed the 0U to 0UL because of the mistakes.
V2->V3:remove unsed macro

Signed-off-by: HuiHuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-16 15:45:40 +08:00
Arindam Roy
944776f238 HV: Fix new MISRAC violations for brackets
Fix remaining 11S and 12S violations. These
are after the 7 patches submitted earlier.

Signed-off-by: Arindam Roy <arindam.roy@intel.com>
2018-07-16 11:02:38 +08:00
Huihuang Shi
680c64de13 HV:transfer vmid's type to uint16_t
vmid's type prefered to be uint16_t.

V1->V2:vmid from uint32_t transfer to uint16_t
V2->V3:add range check to hcall's vmid parameter
V3->V4:seperate the declaration and actual code.
V4->V5:remove range check from hcall's vmid parameter

Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-13 14:13:38 +08:00
Arindam Roy
4aa6cdacf7 HV: Fix missing brackets for MISRA C Violations
Patch 5 of 7
Added changes to make sure Misra C violations are fixed
for rules 11S and 12S.

Signed-off-by: Arindam Roy <arindam.roy@intel.com>
2018-07-13 09:09:12 +08:00
Ying Liu
fd81655e60 HV: add the missing brackets to loop body
MISRA-C requires the use of brackets, even when there is only one
statement in the loop body.

Signed-off-by: Ying Liu <ying2.liu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-12 17:27:29 +08:00
Yang, Yu-chu
dd695f3cfa HV: Moving operators out from conditions
To follow the Misra-c standard, any operators should be done outside
the conditions. Removed the prefix, postfix and bitwise shift from
conditions.

Signed-off-by: Yang, Yu-chu <yu-chu.yang@intel.com>
2018-07-09 13:10:34 +08:00
Huihuang Shi
96372ed09c HV:misc:add suffix U to the numeric constant
Add suffix U to the numeric constant

Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-05 11:29:46 +08:00
Jason Chen CJ
6ca99713dd Revert "hv: More changes to enable GPU passthru"
This reverts commit 8d50d40ff8.
2018-07-05 11:06:47 +08:00
Huihuang Shi
5c75f29a2d modified the lapic_id type to uint8_t
According intel mannual and ACPI mannual,lapic_id length is 1 byte.

V1->V2:
  Add U suffix to the numeric when do arithmetic operation on lapic.

Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-29 13:16:02 +08:00
Anitha Chrisanthus
8d50d40ff8 hv: More changes to enable GPU passthru
Snoop control is not supported in the graphics VT-d engine and so should
be disabled in the PTEs. Also enabled iommu for graphics in the
dmar_drhd array.

v2: removed disable iommu in handle_one_drhd and combined if cond.
v3: minor code review changes
v4: moved the snoop control change to ept.c to accomodate upstream changes
Signed-off-by: Anitha Chrisanthus <anitha.chrisanthus@intel.com>
Reviewed-by: Gong Zhipeng <zhipeng.gong@intel.com>
2018-06-29 00:50:01 +08:00
Huihuang Shi
c5c338aecc vtd:fix "negative shift"
MISRA C doesn't allowed negative shift, changed any potential signed value
to unsigned value.

Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-22 12:18:45 +08:00
Junjie Mao
d705970eb2 HV: vmx: convert hexadecimals used in bitops to unsigned
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
2018-06-21 13:12:39 +08:00
Huihuang Shi
be0f5e6c16 HV:treewide:fix "expression is not Boolean"
MISRA C explicit required expression should be boolean when
in branch statements (if,while...).

Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-20 14:19:47 +08:00
Kaige Fu
1f8f1a4ecb HV: fix unused warning at RELEASE version
We will get following warnings when build acrn as release version. This patch
fix those warnings.

No functional change.

...
arch/x86/cpu.c: In function ‘stop_cpus’:
arch/x86/cpu.c:727:20: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
   if (get_cpu_id() == i) /* avoid offline itself */
                    ^~
arch/x86/vtd.c: In function ‘dmar_enable_translation’:
arch/x86/vtd.c:84:12: warning: unused variable ‘start’ [-Wunused-variable]
   uint64_t start = rdtsc();                       \
...
arch/x86/guest/instr_emul.c: In function ‘get_gla’:
arch/x86/guest/instr_emul.c:615:6: warning: variable ‘error’ set but not used [-Wunused-but-set-variable]
  int error;
...

Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-20 12:27:58 +08:00
Huihuang Shi
977c4b20b5 fix parted of "missing for discarded return value"
MISRA C required that return value should be used, missing for it should
add "(void)" prefix before the function call.
Some function can be declared without return value to avoid this problem.

Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-19 16:21:45 +08:00
Kaige Fu
359b93f4cc HV: Remove misuesed __unused
There are some __unused attached to variables. But, those variables
are used by the function actually.

This patch remove them. No functional change.

Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-06-14 13:42:42 +08:00
Yin Fengwei
8eaf4d2ab6 hv: Add suspend/resume callback for vtd
To handle S3 enter/exit for vtd.

Signed-off-by: Edwin Zhai <edwin.zhai@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-14 13:41:45 +08:00
Junjie Mao
8c4a5987e3 irq: convert irq/vector numbers to unsigned
Currently irq and vector numbers are used inconsistently.

    * Sometimes vector or irq ids is used in bit operations, indicating
      that they should be unsigned (which is required by MISRA C).

    * At the same time we use -1 to indicate an unknown irq (in
      common_register_handler()) or unavailable irq (in
      alloc_irq()). Also (irq < 0) or (vector < 0) are used for error
      checking. These indicate that irq or vector ids should be signed.

This patch converts irq and vector numbers to unsigned 32-bit integers, and
replace the previous -1 with IRQ_INVALID or VECTOR_INVALID. The branch
conditions are updated accordingly.

Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-12 10:21:58 +08:00
David B. Kinder
f4122d99c5 license: Replace license text with SPDX tag
Replace the BSD-3-Clause boiler plate license text with an SPDX tag.

Fixes: #189

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2018-06-01 10:43:06 +08:00
Junjie Mao
16152fad79 HV: debug: stop using ## __VA_ARGS__
It is an extension of GCC CPP to:

* allow omitting a variable macro argument entirely, and
* use ## __VA_ARGS__ to remove the the comma before ## __VA_ARGS__ when
  __VA_ARGS__ is empty.

The only use of ## _VA_ARGS__ is to define the pr_xxx() macros, with the first
argument being the format string and the rest the to-be-formatted arguments. The
format string is explicitly spelled out because another macro pr_fmt() is used
to add to the format string a prefix which is customizable by defining what
pr_fmt() expands to.

For C99 compliance, this patch changes the pr_xxx() macros in the following
pattern.

    - #define pr_fatal(fmt, ...)				\
    -     do_logmsg(LOG_FATAL, pr_fmt(fmt), ## __VA_ARGS__);	\
    + #define pr_fatal(...)					\
    +     do_logmsg(LOG_FATAL, pr_prefix __VA_ARGS__);		\

Reference:

* https://gcc.gnu.org/onlinedocs/gcc/Variadic-Macros.html#Variadic-Macros

Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
2018-05-29 14:13:44 +08:00
Zide Chen
8f16faab04 HV: further cleanup of header inclusions
According to the comments in hypervisor:
 " This file includes config header file "bsp_cfg.h" and other
	hypervisor used header files.
	It should be included in all the source files."

this patch includes all common header files in hypervisor.h
then removes other redundant inclusions

Signed-off-by: Zide Chen <zide.chen@intel.com>
2018-05-25 10:45:56 +08:00
Zheng, Gen
c5f860e1cb MMU: bug fix on operating va <=> pa convertion
Before referencing to physical address of devs such as lapic, ioapic,
vtd, and uart, switch to virtual address.
Use a phisical address of pml4 to write CR3.

Signed-off-by: Zheng, Gen <gen.zheng@intel.com>
2018-05-15 17:25:55 +08:00
Zheng, Gen
d02f4d4a5f refine: change the address arguments type of mmio access api
Change the address arguments type of mmio access api from uint64_t
to void*.

Signed-off-by: Zheng, Gen <gen.zheng@intel.com>
2018-05-15 17:25:55 +08:00
Jason Chen CJ
1e2c201827 vtd: add page allocation check for root_table & context_table
if failed to allocate page structure for root_table or context_table,
ASSERT system and return.

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Tian, Kevin <kevin.tian@intel.com>
2018-05-15 17:25:27 +08:00
Jason Chen CJ
4ea7588241 vtd: context_table_addr should be hpa
add necessary HPA2HVA/HVA2HPA transition for context_table_addr

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Tian, Kevin <kevin.tian@intel.com>
Acked-by: Xu, Anthony <anthony.xu@intel.com>
2018-05-15 17:25:27 +08:00
Jason Chen CJ
403076e6b9 vtd: dmar_uint->root_table_addr should be hpa
add necessary HPA2HVA/HVA2HPA transition for root_table_addr

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Tian, Kevin <kevin.tian@intel.com>
Acked-by: Xu, Anthony <anthony.xu@intel.com>
2018-05-15 17:25:27 +08:00
Binbin Wu
d0c773f22d vtd: fix memory coherency issue of vtd table
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Kevin Tian <kevin.tian@intel.com>
2018-05-15 17:25:26 +08:00
Jason Chen CJ
bf36022ce9 ept: change eptp to PA
eptp should be record as PA.

this patch changed nworld_eptp, sworld_eptp and m2p eptp to PA type,
necessary HPA2HVA/HVA2HPA transition is used for them after the change.

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-15 17:25:25 +08:00
yechunliang
b11460f7f6 replace malloc and memset with calloc
malloc: allocate a block of memory, the contents of the block are undefined.
calloc: allocate a block of memory for an array of num elements and initializes all its bits to zero.

Signed-off-by: yechunliang <yechunliangcn@163.com>
2018-05-15 17:25:24 +08:00
Qi Yadong
8d67f292ef Rename TIME_MS_DELTA to CYCLES_PER_MS
TIME_MS_DELTA is not clear enough, rename it to CYCLES_PER_MS.

Signed-off-by: Qi Yadong <yadong.qi@intel.com>
2018-05-15 17:19:39 +08:00
Eddie Dong
7a3a539b17 initial import
internal commit: 14ac2bc2299032fa6714d1fefa7cf0987b3e3085

Signed-off-by: Eddie Dong <eddie.dong@intel.com>
2018-05-11 14:44:28 +08:00