Commit Graph

937 Commits

Author SHA1 Message Date
Victor Sun
c20d095a63 HV: refine sos_vm config header
The sos_vm config under arch/x86/configs/$(CONFIG_BOARD) folder should be
customer specific configuration, leave it back to customer.

When hypervisor start building, it will check whether BOARD specific sos_vm.h
exist in configs/$(CONFIG_BOARD) folder. If exist, then include this header;
if not, then include default sos_vm config header under configs/default folder.

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-25 21:30:49 +08:00
Victor Sun
66e0023029 HV: sanitize vm config
Add a API to sanitize vm_configs[] array, in this API, we will do sanity
check for VM configurations and refill some fields in vm_configs[]. If
sanity check is failed, the HV would reject to boot.

About pcpu_bitmap of SOS_VM:

We should not hard code pcpu_bitmap for SOS_VM, this is not convenient for
unconfigured boards. The pcpu_bitmap follows a very simple rule:

All physical CPUs except ocuppied by Pre-launched VMs are all belong to
SOS_VM. In this way, the pcpu_bitmap of a SOS_VM is decided by pcpu_bitmap
status in PRE_LAUNCHED_VMs.

To get the correct pcpu_bitmap of SOS_VM, We need to setup another rule, that
the vm_configs[] array should follow the order of PRE_LAUNCHED_VM - SOS_VM
strictly.

With this patch enabled, the pcpu_bitmap field of sos vm config is not needed
to configure;

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-25 21:30:49 +08:00
Jason Chen CJ
285b64faec replace arch_switch_to with pure asm code instead of inline asm
after compile, the compiled code could change rsp, so use pure asm code
to avoid such problem which will cause schedule switch failure.

Tracked-On: #2410
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
2019-01-25 11:39:47 +08:00
Yonghua Huang
88eeae3f1f hv: remove unused fields in 'struct acrn_vcpu'
below fields are defined but not used.
- sync, pause_cnt & dbg_req_state.

Tracked-On: #861
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2019-01-25 11:26:33 +08:00
Manisha Chinthapally
5e99565b74 security: Increase buffer size to avoid buffer overflow error
The array indexx of "vm_list" may be out of bound.
Updated the size of "vm_list"

Bug: ACRN-2544
Tracked-On: #2385
Signed-off-by: Manisha Chinthapally <manisha.chinthapally@intel.com>
2019-01-25 10:24:55 +08:00
Mingqiang Chi
899c914606 hv:Fix MISRA-C violations in vm.h
-- fix "Macro parameter not in brackets" for PLUG_CPU(n)
-- fix "Array has no bounds specified" for vm_configs[]

Tracked-On: #861
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
2019-01-24 08:23:49 +08:00
Jason Chen CJ
15030f6f2c io_emul: reshuffle io emulation path
This is the following patch after removing pending_pre_work, it make sure
all io emulation is done on its own cpu.

For hv emulated request, it follows the steps:
	hv_emulate_pio->emulate_pio_complete
	hv_emulate_mmio->emulate_mmio_complete

For dm emulated request, it follows the steps:
	acrn_insert_request->dm_emulate_io_complete
while in acrn_insert_request, it could trigger scheduling out then resume by
hcall_notify_ioreq_finish, or busy wait for ioreq completion if polling mode
is enabled.

Tracked-On: #2394
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Xu, Anthony <anthony.xu@intel.com>
2019-01-23 16:21:17 +08:00
Jason Chen CJ
fb41ea5cfb io_emul: remove pending_pre_work
Now we do not need pending_pre_work anymore, as we can make sure IO request
VCPU resume from where it paused.

Now only three fixed points will try to do schedule:
- vcpu_thread: before vm entry, will check reschedule flag and to it if needed
- default_idle: loop check reschedule flag to see if need switch out
- io request: if IO REQ need DM's handle, it will schedule out

Tracked-On: #2394
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Xu, Anthony <anthony.xu@intel.com>
2019-01-23 16:21:17 +08:00
Jason Chen CJ
4fc54f952e schedule: add full context switch support
this patch added full context switch support for scheduling, it make sure
each VCPU has its own stack, and added host_sp field in struct sched_object
to record host stack pointer for each switch out object.

Arch related function arch_switch_to is added for context switch.

To benefit debugging, a name[] field is also added into struct sched_object.

Tracked-On: #2394
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Xu, Anthony <anthony.xu@intel.com>
2019-01-23 16:21:17 +08:00
Jason Chen CJ
21092e6f6d schedule: use per_cpu idle object
To support full context switch scheduling, each physical
CPU must have its own idle sched_obj.

Tracked-On: #2394
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Xu, Anthony <anthony.xu@intel.com>
2019-01-23 16:21:17 +08:00
Shiqing Gao
5e94788689 hv: vlapic: remove calcvdest
- remove `calcvdest` and use `vlapic_calcdest` directly

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-23 13:43:09 +08:00
Shiqing Gao
b489aec3e1 hv: idt: separate the MACRO definition
For binutils <= 2.26:
'U' suffix for unsigned constant is not accepted by binutils assembler.

This patch separates the MACRO definition for ASSEMBLER
and non-ASSEMBLER code in idt.h

Tracked-On: #2200
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
2019-01-23 08:23:48 +08:00
Minggui Cao
173b534b05 HV: modularization cleanup instr_emul header file
separate the private macro/structure/functions, which are just used
in instr_emul.c;

and move instr_emul.h to public include path.

Tracked-On: #1842
Signed-off-by: Minggui Cao <minggui.cao@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2019-01-22 10:50:30 +08:00
Victor Sun
18dbdfd5d7 HV: replace lapic_pt with guest flag in vm_config
The member of lapic_pt in acrn_vm_config will be replaced by
guest_flag of LAPIC_PASSTHROUGH;

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-21 18:03:31 +08:00
Victor Sun
68aa718ca0 HV: replace bootargs config with acrn_vm_os_config
The member of bootargs in acrn_vm_config will be replaced by
acrn_vm_os_config struct.

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-21 18:03:31 +08:00
Victor Sun
23f8e5e598 HV: replace memory config with acrn_vm_mem_config
The member of mem_size and start_hpa in acrn_vm_config struct will
be replaced with the acrn_vm_mem_config struct;

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-21 18:03:31 +08:00
Victor Sun
253b25937b HV: remove vm_config pointer in acrn_vm struct
For each vm_array[] item, its config is located in corresponding
index of vm_configs[], so vm_config pointer is not needed any more.

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-21 18:03:31 +08:00
Victor Sun
7bf9b1be2c HV: enable pcpu bitmap config for partition mode
All the legacy cpu configration in vm_description.c are all cleaned up;

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-21 18:03:31 +08:00
Victor Sun
2e32fba536 HV: remove sworld_supported in acrn_vm_config
We will use guest_flags of SECURE_WORLD_ENABLED to check wthether
sworld is supported.

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-21 18:03:31 +08:00
Victor Sun
ec199d9609 HV: add get_sos_vm api
This patch creates a new get_sos_vm() api to replace get_vm_from_vmid(0U)
because VM 0 might not be SOS VM now;

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-21 18:03:31 +08:00
Victor Sun
e6117e0d5b HV: refine launch vm interface
When pcpu enter guest mode, it will call launch_vms() function to launch
VMs in global vm_configs array.

In launch_vms() function, current pcpu will go through vm_config array list
and check whether it is a bsp of configured VM, if yes then it will prepare
corresponding VM and start it. The index of vm_config array will be specified
to VM id.

The first least significant bit in pcpu_bitmap means the bsp of the VM.

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-21 18:03:31 +08:00
Victor Sun
49e6deaf26 HV: rename the term of vm0 to sos vm
Under sharing mode, VM0 is identical with SOS VM. But the coupling of
SOS VM and VM 0 is not friendly for partition mode.

This patch is a pure term change of vm0 to sos VM, it does not change
any code logic or senmantic.

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-21 18:03:31 +08:00
Mingqiang Chi
55e5ed2e1a hv:move ept violation handler to io_emul.c
move this api from ept.c to io_emul.c to avoid
reverse dependency.

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
2019-01-21 13:49:54 +08:00
Mingqiang Chi
1d98b7012d hv: move 'setup_io_bitmap' to vm.c
move this api from io_emul.c to vm.c to avoid reverse
dependency

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
2019-01-21 13:49:54 +08:00
Mingqiang Chi
de4ab6fdfa hv:modulization for IO Emulation
-- rename io.c to io_emul.c, add io_emul.h
-- rename io_request.c to io_req.c,rename ioreq.h to io_req.h
-- move some APIs declaration from ioreq.h to io_emul.h
   related IO emulation

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
	modified:   ../doc/acrn.doxyfile
	modified:   Makefile
	renamed:    arch/x86/io.c -> arch/x86/io_emul.c
	renamed:    common/io_request.c -> common/io_req.c
	modified:   include/arch/x86/hv_arch.h
	modified:   include/arch/x86/io.h
	new file:   include/arch/x86/io_emul.h
	renamed:    include/arch/x86/ioreq.h -> include/arch/x86/io_req.h
2019-01-21 13:49:54 +08:00
Minggui Cao
808d0af2c8 HV: check to avoid interrupt delay timer add twice
to edge interrupt, like eth device, it can triger the interrupt again
when its IRQ in softirq entry queue or in timer list.

in current design, for sofrirq entry, it calls "list_del" before
"list_add_tail", to avoid the entry added twice.

so for interrupt delay timer, add to check if it is started
then just drop the next one; to avoid it enqueue twice.

Tracked-On: #2365
Signed-off-by: Minggui Cao <minggui.cao@intel.com>
Reviewed-by: Li, Fei1 <fei1.li@intel.com>
2019-01-21 11:18:08 +08:00
Victor Sun
d9c38bafa5 HV: remove unused mptable info
mptable pointer in acrn_vm_config struct and also extern struct mptable_vm1/2
declared in mptable.h are not used any more, remove them.

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-18 11:50:00 +08:00
Victor Sun
a8e4f227ba HV: add new acrn_vm_config member and config files
- add new struct member for acrn_vm_config;

- add sharing_config.c file with initialized vm_config array;

- add SOS VM config header for apl-mrb/apl-nuc/up2 and dnv-cb2 board;

- and partition_config.c file with dummy vm_config array;

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-18 11:50:00 +08:00
Victor Sun
c4a230f313 HV: rename the term of vm_description to vm_config
This patch is a pure term change of vm_description to vm_config,
the struct name of vm_description is changed to acrn_vm_config.

The patch does not change any code logic or senmantic.

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-18 11:50:00 +08:00
Minggui Cao
f45605dd49 HV: modularization to separate CR related code
1. move the CR related code from vmcs/vcpu to vCR source files.
2. also add virtual_cr.h to acrn.doxyfile to avoid doc failure.

Tracked-On: #1842
Signed-off-by: Minggui Cao <minggui.cao@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
2019-01-18 10:50:18 +08:00
Mingqiang Chi
8265770f05 hv:Change acrn_vhm_vector to static
-- Change acrn_vhm_vector to static, only used in io_request.c
-- Add set_vhm_vector() api, it will call this api instead of
   acrn_vhm_vector except io_request.c

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Anthony Xu <anthony.xu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-18 08:29:36 +08:00
Zide Chen
b22c8b696b hv: add more MSR definitions
- add definitions of all architectural MSRs
- add definitions of majority of non architectural MSRs

The non-architectural MSR definitions are specific to particular CPU model
or family.

e.g. MSR 0xE01 could refer to different MSRs in difference processors, and
in this patch, MSR_R0_PMON_BOX_STATUS is chosen without any particular reasons.
  MSR_R0_PMON_BOX_STATUS in Xeon Processor 7500 Series
  MSR_C0_PMON_EVNTSEL0 in Xeon E5 V3 family
  MSR_UNC_PERF_GLOBAL_CTRL in 6th plus generations Core Processors

Tracked-On: #1867
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-17 12:53:09 +08:00
Yan, Like
6641bc7949 hv: remove ACRN_REQUEST_TMR_UPDATE and unnecessary codes
Because ACRN_REQUEST_TMR_UPDATE is not needed anymore, this commit remove
the MACRO definition and its related logic, including following functions:
- apicv_batch_set_tmr()
- vlapic_apicv_batch_set_tmr()
- vlapic_set_tmr_one_vec()
- vioapic_update_tmr()

Tracked-On: #2343
Signed-off-by: Yan, Like <like.yan@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-17 08:48:22 +08:00
Yan, Like
fc61536b07 hv: rework EOI_EXIT_BITMAP update logic
This commit changes the EOI_EXIT_BITMAP as follows:
- add a eoi_exit_bitmap to vlapic structure;
- go through all the RTEs and set eoi_exit_bitmap in the vlapic structure when related RTE fields are modified;
- add ACRN_REQUEST_EOI_EXIT_UPDATE, if eoi_exit_bitmap changed, request the corresponding vcpu to write the bitmap
  to VMCS.

Tracked-On: #2343
Signed-off-by: Yan, Like <like.yan@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-17 08:48:22 +08:00
Yan, Like
f15cc7d6de hv: set/clear TMR bit like hardware behave
Current ACRN implementation update TMR bits one time only when related RTE fields changed,
which is not acting like actual hardware.

From SDM vol3 10.8.4:
"Upon acceptance of an interrupt into the IRR, the corresponding TMR bit is cleared for
edge-triggered interrupts and set for leveltriggered interrupts."

This commit change the ACRN implementation to set/clear corresponding TMR bit when inject
intr to vlapic.

Tracked-On: #2343
Signed-off-by: Yan, Like <like.yan@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-17 08:48:22 +08:00
Chaohong guo
2ca218bfb8 HV: Removed ununsed struct vm_lu_mem_map from guest.h
The struct vm_lu_mem_map is not used by code. Remove it.
Also, add bracks () for the variables in macro foreach_vcpu.

Tracked-On: #861
Signed-off-by: Chaohong guo <chaohong.guo@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-15 13:48:19 +08:00
Li, Fei1
0c27c9586b hv: security: remove superfluous prototype
An external object or function shall be declared once in one and only one file.
Since it already declared in include/arch/x86/security.h, we shall remove it.

Tracked-On: #861
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2019-01-14 15:33:05 +08:00
yuhong.tao@intel.com
270d2d2727 hv: virq: fix attempt to change parameter passed by value
The MISRA C stardand do not allow change parameter passed by value

Tracked-On: #861
Acked-by: Eddie Dong <eddie.dong@intel.com>
Signed-off-by: Tao Yuhong <yuhong.tao@intel.com>
2019-01-14 10:34:12 +08:00
Zide Chen
3a5b5b084f hv: fix MISRA-C violations in vpic.c and vioapic.c
120D: Pointer param should be declared pointer to const.
  add 'const' qualifier to function signatures when it's possible.
  - vioapic_set_irqline_nolock()
  - vioapic_set_irqline_lock()
  - master_pic()
  - vpic_ocw2()
  - vpic_ocw3()
  - vpic_set_irqline()
  - vpic_get_irqline_trigger_mode()
  - vm_pic()
  - vm_ioapic

93S: Value is not of appropriate type.
  change '0' to '0U' in function vpic_icw1().

Tracked-On: #861
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-11 23:04:54 +08:00
Shiqing Gao
4b7fe2e215 hv: init: minor fix related to header file
Header file shall not be included multiple times.
The following prototype shall be used.

        #ifndef INIT_H
        #define INIT_H

        /* body */

        #endif /* INIT_H*/

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
2019-01-11 21:53:09 +08:00
Huihuang Shi
11f0f72627 hv:fix violations
fix
1."Value is not of appropriate type."
2."Function prototype/defn param type mismatch"

Tracked-On: #861
Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-11 16:52:28 +08:00
Zide Chen
12211fb67b hv: fix MISRA-C violations in dm/vpci
120D: Pointer param should be declared pointer to const.
  Add 'const' qualifier to function parameters whenever it's possible:
    alloc_pci_vdev()
    enumerate_pci_dev()
    pci_scan_bus()
    pci_enumeration_cb()
    partition_mode_vpci_init()
    partition_mode_vpci_deinit()
    sharing_mode_vpci_init()
    sharing_mode_vpci_deinit()
    vpci_cleanup()

45D: Pointer not checked for null before use.
  Check pointer vm in vpci_reset_ptdev_intr_info() before using it.

Tracked-On: #861
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2019-01-11 14:28:45 +08:00
Victor Sun
8ad48ff488 HV: refine vmptable for partition mode
Merge separated mptable.c of BOARDs to unified vmptable.c;

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-11 10:55:14 +08:00
Min Lim
f574d5926b profiling: code cleanup
This is the profiling code cleanup to avoid type conversion
and align tab/space in data structure definition

Tracked-On: #2257
Signed-off-by: Min Lim <min.yeol.lim@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-11 10:54:38 +08:00
Shiqing Gao
e2971ebc98 hv: vlapic: code clean-up
* rename `vlapic_set_intr_ready` to `vlapic_accept_intr`
 * replace calling of `vlapic_intr_edge` with `vlapic_set_intr`
 * remove `vlapic_intr_level` and `vlapic_intr_edge`

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-11 09:44:10 +08:00
Mingqiang Chi
1fc10d514c hv:Unify the MACRO name for invalid interrupt pin
There are the following definitions in hypervisor,
  define IOAPIC_INVALID_PIN      0xffU
  define VPIC_INVALID_PIN        0xffU
  define PTDEV_INVALID_PIN       0xffU
this patch unify them to:
  define INVALID_INTERRUPT_PIN   0xffffffffU

Tracked-On: #861
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
2019-01-10 23:52:25 +08:00
Mingqiang Chi
7725fe3b50 hv: shell & vuart: Change interrupt pin to uint32_t
Change the type from uint8_t to uint32_t for shell and vuart

Tracked-On: #861
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-10 23:52:25 +08:00
Mingqiang Chi
49166fc3ac hv: passthrough: Change interrupt pin to uint32_t
-- Change the type from uint8_t to uint32_t
-- Remove some typecast
-- Change union source_id

Tracked-On: #861
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-10 23:52:25 +08:00
Mingqiang Chi
87afe65f86 hv: vioapici: Change interrupt pin to uint32_t
-- Change the type from uint8_t to uint32_t
-- Remove some typecast

Tracked-On: #861
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-10 23:52:25 +08:00
Mingqiang Chi
50deda8819 hv: vpic: Change interrupt pin to uint32_t
-- Change the type from uint8_t to uint32_t
-- Remove some typecast

Tracked-On: #861
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-10 23:52:25 +08:00
Mingqiang Chi
196912fb6d hv: ioapic: Change interrupt pin to uint32_t
Change the type from uint8_t to uint32_t for interrupt pin

Tracked-On: #861
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-10 23:52:25 +08:00
Zide Chen
10db11b00a hv: emulate IA32_FEATURE_CONTROL MSR
All features controlled by IA32_FEATURE_CONTROL are disabled from guests,
so set the Lock bit to prevent it from writing by guests.

Also hide the MSR_IA32_FEATURE_CONTROL_VMX_NO_SMX bit from guest.

Tracked-On: #1867
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-10 12:23:44 +08:00
Zide Chen
86526cddc5 hv: disable more features from guest CPUID
Silicon Debug Feature: CPUID.01H.ECX[11]
- We can't allow guests to have direct access to silicon wide resources.

Machine Check Exception: CPUID.01H.EDX[5]
- Need HV support before exposing it to the guests.

Perfmon and Debug: CPUID.01H.ECX[15]
Debug Store: CPUID.01H.EDX[21], CPUID.01H.ECX[2], CPUID.01H.ECX[4]
- HV emulation is needed to separate host and guest monitoring data.
- guest CPUID.0AH is forced to all-zero in ACRN so it makes sense to clear
  these bits as well.

Tracked-On: #1867
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2019-01-09 23:04:41 +08:00
Li, Fei1
087fbfe136 hv: coding style: remove basic type declaration use
Typedefs that indicate size and signedness should be used in place of
the basic numerical types

Tracked-On: #861
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2019-01-08 15:41:39 +08:00
Mingqiang Chi
7907fef59e hv:Rename several APIs for vpic and vioapic
vpic:
   vpic_set_irq         --> vpic_set_irqline
   vpic_get_irq_trigger --> vpic_get_irqline_trigger_mode
vioapic:
   vioapic_set_irq_nolock --> vioapic_set_irqline_nolock
   vioapic_set_irq        --> vioapic_set_irqline_lock
   vioapic_send_intr      --> vioapic_generate_intr

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
2019-01-08 14:32:20 +08:00
Shiqing Gao
272439d37f hv: rename register_io_emulation_handler
This patch renames `register_io_emulation_handler` to
`register_pio_emulation_handler`.

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-08 11:28:13 +08:00
Minggui Cao
c5e072432a HV: modularization to refine boot/bsp related code.
1. add static for local functions and variables.
2. move vm_sw_loader from vcpu to vm
3. refine uefi.c to follow the code rules.
4. separate uefi.c for vm0 boot and bsp two parts. bsp layer just
access native HW related, can't access vm/vcpu, vm0 boot part can
access vm / vcpu data structure.

Tracked-On: #1842
Signed-off-by: Minggui Cao <minggui.cao@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
2019-01-08 08:46:15 +08:00
Mingqiang Chi
09ff94fc49 hv:Change structure boot_cpu_data to static
-- Change boot_cpu_data to static, only used in cpu_caps.c,
-- Add get_cpu_info() api, it will call this api instead of
   boot_cpu_data except cpu_caps.c

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
2019-01-07 11:23:22 +08:00
Mingqiang Chi
7c4dd0d277 hv:Move pm state structure to pm.h
-- move structure 'cpu_state_info' from cpu_caps.h to host_pm.h
-- add get_cpu_pm_state_info() api

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
2019-01-07 11:23:22 +08:00
Zide Chen
a4b166d5e8 hv: add missing MSRs to unsupported_msrs[]
SMRR (System-Management Range Register) is disabled from vMTRR,
so treat IA32_SMRR_PHYSBASE and IA32_SMRR_PHYSMASK as unsupported.

IA32_SMBASE is available only when IA32_VMX_MISC[15] is set.

IA32_FIXED_CTR0/1/2 are available only when CPUID.0AH:EDX[4:0] is non-zero.

Intel Processor Trace feature has been disabled and the associated MSRs
need to be in unsupported_msr[] as well.

Tracked-On: #1867
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-04 16:05:50 +08:00
Chaohong guo
971eb84c20 HV: add const qualifier for functions' argments in vlapic.c
If a argment is not changed in function, MISRA recommends to add const
qualifier for that argement.

Tracked-On: #861
Signed-off-by: Chaohong guo <chaohong.guo@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-02 16:22:11 +08:00
Minggui Cao
7ebc4877c8 HV: refine cmdline code, move parts into dbg_cmd
move the debug related command handle into debug/dbg_cmd.c;
so release build will not include that.

Tracked-On: #2170
Signed-off-by: Minggui Cao <minggui.cao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-02 12:15:53 +08:00
Minggui Cao
a5ca305cf6 HV: add API to change vuart base & irq config
1. add an API to support vuart COM base and irq configured;
2. add the HV cmd to be parsed for vuart COM base & irq.

Tracked-On: #2170
Signed-off-by: Minggui Cao <minggui.cao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-02 12:15:53 +08:00
Minggui Cao
537adaeb46 HV: cleanup CONFIG_COM_IRQ related code
move CONFIG_COM_IRQ code into vuart, because it is just
used for vuart.

Tracked-On: #2170
Signed-off-by: Minggui Cao <minggui.cao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-02 12:15:53 +08:00
Minggui Cao
fde0bcc1ce HV: disable vuart when dbg uart is disabled
vuart it used for SOS to output log to HV console,
so if dbg uart is disabled, it need be disabled too:
just unregister its PIO.

Tracked-On: 2170
Signed-off-by: Minggui Cao <minggui.cao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-02 12:15:53 +08:00
Li, Fei1
860c444c55 hv: coding style: add const qualifier for some function
Add `const` qualifier for lookup_address and find_vcpuid_entry.

Tracked-On: #861
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2019-01-02 09:35:00 +08:00
Li, Fei1
6f0edfc38d hv: coding style: use the defined data type __packed
1) Use __attribute__((packed)) instead of #pragma pack(1)
2) Use the defined data type __packed instead of __attribute__((packed))

Tracked-On: #861
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2019-01-02 09:35:00 +08:00
Yan, Like
1dfd05cdac hv: fix mis-usage of "PAGE_SHIFT"
Replace PAGE_SHIFT with MSI_ADDR_DEST_SHIFT in ptirq_build_physical_msi(), since it's not correct in semantics.

Tracked-On: #2209
Signed-off-by: Yan, Like <like.yan@intel.com>
2018-12-28 23:46:49 +08:00
Mingqiang Chi
5c6fe01c87 hv:Change pcpu_active_bitmap to static
-- Change pcpu_active_bitmap to static, only used in
   cpu.c
-- add get_pcpu_active_bitmap()

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-12-28 23:26:31 +08:00
Mingqiang Chi
682824de6d hv:Change phys_cpu_num to static
-- change phys_cpu_num to static
-- add get_pcpu_nums() and is_pcpu_active() APIs
-- replace phys_cpu_num with get_pcpu_nums() except cpu.c

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-12-28 23:26:31 +08:00
Min Lim
9c27ed1090 profiling: fix the profiling tool crash by page faults
Profiling tools are broken, which cause page faults during collection.
The issue happens by enabling SMAP recently. Therefore,
we use stac() and clac() to allow access to buffers allocated by guest.

Tacked-On: #2157
Signed-off-by: Min Lim <min.yeol.lim@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-27 16:24:38 +08:00
Shuo A Liu
952943c3ea hv: decouple IO completion polling from idle thread
IO completion polling will access vcpu and vm structs. If doing it in
idle thread, there might be some race issues between vm destroying and
idle thread. They are running on different cores.
Got suggestion from Fengwei, decouple the polling action from idle
thread and just do it in vcpu thread, then we can guarantee idle thread
in really idle status.

Tracked-On: #1821
Signed-off-by: Shuo A Liu <shuo.a.liu@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
Reviewed-by: Yin Fengwei <fengwei.yin@intel.com>
2018-12-27 12:35:40 +08:00
Shuo A Liu
a0154223f6 hv: clear NEED_RESCHEDULE flag in schedule
Now, need_reschedule will test_and_clear the bit NEED_RESCHEDULE in
schedule context, then call schedule. It is not a exact match with the
name.
This patch move the flag clearing into scheudle, and need_reschedule
just check and return.

Tracked-On: #1821
Signed-off-by: Shuo A Liu <shuo.a.liu@intel.com>
Reviewed-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-27 12:35:40 +08:00
Shuo A Liu
e8ac97671f hv: use asm_pause() to replace inline ASM to satisfy MISRAC
pause_cpu() --> asm_pause()
hlt_cpu() --> asm_hlt()
inline ASM pause --> asm_pause()

Tracked-On: #1821
Signed-off-by: Shuo A Liu <shuo.a.liu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-27 12:35:40 +08:00
Binbin Wu
21aa1907fd hv: vcpuid: cpuid leaf 07h has subleaf
Two changes:

1. cpuid leaf 07h has subleaf:
According to SDM 3-194 Vol.2A, Table 3-8, cpuid leaf 07h has sub-leaves.
cpuid.07.eax reports the maximum input for sub-leaves.
Since there is no definition for subleaf > 0 in SDM, hv only supports subleaf 0.

2. In currently hv code, cpuid leaf function 14h is disabled,
CPUID.07H:EBX.INTEL_PROCESSOR_TRACE should be disabled as well.

Tracked-On: #2198
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Reviewed-by: Li, Fei1 <fei1.li@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
2018-12-27 09:05:12 +08:00
Yonghua Huang
c1fc7f5fce hv: remove the usage of 'atoi()'
this function is not from libc but has the same name,
  atoi() in libc is unbounded and not safe.

  replace this function with 'strtol_deci()' in this case.

Tracked-On: #2187
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-26 13:50:26 +08:00
Shiqing Gao
b3c199d043 hv: mmio_read: add const qualifier
This patch fixes the MISRA-C violations related to mmio_read**
 * add `const` qualifier in implementation of mmio_read**
   `const` qualifier shall be added

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
Reviewed-by: Li, Fei1 <fei1.li@intel.com>
2018-12-26 10:57:41 +08:00
Yonghua Huang
3998c97756 HV: [v2] bugfix in 'hv_access_memory_region_update()'
- bugfix:the actual 'size' of memory region that
    to be updated is incorrect.

  - replace CONFIG_UEFI_STUB with DMAR_PARSE_ENABLED
    when update memory pages for ACPI_RECLAIM region,
    as DMAR_PARSE_ENABLED may be enabled on non-EFI
    platform.

V2 update:
    wrap roundup to 2M and rounddown to 2M inline
    functions.

Tracked-On: #2056
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
2018-12-25 22:06:02 +08:00
Yonghua Huang
ea672c5b07 hv: update coding style for tampoline.c
- add API get trampoline_start16_paddr() instead
    of exporting this global variable.
  - other minor update.

Tracked-On: #2095
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-25 13:25:14 +08:00
Sainath Grandhi
ef03385f42 hv: Write Buffer Flush - VT-d
This patch does the following changes
According to VT-d spec Section 6.8 "Write Buffer Flushing" DRAM write buffers
are flushed implicitly upon Remapping Hardware Caches Invalidation even on
platforms that set RWBF to 1 in capability register. So removed write buffer
flushing as current ACRN issues cache invalidation commands in all cases.

Tracked-On: #1855
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
2018-12-24 22:18:30 +08:00
David B. Kinder
c358d29c89 doc: fix vhm_request doxygen comment
Table contents weren't rendered correctly in
developer-guides/hld/hv-io-emulation.html, so
fix the doxygen comments.

Tracked-on: #1684

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2018-12-21 08:50:53 -08:00
Li, Fei1
cf47f6cff8 hv: coding style: refine the remaining functions to one exit point
Refine the remaining functions in the head file to one exit point

Tracked-On: #861
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2018-12-21 19:39:56 +08:00
Li, Fei1
36dcb0f605 hv: lib: refine inline assembly use in bitmap operation
Try to minimize the C code in inline assembly function. Now only
construct data structure and return a value is permitted.

Tracked-On: #861
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2018-12-21 19:39:56 +08:00
Li, Fei1
738f2536fe hv: coding style: refine cpu related function to one exit
2) Fix procedure has more than one exit point.

Tracked-On: #861
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2018-12-21 13:34:01 +08:00
Jason Chen CJ
ff0703dd40 scheduler: make scheduling based on struct sched_object
use struct sched_object as the main interface of scheduling, then
make scheduler as an independent module to vcpu:
- add struct sched_object as one field in struct vcpu
- define sched_object.thread for switch_to thread
- define sched_object.prepare_switch_out/in for prepare_switch before
  switch_to
- move context_switch_out/context_switch_in into vcpu.c as
  vcpu.sched_obj.prepare_switch_out/in
- make default_idle as global idle.thread for idle_thread
- make vcpu_thread as vcpu.sched_obj.thread for each vcpu thread
- simplify switch_to based on sched_object

Tracked-On: #1842
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <edide.dong@intel.com>
2018-12-21 10:34:15 +08:00
Jason Chen CJ
8aae0dff87 scheduler: refine make_reschedule_request
just use pcpu_id for make_reschedule_request is enough

Tracked-On: #1842
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
Acked-by: Eddie Dong <edide.dong@intel.com>
2018-12-21 10:34:15 +08:00
Jason Chen CJ
6d67364881 scheduler: refine runqueue related functions
add struct sched_object, and use it as input param instead of vcpu for
below functions:
- add_to_cpu_runqueue renamed from add_vcpu_to_runqueue
- remove_from_cpu_runqueue renamed from remove_vcpu_from_runqueue
- get_next_sched_obj added to get next sched object

Tracked-On: #1842
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <edide.dong@intel.com>
2018-12-21 10:34:15 +08:00
Tw
80b392a854 hv:vtd: fix MISRA-C violations on pointer param should be declared pointer to const
This patch fix MISRA-C violations in arch/x86/vtd.c
on pointer param should be declared pointer to const.

Tracked-On: #861
Signed-off-by: Tw <wei.tan@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-12-21 10:32:53 +08:00
Arindam Roy
bec21d147b Patch for modularising ioapic.[c/h] and related files.
This adds few functions to access the daata structures
defined inside ioapic.c. Removes the same data structures
from ioapic.h
Also this modifies some of the names of existing APIs to
conform to the ioapic module name.
Modified gsi_table identifier to gs_table_data, to avoid
a MISRA C Violation.

Tracked-On: #1842
Signed-off-by: Arindam Roy <arindam.roy@intel.com>
2018-12-21 09:58:25 +08:00
Li, Fei1
1dca17cd29 hv: coding style: refine initialize_trusty to one exit
1) Move data copy out of initialize_trusty
2) Fix procedure has more than one exit point

Tracked-On: #2120
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2018-12-20 21:53:51 +08:00
Li, Fei1
5f0c093e57 hv: coding style: remove no real declaration for external variable
There is no no real declaration for these external variables. So just
remove them.

Tracked-On: #861
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2018-12-20 20:20:08 +08:00
Kaige Fu
1e3358fd92 Debug: Add one hypercall to quary hardware info
acrntrace/log kernel modules will use this hypercall to fetch
pcpu num of hardware platform. Then, initialize driver accordingly.

Tracked-On: #1775;#1776
Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Reviewed-by: Yan, Like <like.yan@intel.com>
2018-12-20 18:48:38 +08:00
Mingqiang Chi
81a9de6067 hv:fix MISRA-C violations in create_vm
-- fix "more than one exit point" and "goto detected" violations
-- change prepare_vm0_memmap to void type
-- Add free_vm_id when create vm failed

Tracked-On: #861
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-12-20 18:47:57 +08:00
Li, Fei1
f27aa70fb5 hv: coding style: refine page related
1) Fix procedure has more than one exit point.
2) Add some brackets to make logical conjunctions more readable.

Tracked-On: #861
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-12-20 15:44:08 +08:00
Zhao Yakui
e22b35e332 HV/DM: Unify the usage of aligned for structure definition with alignment
Now one macro is added to define the alignment requirement.
>#define __aligned(x) __attribute__((aligned(x)))

Some code uses the __aligned(x) to define the alignment while the other
code uses the original alignment definition.
So they are unified.

Tracked-On: projectacrn/acrn-hypervisor#2131
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-12-20 14:08:28 +08:00
Binbin Wu
71a80d2d60 hv: assign: change ptirq vpin source type from enum to macro
This patch fixes the MISRA-C violations on implicit type conversion.
For ptirq vpin source type, there is no need to define a enum.
Remove enum ptirq_vpin_source.
Define two macro:
- PTDEV_VPIN_IOAPIC
- PTDEV_VPIN_PIC

Tracked-On: #861
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-20 13:43:47 +08:00
Shiqing Gao
714814f97e hv: move atoi and strtol_dec to debug directory
This patch moves `atoi` and `strtol_dec` to debug directory
since they are only used by code under debug directory.

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-12-20 12:52:59 +08:00
Shiqing Gao
32d6aa97f9 hv: string: fix MISRA-C violations related to style
This patch fixes the MISRA-C violations in lib/string.c
 * add the required brackets for logical conjunctions
 * replace the basic type `long` with defined type `int64_t`

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-12-20 12:52:59 +08:00
Yan, Like
530388db30 hv: irq: fix MISRA-C violations in irq.c and idt.h
This commit fixed following violations:
- Procedure has more than one exit point: free_irq_vector/request_irq/dispatch_interrupt
- goto detected: dispatch_interrupt
- Pointer param should be declared pointer to const: fixup_idt
- basic type declaration used: fixup_idt

Tracked-On: #861
Signed-off-by: Yan, Like <like.yan@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-20 09:09:31 +08:00
Binbin Wu
83ebd43239 hv: ptdev: fix MISRAC violations
This patch fixs MISRAC violations in common/ptdev.c and include/common/ptdev.h

Tracked-On: #861
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-12-20 09:08:57 +08:00