Commit Graph

1481 Commits

Author SHA1 Message Date
Shiqing Gao
b38629b85e hv: fix 'Space missing before or after binary operator'
This patch adds the necessary space before or after binary operator.

v1 -> v2:
 * minor fix related to integer
   [i - 1] ====> [i - 1U]

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
2018-12-04 09:16:04 +08:00
Huihuang Shi
e32b2b4c11 hv: remove dead code
remove dead code dump_lapic.

Tracked-On: #861
Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-04 09:12:49 +08:00
Huihuang Shi
42e38dfb53 hv: fix "No prototype for non-static function"
The function not used in extern c file, must add static.

Tracked-On: #861
Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-04 09:12:49 +08:00
Huihuang Shi
48b3cd92ed hv: fix "Expression is not boolean"
The result of evaluate expression,it's type should be boolean.

Tracked-On: #861
Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-04 09:12:49 +08:00
Shiqing Gao
11102cfa45 hv: change the param type of mmio_write**
Input parameter of mmio_write64/mmio_write32/mmio_write16/mmio_write8
should be 'void *addr' rather than 'const void *addr' since the object
pointed by 'addr' is modified in these operations.

This patch change the param type of mmio_write** and update its usage
accordingly.

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Reviewed-by: Li, Fei1 <fei1.li@intel.com>
2018-12-04 09:10:54 +08:00
Shiqing Gao
dd43f3ba0a hv: replace CPU_PAGE_MASK with PAGE_MASK
replace CPU_PAGE_MASK with PAGE_MASK
These two MACROs are duplicated and PAGE_MASK is a more reasonable name.

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-03 15:14:57 +08:00
Shiqing Gao
0f766ca6b8 hv: replace CPU_PAGE_SHIFT with PAGE_SHIFT
- replace CPU_PAGE_SHIFT with PAGE_SHIFT
  These two MACROs are duplicated and PAGE_SHIFT is a more
  reasonable name.
- remove unused MACROs related to page shift in cpu.h

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-03 15:14:57 +08:00
Shiqing Gao
2f15d3569c hv: replace CPU_PAGE_SIZE with PAGE_SIZE
replace CPU_PAGE_SIZE with PAGE_SIZE
These two MACROs are duplicated and PAGE_SIZE is a more reasonable name.

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-03 15:14:57 +08:00
Shiqing Gao
e8e25bd6fc hv: clean up function definitions in sbuf.h
separate the function definitions into debug/release directories
to better distinguish debug/release libraries

v1 -> v2:
 - sbuf_get is defined in 'debug/sbuf.c' but not used anywhere.
   remove the declaration in 'include/debug/sbuf.h' and keep the
   definition in 'debug/sbuf.c' in case it will used later.
 - sbuf_put and sbuf_share_setup is not used under RELEASE version.
   remove the file 'release/sbuf.c'.

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
2018-12-03 15:14:19 +08:00
Minggui Cao
e7d1cdd9e2 HV: remove ignored pci device from acrn.conf
now hypervisor will support to hide ignored PCI device from SOS,
it doesn't need pass the boot args to SOS.

Tracked-On: #1923
Signed-off-by: Minggui Cao <minggui.cao@intel.com>
2018-12-03 13:20:35 +08:00
Minggui Cao
db4254e2df HV: find and hide serial PCI dev from service OS
serial PCI device is just used for HV/SOS output debug information;
because it is used in hypervisor layer, SOS should not touch it.
so need to check and hide it from SOS.

Tracked-On: #1923
Signed-off-by: Minggui Cao <minggui.cao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-03 13:20:35 +08:00
Minggui Cao
8d08ec30b7 HV: replace serial PCI MMIO base with BDF config
replace serial PCI MMIO base address configure with its BDF configure.

Tracked-On: #1923
Signed-off-by: Minggui Cao <minggui.cao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-03 13:20:35 +08:00
Huihuang Shi
10bde520a5 hv: other: fix "Procedure has more than one exit point"
IEC 61508,ISO 26262 standards highly recommend single-exit rule.

Reduce the count of the "return entries".
Fix the violations which is comply with the cases list below:
1.Function has 2 return entries.
2.The first return entry is used to return the error code of
checking variable whether is valid.

Fix the violations in "if else" format.

Tracked-On: #861
Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-03 11:10:04 +08:00
Huihuang Shi
fe3de67906 hv: debug: fix "Procedure has more than one exit point"
IEC 61508,ISO 26262 standards highly recommend single-exit rule.

Reduce the count of the "return entries".
Fix the violations which is comply with the cases list below:
1.Function has 2 return entries.
2.The first return entry is used to return the error code of
checking variable whether is valid.

Fix the violations in "if else" format.

Tracked-On: #861
Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-03 11:10:04 +08:00
Huihuang Shi
414860fb89 hv: dev: fix "Procedure has more than one exit point"
IEC 61508,ISO 26262 standards highly recommend single-exit rule.

Reduce the count of the "return entries".
Fix the violations which is comply with the cases list below:
1.Function has 2 return entries.
2.The first return entry is used to return the error code of
checking variable whether is valid.

Fix the violations in "if else" format.

Tracked-On: #861
Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-03 11:10:04 +08:00
Huihuang Shi
ba44417d96 hv: lib: fix "Procedure has more than one exit point"
IEC 61508,ISO 26262 standards highly recommend single-exit rule.

Reduce the count of the "return entries".
Fix the violations which is comply with the cases list below:
1.Function has 2 return entries.
2.The first return entry is used to return the error code of
checking variable whether is valid.

Fix the violations in "if else" format.

Tracked-On: #861
Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-03 11:10:04 +08:00
Huihuang Shi
279808b202 hv: memory: fix "Procedure has more than one exit point"
IEC 61508,ISO 26262 standards highly recommend single-exit rule.

Reduce the count of the "return entries".
Fix the violations which is comply with the cases list below:
1.Function has 2 return entries.
2.The first return entry is used to return the error code of
checking variable whether is valid.

Fix the violations in "if else" format.

Tracked-On: #861
Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-03 11:10:04 +08:00
Huihuang Shi
ddb548367a hv: cpu: fix "Procedure has more than one exit point"
IEC 61508,ISO 26262 standards highly recommend single-exit rule.

Reduce the count of the "return entries".
Fix the violations which is comply with the cases list below:
1.Function has 2 return entries.
2.The first return entry is used to return the error code of
checking variable whether is valid.

Fix the violations in "if else" format.

Tracked-On: #861
Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-03 11:10:04 +08:00
Yan, Like
d495732c71 hv: remove unused flags related APIs in sbuf
There APIs are removed:
- sbuf_clear_flags
- sbuf_set_flags
- sbuf_add_flags

Tracked-On: #1842
Signed-off-by: Yan, Like <like.yan@intel.com>
2018-12-03 09:10:11 +08:00
Jason Chen CJ
aa9af27338 modularization: boot component
Boot component prepares the very basic platform boot env. It finally call
into platform initilization entries:

- bsp_boot_init & cpu_secondary_init for start up
- or restore_s3_context for wakeup

this patch is the final one, it did some code clean up and move some definition
from vm0_boot.h to boot_context.h.

after this patch, the boot component include files:
arch/x86/boot/cpu_primary.S
arch/x86/boot/trampoline.S
arch/x86/boot/cpu_save_boot_ctx.S
arch/x86/boot/idt.S
boot/reloc.c
boot/include/reloc.h
include/arch/x86/boot/idt.h
include/arch/x86/boot/boot_context.h

Tracked-On: #1842
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
2018-12-03 09:09:44 +08:00
Jason Chen CJ
b54f23316a modularization: boot component -- move functions
Boot component prepares the very basic platform boot env. It finally call
into platform initilization entries:

- bsp_boot_init & cpu_secondary_init for start up
- or restore_s3_context for wakeup

this patch moves set_idt from header file to irq.c

Tracked-On: #1842
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
2018-12-03 09:09:44 +08:00
Jason Chen CJ
51bfafd6fb modularization: boot component -- move functions
Boot component prepares the very basic platform boot env. It finally call
into platform initilization entries:

- bsp_boot_init & cpu_secondary_init for start up
- or restore_s3_context for wakeup

this patch move functions for AP trampoline into trampoline.c from reloc.c

Tracked-On: #1842
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
2018-12-03 09:09:44 +08:00
Geoffroy Van Cutsem
512dbb61e3 Kconfig: remove PLATFORM configuration option
The PLATFORM configuration option is not used in any unique way. With simple
changes, we can directly use CONFIG_PLATFORM_UEFI and CONFIG_PLATFORM_SBL to
compile the ACRN hypervisor. This patch removes this config option and adjusts
the hypervisor Makefile accordingly.

The "old" way of specifying the platform from the command-line is not affected
by these changes, e.g.: "make PLATFORM=sbl"

Tracked-On: #1588
Signed-off-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
2018-11-30 23:40:41 +08:00
Geoffroy Van Cutsem
7eeeccdfad Documentation: add more Kconfig options documentation
* Add more Kconfig options documentation for the hypervisor
* Reword some existing one to improve readibility
* Break some help text to not go beyond 80 characters

Tracked-On: #1588
Signed-off-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
Co-Authored-By: David B. Kinder <david.b.kinder@intel.com>
2018-11-30 23:40:41 +08:00
Shiqing Gao
e1564edda5 hv: fix type conversion violations
This patch fixes the following violations:
 1. Implicit conversion: actual to formal param
 2. Value is not of appropriate type
 3. No cast for widening complex int expression
 4. Widening cast on complex integer expression
 5. Narrower int conversion without cast.

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
2018-11-30 18:14:59 +08:00
Li, Fei1
a0582c99cf hv: trusty: refine trusty memory region mapping
Now it's using the memory reserve by hypervisor. So there's not
necessaty to map or ummap this region from SOS.

Tracked-On: #1942
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2018-11-30 16:49:27 +08:00
Li, Fei1
bd1c0838d1 hv: trusty: reserve memory for trusty
The previous would reserve memory for trusty in SOS kernel. Howerer,
there would no available 16 MB continue memory any more after a long time.
This result in allocating memory for trusty failed. This patch will reserve
memory for trusty in ACRN hypervisor in which case the memory allocation
for trusty will never fail.

Tracked-On: #1942
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2018-11-30 16:49:27 +08:00
Zide Chen
79bf121e9b hv: throw GP for MSR accesses if they are disabled from guest CPUID
This patch places all unsupported MSRs in the intercepted_msrs[], but
don't implement any handlers in the switch clauses. Hence any
accesses from guests result in GP exceptions.

Tracked-On: #1867
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-30 15:03:16 +08:00
Zide Chen
3836d309d0 hv: code cleanup: vmsr.c
- Put most of the emulated MSR number in emulated_msrs[], and remove
  the individual calls to enable_msr_interception().
- vcpu_thread() injects General Purpose exception to the guest if any
  VMEXIT handler doesn't return 0. This patch removes vcpu_inject_gp()
  from all MSR VMEXIT handlers to keep the code clean.
- remove dead code.

Tracked-On: #1867
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-30 15:03:16 +08:00
Zide Chen
36ba7f8aa8 hv: clear CPUID.07H.EBX[2] to disable SGX from guests
Regarding SGX, guests could access CPUID.07H.EBX[2] before query CPUID
leaf 12H.

Intel SDM 36.7.2: "If CPUID.(EAX=07H, ECX=0H):EBX.SGX = 1, the processor
also supports querying CPUID with EAX=12H on Intel SGX resource capability
and configuration."

Clear CPUID.07H.ECX[30] SGX_LC to make the guest view consistent.

Tracked-On: #1867
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-30 15:03:16 +08:00
Geoffroy Van Cutsem
26dc54ce37 HV: allow disabling serial port via Kconfig
This patch allows to disable the serial port directly from Kconfig. This used
to only be possible from the command-line (by passing "uart=disabled"). To
disable the serial port via Kconfig, simply unselect the "Serial IO type"
option.

The default options do not seem to have any effect anymore (and were confusing
anyway) so they are removed and the serial port is enabled for various platforms
in their corresponding *.config file.

Tracked-On: #1481
Signed-off-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
2018-11-30 15:00:05 +08:00
Junjie Mao
584f6b7255 doc: replace return with retval
`@return` is dedicated for brief description of return values, not for comments
stating actual return values. In addition, sphinx + breathe does not join
multiple adjacent `@return`. This results in multiple `Return` sections in the
generated document, which is confusing.

This patch replaces `@return` with `@retval` for the lists of return
values. Adjacent `@retval` can be joined into one list by breathe.

v1 -> v2:

* Replace return value descriptions like `negative` and `positive` with
  expressions like `<0` and `>0` in `@retval`.
* Keep the list of `@retval` comprehensive, even when there is a `@return` to
  generally describe what the return value means.
* Drop duplicated `@return` when it does not give more information than the
  `@retval` list.

Tracked-On: #1595
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
2018-11-30 14:55:17 +08:00
Junjie Mao
97eb72a4a0 doc: always use 'None' for functions not returning a value
It is preferred to state the absence of a return value explicitly in the
doxygen-stile comments. Currently there are different styles of doing this,
including:

  @return None
  @return NULL
  @return void
  @return N/A

This patch unifies the above with `@return None`.

Tracked-On: #1595
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
2018-11-30 14:55:17 +08:00
Binbin Wu
7003afbe74 hv: msix: fix bug when check if msix table access
The offset calculation should base on the MSI-x BAR address, not MSIX-table address.

Tracked-On: #1946
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-30 14:42:10 +08:00
Mingqiang Chi
5dcfc1336b hv:Rename ptdev to ptirq for some APIs
-- Rename the fowllowing APIs:
  ptdev_intx_pin_remap --> ptirq_intx_pin_remap
  ptdev_msix_remap  --> ptirq_msix_remap
  ptdev_add_intx_remapping --> ptirq_add_intx_remapping
  ptdev_remove_intx_remapping --> ptirq_remove_intx_remapping
  ptdev_add_msix_remapping --> ptirq_add_msix_remapping
  ptdev_remove_msix_remapping --> ptirq_remove_msix_remapping
  ptdev_intx_ack  --> ptirq_intx_ack
  ptdev_lookup_entry_by_sid --> ptirq_lookup_entry_by_sid
  ptdev_lookup_entry_by_vpin --> ptirq_lookup_entry_by_vpin
  ptdev_build_physical_msi --> ptirq_build_physical_msi
  ptdev_build_physical_rte --> ptirq_build_physical_rte
  alloc_entry   --> ptirq_alloc_entry
  release_entry --> ptirq_release_one_entry
  ptdev_activate_entry --> ptirq_activate_entry
  ptdev_deactivate_entry --> ptirq_deactivate_entry
  ptdev_intr_handle_irq --> ptirq_handle_intx
  ptdev_softirq --> ptirq_softirq
  ptdev_enqueue_softirq --> ptirq_enqueue_softirq
  ptdev_dequeue_softirq --> ptirq_dequeue_softirq
  get_vm_ptdev_intr_data --> ptirq_get_intr_data
  alloc_ptdev_entry_id --> ptirq_alloc_entry_id
  ptdev_intr_delay_callback --> ptirq_intr_delay_callback
  ptdev_dequeue_softirq --> ptirq_dequeue_softirq
  ptdev_interrupt_handler --> ptirq_interrupt_handler

-- Merge 'ptdev_release_all_entries' and 'release_all_entries'
   to 'ptirq_release_all_entries'

v2-->v3:
   Rename ptirq_release_one_entry to ptirq_release_entry
v1-->v2:
   still use ptdev_init instead of ptirq_init

Tracked-On: #861
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-30 13:27:49 +08:00
Mingqiang Chi
5b43aa8a65 hv:Rename ptdev to ptirq for some variables and structures
ptdev_remapping_info --> ptirq_remapping_info
ptdev_msi_info --> ptirq_msi_info
ptdev_vpin_source --> ptirq_vpin_source
ptdev_irq_entries --> ptirq_entries
ptdev_entry_bitmaps --> ptirq_entry_bitmaps

v1-->v2:
   still use ptdev_lock instead of ptirq_lock
Tracked-On: #861
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-30 13:27:49 +08:00
Junjie Mao
10afa9bbbf HV: io: obsolete the valid field in vhm requests
As SOS has already adapted to the new state transition of VHM requests for a
month, the old `valid` field can now be safely obsoleted.

This patch changes the `valid` field as reserved and drops all the code that
reads or modifies this field for backward compatibility. The embedded comments
are updated accordingly, following the doxygen style.

Tracked-On: #875
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-30 13:14:59 +08:00
Shiqing Gao
db3c5746f3 hv: fix 'Function return value potentially unused'
MISRA-C requires that if the return value of a function call is
assigned to a local variable, this value shall be used in all paths.

This patch moves the variable assignment right before the moment that
the variable is used.

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-30 06:54:54 +08:00
Jason Chen CJ
0bc85d2ebc modularization: boot component - move files
Boot component prepares the very basic platform boot env. It finally call
into platform initilization entries:

- bsp_boot_init & cpu_secondary_init for start up
- or restore_s3_context for wakeup

This patch just move files into reorg dir.

Tracked-On: #1842
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
2018-11-29 15:44:56 +08:00
Huihuang Shi
667e0444a9 hv: vpic: fix "Procedure has more than one exit point"
IEC 61508,ISO 26262 standards highly recommend single-exit rule.

Reduce the count of the "return entries".
Fix the violations which is comply with the cases list below:
1.Function has 2 return entries.
2.The first return entry is used to return the error code of
checking variable whether is valid.

Fix the violations in "if else" format.

Tracked-On: #861
Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-29 15:03:48 +08:00
Huihuang Shi
17a6d9446e hv: guest: fix "Procedure has more than one exit point"
IEC 61508,ISO 26262 standards highly recommend single-exit rule.

Reduce the count of the "return entries".
Fix the violations which is comply with the cases list below:
1.Function has 2 return entries.
2.The first return entry is used to return the error code of
checking variable whether is valid.

Fix the violations in "if else" format.

Tracked-On: #861
Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-29 15:03:48 +08:00
Huihuang Shi
c32d41a0be hv: irq: fix "Procedure has more than one exit point"
IEC 61508,ISO 26262 standards highly recommend single-exit rule.

Reduce the count of the "return entries".
Fix the violations which is comply with the cases list below:
1.Function has 2 return entries.
2.The first return entry is used to return the error code of
checking variable whether is valid.

Fix the violations in "if else" format.

Tracked-On: #861
Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-29 15:03:48 +08:00
Huihuang Shi
8dfb9bd9c0 hv: dm: fix "Procedure has more than one exit point"
IEC 61508,ISO 26262 standards highly recommend single-exit rule.

Reduce the count of the "return entries".
Fix the violations which is comply with the cases list below:
1.Function has 2 return entries.
2.The first return entry is used to return the error code of
checking variable whether is valid.

Fix the violations in "if else" format.
V1->V2:
    make the return value match to int32_t

Tracked-On: #861
Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-29 15:03:48 +08:00
Huihuang Shi
ab3d7c87fd hv: boot: fix "Procedure has more than one exit point"
IEC 61508,ISO 26262 standards highly recommend single-exit rule.

Reduce the count of the "return entries".
Fix the violations which is comply with the cases list below:
1.Function has 2 return entries.
2.The first return entry is used to return the error code of
checking variable whether is valid.

Fix the violations in "if else" format.
V1->V2:
    change the probe_table return value to bool type

Tracked-On: #861
Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-29 15:03:48 +08:00
Li, Fei1
a1ac585b85 hv: add brackets to make operator expression more readable
v1-v2:
Bypass this case:
When binary arithmetic operators of different precedence (e.g. '+'
and '*') are mixed in an expression, parentheses are added to the
sub-expressions using the operator with a higher precedence.

v1:
The operator precedence rules are complicated and it is easy to make a mistake.
So add brackets to make operator expression more readable.

Tracked-On: #861
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2018-11-29 11:10:22 +08:00
Shiqing Gao
2d2f96afce hv: clean up function definitions in profiling.h
seperate the function definitions into debug/release directories
to better distinguish debug/release libraries

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-28 14:57:49 +08:00
Shiqing Gao
14f30a23c1 hv: clean up function definitions in npk_log.h
seperate the function definitions into debug/release directories
to better distinguish debug/release libraries

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-28 14:57:49 +08:00
Shiqing Gao
079566056a hv: clean up function definitions in trace.h
seperate the function definitions into debug/release directories
to better distinguish debug/release libraries

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-28 14:57:49 +08:00
Shiqing Gao
637326bc6d hv: clean up function definitions in vuart.h
seperate the function definitions into debug/release directories
to better distinguish debug/release libraries

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-28 14:57:49 +08:00
Shiqing Gao
7b74b2b909 hv: clean up function definitions in console.h
seperate the function definitions into debug/release directories
to better distinguish debug/release libraries

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-28 14:57:49 +08:00
Shiqing Gao
649d0e323b hv: clean up function definitions in dump.h
seperate the function definitions into debug/release directories
to better distinguish debug/release libraries

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-28 14:57:49 +08:00
Shiqing Gao
8920fbacaa hv: clean up function definitions in logmsg.h
seperate the function definitions into debug/release directories
to better distinguish debug/release libraries

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-28 14:57:49 +08:00
Huihuang Shi
5b6c611a1d hv: msix: fix "Procedure has more than one exit point"
IEC 61508,ISO 26262 standards highly recommend single-exit rule.

Reduce the count of the "return entries".
Fix the violations which is comply with the cases list below:
1.Function has 2 return entries.
2.The first return entry is used to return the error code of
checking variable whether is valid.

V1->V2:
  remove the unrelated code.

Fix the violations in "if else" format.

Tracked-On: #861
Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-28 14:34:12 +08:00
Li, Fei1
e1d0f7e432 hv: instr_emul: fix decode_modrm no default case in switch statement
MISRA-C required every switch statement shall have a default label.

Tracked-On: #861
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-28 13:25:56 +08:00
Li, Fei1
042c393526 hv: trusty: fix get_max_svn_index return type inconsistent
Function return type should consistent.

Tracked-On: #861
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2018-11-28 13:25:56 +08:00
Chen Gang G
0100b5a2e1 HV: replace dynamic memory with static for crypto library
Remove dynamic memory allocation in crypto lib, use array to
replace them.

Tracked-On: #1900
Reviewed-by: Bing Zhu <bing.zhu@intel.com>
Signed-off-by: Chen Gang G <gang.g.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-28 10:24:57 +08:00
Huihuang Shi
2afa7173ef hv: vlapic: fix "Procedure has more than one exit point"
IEC 61508,ISO 26262 standards highly recommend single-exit rule.

Reduce the count of the "return entries".
Fix the violations which is comply with the cases list below:
1.Function has 2 return entries.
2.The first return entry is used to return the error code of
checking variable whether is valid.

Fix the violations in "if else" format.

Tracked-On: #861
Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-27 14:43:16 +08:00
Shiqing Gao
06efc58a7e hv: assign: clean up HV_DEBUG usage related to vuart pin
replace HV_DEBUG with CONFIG_COM_IRQ which is more reasonable

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Reviewed-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-27 13:09:24 +08:00
Mingqiang Chi
c380ee9eeb hv:Revise sanitized page size
now the size of sanitized_page is 32KB,
revise it to 4KB.

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-11-27 13:09:04 +08:00
Kaige Fu
a5fd552456 debug: rename struct logmsg to struct acrn_logmsg_ctl
For data structure types "struct logmsg", its name is identical
with variable name in the same scope. This is a MISRA C violation.

This patch fix it.

Tracked-On: #1801
Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-27 09:32:27 +08:00
Kaige Fu
e555f75b8d debug: Remove early logbuf support
This patch remove early logbuf support which is used to hold
log massges before shared buf setup by SOS.

Tracked-On: #1801
Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
Reviewed-by: Yan, Like <like.yan@intel.com>
2018-11-27 09:32:27 +08:00
Huihuang Shi
9f13a51e8a hv: hypercall: VM management fix "Procedure has more than one exit point"
IEC 61508,ISO 26262 standards highly recommend single-exit rule.

Reduce the count of the "return entries".
Fix the violations which is comply with the cases list below:
1.Function has 2 return entries.
2.The first return entry is used to return the error code of
checking variable whether is valid.

Fix the violations in "if else" format.
V1->V2:
    update the git comment to describe why comply with the
single-exit rule.

V2->V3:
    update the git comment title to give a scope declaration of this
patch.

Tracked-On: #861
Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Reviewed-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-27 09:27:00 +08:00
Huihuang Shi
a7398e8a2f hv: hypercall: general fix "Procedure has more than one exit point"
IEC 61508,ISO 26262 standards highly recommend single-exit rule.

Reduce the count of the "return entries".
Fix the violations which is comply with the cases list below:
1.Function has 2 return entries.
2.The first return entry is used to return the error code of
checking variable whether is valid.

Fix the violations in "if else" format.
V1->V2:
    update the git comment to describe why comply with the
rule(function's return entry should be only one).
V2->V3:
    update the git comment title to give a scope declaration of this
patch.

Tracked-On: #861
Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Reviewed-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-27 09:27:00 +08:00
Zide Chen
b627c2c979 hv: switch IA32_TSC_AUX between host/guest through VM Controls
Currently guest IA32_TSC_AUX MSR is loaded manually right before VM
entry, and saved right after VM exit.

This patch enables VM-Entry Control and VM-Exit Control to switch
MSR IA32_TSC_AUX between host and guest automatically. This helps to
keep vcpu_thread() function and struct acrn_vcpu cleaner.

Also it removes the dead code of intercepting IA32_TSC_AUX.

Tracked-On: #1867
Signed-off-by: Zide Chen <zide.chen@intel.com>
Reviewed-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-27 09:26:29 +08:00
Li, Fei1
d0b37f8ea2 hv: reloc: define data structure and MACRO when necessary
Some data structure are only used under some condition. This patch move data
structure definition under its corresponding contion. Otherwise, it would
violate MISRA-C 413 S "User type declared but not used in code analysed".
For MACRO, it would violate MISRA-C 628 S "Macro not used in translation unit".

Tracked-On: #861
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-26 12:42:03 +08:00
Shiqing Gao
b1047224aa hv: assign: clean up HV_DEBUG usage related to shell
remove the usage of HV_DEBUG related to shell command in assign.c

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-23 12:21:02 +08:00
Shiqing Gao
f21e36f43b hv: vioapic: clean up HV_DEBUG usage
remove the usage of HV_DEBUG in vioapic.c

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-23 12:21:02 +08:00
Shiqing Gao
a931229888 hv: irq: clean up HV_DEBUG usage
remove the usage of HV_DEBUG in irq.c

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-23 12:21:02 +08:00
Shiqing Gao
dfe48811d4 hv: vcpu: clean up HV_DEBUG usage
remove the usage of HV_DEBUG in vcpu.c

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-23 12:21:02 +08:00
Shiqing Gao
e49929a776 hv: ioapic: clean up HV_DEBUG usage
remove the usage of HV_DEBUG in ioapic.c

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-23 12:21:02 +08:00
Yonghua Huang
9d529fb9e6 hv:use copy of guest's memory block in 'hcall_set_vm_memory_regions()'
to avoid passing guest's memory block into hypervisor internal
process for security.

Tracked-On: #861
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-23 09:05:15 +08:00
Shiqing Gao
81db242292 hv: enhance Makefile to compile debug/release into 2 libraries
enhance Makefile to compile debug/release into 2 libraries

v1 -> v2:
 * auto make all the libraries

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
2018-11-23 08:47:34 +08:00
Li, Fei1
02a89dd473 hv: lapic: fix a theoretic infinite loop when clear lapic isr
In theory, there would have 256 pending interrupts on lapic ISR.
Add this check to avoid theoretic infinite loop for clearing
lapic isr. Leave the potentially hardware issue to machine check.

Tracked-On: #861
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2018-11-22 12:44:21 +08:00
Li, Fei1
dbe3d986c0 hv: lapic: save lapic base MSR when suspend
Although the lapic base MSR have the same value in per-cpu except that the BSP bit.
However, we would enter s3 on the BSP cpu. After the resume from s3, the BSP bit was
clear on the BSP cpu. This patch fix this bug.

Tracked-On: #861
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-22 12:44:21 +08:00
Li, Fei1
b8a553d16a hv: lapic: remove union apic_lvt
Since it's unused.

Tracked-On: #861
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2018-11-22 12:44:21 +08:00
Mingqiang Chi
538ba08c2b hv:Add vpin to ptdev entry mapping for vpic/vioapic
Now if the vmexit reason is virtulized EOI for level triggered
interrupts, HV will loop all the ptdev entries, it is time-consuming,
this patch add vpin to ptdev entry mapping for vpic and vioapic
when add intx entry for a vm,it can use the ptdev entry directly
according to the mapping for vpin and ptdev entry when EOI vmexit.

v3-->v4:
  -- add check vpin in remove_intx_remapping
  -- move check vpin from ptdev_add_intx_remapping to add_intx_remapping

Tracked-On: #861
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Reviewed-by: Binbin Wu <binbin.wu@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
2018-11-22 11:26:04 +08:00
Mingqiang Chi
297a264a74 hv:Cleanup ptdev lock
Move ptdev lock out from add_intx_remapping/add_msix_remapping
/remove_intx_remapping/remove_msix_remapping and make it protect
the whole add entry/remove entry process

v3-->v4:
  --move ptdev lock out

v2-->v3:
  -- still use ptdev lock for add/remove ptdev entry
Tracked-On: #861
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Reviewed-by: Binbin Wu <binbin.wu@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
2018-11-22 11:26:04 +08:00
Mingqiang Chi
b7bbf81287 hv:Replace dynamic memory with static for ptdev
-- Config MAX_PT_IRQ_ENTRIES 64 in Kconfig
-- Remove ptdev list
-- Add alloc_ptdev_entry_id api

v3-->v4:
  -- move is_entry_active from assign.c to ptdev.h
  -- Add clear active flag in release_entry
v2-->v3:
  -- Remove redundancy active check for ptdev entry
     in release_all_entries and get_ptdev_info
v1-->v2:
  -- split to small patches

Tracked-On: #861
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Reviewed-by: Binbin Wu <binbin.wu@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
2018-11-22 11:26:04 +08:00
dongshen
b0e1657b4f HV: Adding partition mode support for cb2_dnv
Adding partition mode support for cb2_dnv.

Tracked-On: #1853
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
2018-11-21 15:21:37 +08:00
dongshen
664bc1bace HV: Partition mode source code file layout reorg
Put partition mode board specific files under partition/$(CONFIG_BOARD)/

Tracked-On: #1852
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
2018-11-21 15:21:37 +08:00
Zide Chen
58ab26ea38 hv: code cleanup: msr.h
- fix code style: mix of tab and white spaces, alignments, etc.
- remove not meaningful comments. Also these comments are below the
  source code which makes the code look messy.
- add more MSR register definitions

Tracked-On: #1867
Signed-off-by: Zide Chen <zide.chen@intel.com>
Reviewed-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-21 14:45:43 +08:00
Shuo Liu
e8296dce05 hv: Add IO request completion polling feature
This patch introduce a new mode of IO request completion, polling mode.

Now, the sketch of ioreq process can be,
  A. UOS vcpu0 generate PIO/MMIO ->
   B. pcpu1(vcpu0 of UOS) trap into HV ->
    C. pcpu1 build ioreq, send IPI and enter idle ->
     D.1 pcpu0(vcpu0 of SOS) response IPI,
     D.2 pcpu0 handle the ioreq in HV, kernel, DM,
     D.3 pcpu0 mark ioreq as complete,
     D.4 pcpu0 hypercall to enter HV ->
       E.1 pcpu0 send IPI to wake pcpu1 up
       E.2 UOS vcpu0 continue running

With this change, it skips D.4, E.1 steps. In step C, pcpu1 will enter a
polling ioreq state idle after send out the IPI.
It can save about ~5000 cpu cycles.

In polling mode, we do the polling in idle instead of pause cpu all the
time. It will consume more power. A better way is to use monitor/mwait
instructions which can put cpu into a sleep state with monitoring a
memory address. Unfortunately, APL has bug with monitor. We can gather
all ioreqs state into one monitorable memory and take advantage of
monitor/mwait for future platform.

The way polling or notification is per VM. We can config VMs in
different mode. By default, IO request completion will use notification
mode for all VMs. We can switch it by Kconfig.

Tracked-On: #1821
Signed-off-by: Shuo Liu <shuo.a.liu@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-11-21 14:35:12 +08:00
Minggui Cao
e350abe40d HV: handle adding ptdev entry failure cases
handle adding pass-through device entry failure cases,
instead of calling ASSERT, to avoid hypervisor crash.

Tracked-On: #1860
Signed-off-by: Minggui Cao <minggui.cao@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-11-21 12:40:23 +08:00
Binbin Wu
973c616ab3 doc: passthru: add structure and API docs
This patch adds more comments to describe the structures and functions of vtd
that are public to the other components in the hypervisor. The comments are in
doxygen-style for document generation.

Tracked-On: #1595
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Reviewed-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
2018-11-21 09:27:51 +08:00
Geoffroy Van Cutsem
4ec4ddc0cc Documentation: clean-up of isolated README.rst files
Clean up of a couple of README.rst files located respectively under hypervisor/
and devicemodel/ to remove obsolete and unmaintained information. Both hold a
basic introduction about the folder content and refer to the official
documentation website for more detailed information.

Tracked-On: #1827
Signed-off-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
2018-11-20 11:09:53 -08:00
Binbin Wu
29f9502152 hv: vtd: error handling revisit
1. use error code defined in errno.h instead of 1.
2. panic if error occured while adding devices to VM0 domain.
3. panic if failed to reqeust irq for iommu.

The two panic added would only occurs before any VM starts running.

Tracked-On: #1855
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-11-20 13:30:13 +08:00
Binbin Wu
c449002846 hv: vtd: defer dma remapping enabling until vm creation
In current code, DMA remapping is enabled at very early stage, when there is no
device added.
Devices are added to VT-d context table when creating VMs.
There is potential risk that there may be device DMA transactions when DMA remapping is
enabled, but the device is not added to the VT-d context table. (Eg. this could happen in UEFI
enviroment when USB keyboard use in efi intenal shell.)

This patch defers DMA remapping enabling until vm creation.

Tracked-On: #1855
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-11-20 13:30:13 +08:00
Binbin Wu
42e0e169c3 hv: vtd: init interrupt config when resume
Current code doesn't init interrupt config when resume from S3.
The related register contect will be lost during S3.
This patch re-init these regiters.

Tracked-On: #1855
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-11-20 13:30:13 +08:00
Binbin Wu
830b3aa07c hv: vtd: check vtd enabling status with spinlock
Check vtd translation enabling status when enable/disable translation
inside dmar_enable/disable_translation with spinlock.

Tracked-On: #1855
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-11-20 13:30:13 +08:00
Binbin Wu
a2cb9c2b6a hv: vtd: add do_action_for_iommus
Add an internal API to do action according to action function provided,
which can simplify the code.

Tracked-On: #1855
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
2018-11-20 13:30:13 +08:00
Binbin Wu
32ed3d1a76 hv: vtd: move public API to the bottom part of the file
Move move public API to the bottom part of the file.

Tracked-On: #1855
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-20 13:30:13 +08:00
Binbin Wu
efb249235a hv: vtd: merge lines for a statement if needed.
Becuase the number of character of a line is 120.
Merge lines for a statement if needed.

Tracked-On: #1855
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-20 13:30:13 +08:00
Binbin Wu
e35a8e8cff hv: vtd: typo fix
dmar_uint -> dmar_unit
remove i in line 756 added by accident.

Tracked-On: #1855
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-20 13:30:13 +08:00
Zide Chen
3b24c34cbf hv: msix: corrently determine when the guest is changing Message Data/Addr
The guest could write the MSI-X Table fields in DWORD or QWORD. For
example the Message Address could be a QWORD write or two DWORD writes,
the Message Data could be a DWORD write or part of a QWORD write that
is combined with the Vector Control. This patch captures all the
possible combinations when the guest is configuring the MSI-X Table.

Tracked-On: #1568
Signed-off-by: Zide Chen <zide.chen@intel.com>
Reviewed-by: Li, Fei1 <fei1.li@intel.com>
2018-11-20 12:59:09 +08:00
Zide Chen
c41c0dab08 hv: properly initialize MSI-X table
Though guests are not supposed to read Message Data/Addr, it's still better
off to initialize them to 0.

vector_control should be initialize to zero besides the mask bit.

Tracked-On: #1568
Signed-off-by: Zide Chen <zide.chen@intel.com>
Reviewed-by: Li, Fei1 <fei1.li@intel.com>
2018-11-20 12:59:09 +08:00
Zide Chen
53971e1974 hv: fix 2 bugs in msix.c
- in vmsix_cfgwrite(), it should write the new value 'val'.
- in vmsix_table_mmio_access_handler(), mmio_gpa is a typo for intercepted_gpa.

Tracked-On: #1568
Signed-off-by: Zide Chen <zide.chen@intel.com>
Reviewed-by: Li, Fei1 <fei1.li@intel.com>
2018-11-20 12:59:09 +08:00
Shiqing Gao
119eccfea1 hv: hypercall: clean up HV_DEBUG usage
remove the usage of HV_DEBUG in hypercall.c and vmcall.c

TO-DO:
Enhance Makefile to compile debug/release into 2 libraries

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-20 10:01:50 +08:00
Chen, Gang G
fc9ec5d88f hv: Derive decryption key from Seed for Trusty to decrypt attestation keybox
CSE FW uses an AEK (Attestation keybox Encryption Key) to encrypt the keybox
with AES-256-GCM algorithm before sending it to Android/Trusty. This key is
derived from the latest platform Seed by CSE FW with KDF (key derivation function)
HMAC-SHA256. After Trusty retrieves this encrypted keybox over HECI/MEI driver,
Trusty needs the same AEKkey to decrypt it. Hence, before Trusty launches,
Hypervisor derives the same AEK key from Platform Seed with the same algorithm
and the same derivation parameters, then sends this AEK along with Trusty vSeed
to Trusty world memory.

Since Platform Seed is only visible to Hypervisor and it must not be
sent to any guest VM, only Hypervisor can derive this AEK from this
Platform Seed, just like previous per-Trusty virtual Seed derivation.
Please note that Android Attestation Keybox is shared in a single hardware
platform, so all the Trusty instance/world can get the same AEK for
decryption even if there are multiple Android User OS/VMs running
on top of Hypervisor.

v1 --> v2:
	Add detailed description why we need the patch to derive an extra key

v2 --> v3:
	Convert API descriptions to Doxygen

Tracked-On: #1812
Reviewed-by: Bing Zhu <bing.zhu@intel.com>
Reviewed-by: Kai Wang <kai.z.wang@intel.com>
Signed-off-by: Chen Gang G <gang.g.chen@intel.com>
Acked-by: Bing Zhu <bing.zhu@intel.com>
2018-11-20 09:22:37 +08:00
Zide Chen
5d013ed2ba hv: vpci: revert the temporary workaround of handling I/O port CF9
Revert the temporary workaround of calling allow_guest_pio_access() to
reset the I/O bitmap for CF9.

For CONFIG_ADDR register, only intercept I/O port CF8 to achieve these:

- In SOS, I/O bitmap for port CF9 is not set.
- In UOS or in partition mode, I/O requests to CF9/CFA/CFB won't be handled
  by pci_cfgaddr_io_read/write() any more.

Tracked-On: #1815
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-11-19 09:34:34 +08:00
Zide Chen
fe9a340ea9 hv: separate the PCI CONFIG_ADDR and CONFIG_DATA I/O port handlers
Register separate I/O emulation handlers for I/O port CF8 and CFC. This
makes the code simpler, and offers some flexibilities to be able to handle
CF8 and CFC ports differently.

Tracked-On: #1815
Signed-off-by: Zide Chen <zide.chen@intel.com>
Reviewed-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-11-19 09:34:34 +08:00
Zide Chen
8b4f395683 hv: PIO emulation handler is attached to I/O port number only
An I/O handler is not linked to the I/O access size, so in searching for
the registered I/O handler, don't need to check the I/O request's access
size.

In struct vm_io_handler_desc, change fields addr and len to port_start and
port_end respectively to adapt to this change.

Tracked-On: #1815
Signed-off-by: Zide Chen <zide.chen@intel.com>
Reviewed-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-11-19 09:34:34 +08:00
Jason Chen CJ
2c581751de vmx: tiny fix for MACRO name and print format
1. CPU_SEG_WRITE->CPU_SEG_READ: it's actually seg read
2. 0x%hu -> 0x%x: it need print hex format

Tracked-On: #1833
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
2018-11-16 15:30:20 +08:00
Shiqing Gao
9c025190a9 hv: hv_main: clean up HV_DEBUG usage
- Remove the usage of HV_DEBUG in hv_main.c
The usage of HV_DEBUG in hv_main.c is for the shell command 'vmexit'.
Since vmexit info has been captured by acrntrace, there is no need to
keep this duplicated feature in shell command.

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
Reviewed-by: Yin Fengwei <fengwei.yin@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
2018-11-16 14:47:24 +08:00
dongshen
1018a31cbb HV: For NUC, use 0x3F8/IRQ4 as the vuart port base address/IRQ and use ttyS0 accordingly
Tracked-On: #1817
Change-Id: I6f063e3f85b2050d63c75c1e8a46c5e8ab8a2860
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
2018-11-16 10:24:48 +08:00
dongshen
e56a6b588a HV: For MRB, use 0x3E8/IRQ6 as the vuart port base address/IRQ.
Tracked-On: #1817
Change-Id: Ib2e375a1e23eff1f1326728a023147db48fe4d5c
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
2018-11-16 10:24:48 +08:00
dongshen
3b87e7c67f HV: Add vuart port base address/IRQ Kconfig options
Adding Kconfig option to define the vuart port base address/IRQ.
By default, use 0x3F8/IRQ4. For MRB, use 0x3E8/IRQ6.
We are experiencing problems on NUC after changing from 0x3F8/IRQ4
to 0x3E8/IRQ6.

Tracked-On: #1817
Change-Id: Ie407e51a7bc25ac0bb4c61453c969f1466fa33ca
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
2018-11-16 10:24:48 +08:00
Zheng, Gen
b32e689a64 hypervisor: use "wbinvd" carefully in RT environment
Due to the side-effect to cache of "wbinvd" instruction, just apply it
in case of noncoherent DMA.

Tracked-On: #1824
Signed-off-by: Zheng, Gen <gen.zheng@intel.com>
Reviewed-by: Binbin Wu <binbin.wu@intel.com>
2018-11-16 10:24:23 +08:00
Shuo Liu
61e6c1f054 hv: reset VM ioreqs in reset_vm
ioreqs acrossing VM reset is meaningless. So we reset their status when
VM reset.
Please note, device model and service os need to handle various ioreqs
pending status in emergency reset condition carefully. Otherwises, the
post processing of such ioreqs might overwrite this reset.

Tracked-On: projectacrn#1821
Signed-off-by: Shuo Liu <shuo.a.liu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-16 09:14:26 +08:00
Shuo Liu
8fa16211f6 hv: partition mode also needs free vm id when shutdown vm
Even in partition mode, we also need to clear vmid in vmid_bitmap to
indicate the VM is not present.

Tracked-On: projectacrn#1821
Signed-off-by: Shuo Liu <shuo.a.liu@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-11-15 16:40:43 +08:00
Shiqing Gao
6971cc832a hv: fix '(void) missing for discarded return value'
MISRA-C requires that the function call in which the returned
value is discarded shall be clearly indicated using (void).

This patch fixes the violations related to the following
function calls.
- instr_check_gva
- vlapic_set_local_intr
- prepare_vm
- enter_s3
- emulate_instruction
- ptdev_intx_pin_remap
- register_mmio_emulation_handler

v1 -> v2:
 * discard the return value of enter_s3

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
2018-11-15 10:54:42 +08:00
Zide Chen
a646fcf761 hv: fix 'No brackets to then/else' in vpci code
This patch addes missing brackets for 'if/else' statements based on
MISRA-C requirements 12 S.

Tracked-On: #861
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
Reviewed-by: Huihuang Shi <huihuang.shi@intel.com>
2018-11-15 08:58:32 +08:00
Zide Chen
bad813ea31 hv: fix MISRA-C violations in vpci code: Function pointer is of wrong type
576S: Function pointer is of wrong type. C90 requires the elements of an
designated initializer to appear in a fixed order, the same as the order of
declaration. C99 relaxes this rule but seems MISRA-C sticks to C90 in this
regard.

Tracked-On: #861
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
Reviewed-by: Huihuang Shi <huihuang.shi@intel.com>
2018-11-15 08:58:32 +08:00
Zide Chen
d3f0edfe4f hv: fix MISRA-C violations in vpci code: 93S, 331S and 612S
- 331S: Literal value requires a U suffix.
- 612S: inline function should be declared static.
- 93S: Value is not of appropriate type. MISRA-C imposes strict type
  checking: no comparison between signed and unsigned, etc.

Tracked-On: #861
Signed-off-by: Zide Chen <zide.chen@intel.com>
Reviewed-by: Huihuang Shi <huihuang.shi@intel.com>
2018-11-15 08:58:32 +08:00
Zide Chen
f84f1a216b hv: fix MISRA-C violations in vpci code: implicit conversion
458S: Implicit conversion: actual to formal param (MR): "The value of an
actual parameter shall not be implicitly converted to the type of a formal
parameter, if that conversion might result in the loss of information".

Tracked-On: #861
Signed-off-by: Zide Chen <zide.chen@intel.com>
Reviewed-by: Huihuang Shi <huihuang.shi@intel.com>
2018-11-15 08:58:32 +08:00
Shiqing Gao
d97224a4b5 hv: fix integer violations
fix the following integer violations:
1. Signed/unsigned conversion without cast
2. Literal value requires a U suffix
3. Implicit conversion of underlying type

v3 -> v4:
 * change the type of npk_loglevel/mem_loglevel/console_loglevel
   from uint32_t to uint16_t

v2 -> v3:
 * discard the return value of update_ept
 * discard changes related to npk loglevel

v1 -> v2:
 * remove the unnecessary changes related to the false positive
   issues caused by scanning tool
 * change the type of the local variable 'vlapic_id' from uint8_t
   to uint32_t in function 'vlapic_build_id'
 * change the type of the struct member 'flags' in shared_buf from
   uint64_t to uint32_t

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-14 12:46:34 +08:00
Huihuang Shi
7e6d0a2176 HV:pic fix "Recursion in procedure calls found"
Functions shall not call themselves, either directly or indirectly.

vpic_set_pinstate will cal vpic_notify_intr and results to recursion
violations,fix it out by mov vpic_notify_intr out of vpic_set_pinstate.

Tracked-On: #861
Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
reviewed-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-11-14 12:45:57 +08:00
Shiqing Gao
0a9d6841f7 hv: instr_emul: clean up mmio_read/mmio_write
clean up mmio_read/mmio_write in instr_emul.c
- make these two functions inline
- discard the return value and add the pre condition
- rename these two functions to vie_mmio_read/vie_mmio_write

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-14 09:18:40 +08:00
Binbin Wu
2c7c909e38 hv: vtd: fix the pre-allocated context table number
In current code, there is an out of range access to the array buses defined in struct struct context_table.
This patch defines CONFIG_IOMMU_BUS_NUM to replace CONFIG_IOMMU_INIT_BUS_LIMIT, which is clearer.
CONFIG_IOMMU_BUS_NUM equals to (CONFIG_IOMMU_INIT_BUS_LIMIT + 1).

Tracked-On: #1807
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-14 09:18:18 +08:00
Shiqing Gao
3731b4c0ac hv: fix '(void) missing for discarded return value'
MISRA-C requires that the function call in which the returned
value is discarded shall be clearly indicated using (void).

This patch fixes the violations related to the following
function calls.
- vlapic_set_intr
- vlapic_intr_edge

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
2018-11-13 19:24:54 +08:00
Yonghua Huang
b3b24320d4 hv: fix possible inconsistent issue for 'vm->hw.create_vcpus'
to decrease the value of 'create_vcpus' in fail case.

Tracked-On: #861
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-13 17:57:29 +08:00
Huihuang Shi
7bb09f75da fix "Procedure is not pure assembler"
Misra C reqires assembly code should comply with
the rules list below:
  The assembly code's functionality should match the function's
name.If not,pls encapsulate the assembly code and give a suitable
name for describing the functionality.
V1->V2:
    1.remove the dead code
    2.update detail comment

V2->V3:
    1.replace the macro name with upper case.
    2.remove the typedef and rename the struct name
"_descriptor_table_" to "descriptor_table".

Tracked-On: #861
Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-13 16:28:58 +08:00
Yonghua Huang
91fb441d7a hv:add global lock for VM & vCPU management hypercalls
this patch is to avoid posisble inconsisent states for
 VMs and vCPUs in configuration that  SOS is SMP based
 and Device Model may be multi-threads based.

Tracked-On: #861
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-13 14:04:08 +08:00
Shiqing Gao
155675350d hv: unify the function pointer assignment
Assign function pointer without the unary & operator.

Take 'register_io_emulation_handler' as an example:
void register_io_emulation_handler(struct acrn_vm *vm,
                const struct vm_io_range *range,
                io_read_fn_t io_read_fn_ptr,
                io_write_fn_t io_write_fn_ptr)

The last two parameters are function pointer.
Sometimes we use function designator directly, while sometimes
with the unary & operator, as shown below.
 - without &
   register_io_emulation_handler(vm, &range, vuart_read, vuart_write);
 - with &
   register_io_emulation_handler(vm, &pci_cfg_range,
                   &pci_cfg_io_read, &pci_cfg_io_write);

To unify the coding style, we will go with the first way.

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-13 13:34:36 +08:00
Mingqiang Chi
9a009bcef2 hv:Replace dynamic memory with static for mmio
-- Config MAX_EMULATED_MMIO_REGIONS 16 in Kconfig
-- Add emulated mmio array and emulated mmio regions
   in vm structure
-- Remove mmio list in vm structure
-- Remove unregister_mmio_emulation_handler and
   vioapic_cleanup APIs

Tracked-On: #861
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-13 11:52:48 +08:00
ailin,yang
bc2f30e229 HV: update kernel name
updated kernel name  from kernel-org.clearlinux.pk414-sos.4.14.52-63 to kernel-org.clearlinux.iot-lts2018-sos.4.19.0-16 for v0.3 release

Signed-off-by: Ailun258 <ailin.yang@intel.com>
2018-11-10 11:16:12 -08:00
Xinyun Liu
b6988e13d1 hv: fix branch addressing syntax warning
Branch addressing using registers or memory operands must be prefixed by
a '*' in AT&T ASM language.

This change is to fix these warnings:

arch/x86/cpu.c:409: Warning: indirect call without `*'
arch/x86/cpu.c:553: Warning: indirect call without `*'
arch/x86/trampoline.S:168: Warning: indirect jmp without `*'

Ref: https://csiflabs.cs.ucdavis.edu/~ssdavis/50/att-syntax.htm
Tracked-On: #1764
Signed-off-by: Xinyun Liu <xinyun.liu@intel.com>
Reviewed-By: Yin Fengwei <fengwei.yin@intel.com>
2018-11-09 13:16:13 +08:00
Victor Sun
053608a54e HV: add px cx data of bxt n3350 SOC
The cpu model name of "Intel(R) Celeron(R) CPU N3350 @ 1.10GHz" is used in
APL UP2 board, which is in Acrn official support list.

Tracked-On: #1767

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-09 13:07:53 +08:00
Mingqiang Chi
73530055b6 hv:Replace dynamic memory with static for port io
-- Add emulated port io index
-- Add emulated pio array in vm structure
-- Remove port list in vm structure
-- Remove free_io_emulation_resource/register_io_handler/
   create_io_handler APIs

v2-->v3:
 -- not add 'is_emulated', check len == 0U
 -- Check if io_read/io_write handler is NULL before calling
 -- Replace ENUM with MACRO for emulated pio index to avoid
    MISRA-C violations

v1-->v2:
  -- Remove EMUL_PIO_NUM in Kconfig, add emulated pio index
     for PIC/PCI/UART/RTC/PM

Tracked-On: #861
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-09 13:05:04 +08:00
Binbin Wu
5a1f24473d hv: ept: set snp control when modify
Current, SNP control bit is only set in ept_mr_add for cacheable memory.
However, memory type for VM0 is added as uncacheable type.
So SNP control is not set for VM0.
Add code to set SNP control bit for cacheable memory when ept modification.

Tracked-On: #1762
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Reviewed-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-09 13:00:51 +08:00
Shiqing Gao
f65e05c5fc hv: fix 'Start of variable is upper case'
variable names shall be lower-case letters.

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-08 15:39:09 +08:00
Yin Fengwei
1902d725a0 hv: fix partition mode no console issue.
Fix the issue that kernel console doesn't work with partition mode.

Tracked-On: #1756
Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-11-08 14:41:31 +08:00
Zhao Yakui
3cbaf02830 HV: Use parameter directly to pass bdf for hcall_assign/deassign_ptdev
The the bdf(bus/dev/func) is used to determine which pass-through device should
be assigned/released. Now the hypervisor parses the corresponding bdf from the guest
physical address when hcall_assign_ptdev/hcall_deassign_ptdev is called.
As it is only uint16_t, it is unnecessary to use the GPA to pass the bdf parameter.
Instead the parameter can be used as the bdf directly.

In order to keep the compatibility, it still can get the bdf by using
copy_from_gpa when SOS passes the parameter based on the buffer. But this will
be depreciated.
This is based on the assumption that the GPA in SOS is greater than 0x10000
when one buffer is allocated to pass the corresponding hypercall parameter.
After the SOS uses the bdf to pass the hypercall paremeter, we can remove the code
that gets the bdf by using copy_from_gpa.

V1->V2: Add some comments for hcall_assign_ptdev/hcall_deassign_ptdev.

Tracked-on: #1751
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-08 14:36:46 +08:00
Li, Fei1
605738fc0c hv: hypercall: remove hcall_set_vm_memory_region
Since it's discarded.

Tracked-On: #1124
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-08 13:04:27 +08:00
Shiqing Gao
b430b00a08 hv: fix 'Expression is not Boolean'
MISRA-C requires that the controlling expression of an if statement or
an iteration-statement shall be Boolean type.

v1 -> v2:
* update the U suffix of constant to let the type of operands
  to bit operations (&) is the same.
* update the type of 'i' from uint64_t to uint16_t in
  'profiling_set_control' since it is limited by phys_cpu_num,
  which is uint16_t.

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-08 13:04:11 +08:00
Li, Fei1
121454c4bd hv: fix a minor bug of static checks
When a macro is expanded, the two tokens on either side of each ‘##’ operator
are combined into a single token, which then replaces the ‘##’ and the two
original tokens in the macro expansion. So we need use CAT__ to expand the
__LINE__ MACRO and use CAT_ to combine the expaneded MACRO.

Tracked-on: #1750
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-11-08 09:26:56 +08:00
Binbin Wu
0800624fe5 hv: vtd: use pre-defined function for bdf calculation
Use pre-defined inline function for pci bus/slot/function calculation.

Tracked-on: #1747
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-08 09:12:30 +08:00
Binbin Wu
039a1c0f2e hv: pci: replace fucntion like macro with inline func
Replace fucntion like macro with inline function.

Tracked-on: #1747
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-08 09:12:30 +08:00
Mingqiang Chi
ef974d1adf hv:Remove atomic operation to set initial value for 'created_vcpu'
It is not necessary to use atomic operation to
set the initial value for 'created_vcpu' in vm structure.

Tracked-On: #861
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
2018-11-07 15:58:08 +08:00
Yin Fengwei
0fc47b5a7c hv: fix release build issue
The old doc update commit changed the code by accident and broke
release version build. This patch fix the release build issue.

Tracked-On: #1595
Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-07 15:39:01 +08:00
Tw
a8a1e22981 hv:vtd: fix minor bug in domain count
domain count should be CONFIG_MAX_VM_NUM+1 instead of CONFIG_MAX_IOMMU_NUM+1

Tracked-On: #861
Signed-off-by: Tw <wei.tan@intel.com>
Reviewed-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-07 15:36:12 +08:00
Shiqing Gao
366042cac2 hv: fix integer violations
- Fix the integer violations related to the following rules:
  1. The operands to shift operations (<<, >>) shall be unsigned
     integers.
  2. The operands to bit operations (&, |, ~) shall be unsigned
     integers.

- Replace 12U with CPU_PAGE_SHIFT when it is address shift case.

v1 -> v2:
 * use existed MACRO to get bus/slot/func values
 * update PCI_SLOT MACRO to make it more straightforward
 * remove the incorrect replacement of 12U with CPU_PAGE_SHIFT
   dmar_fault_msi_write

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-06 16:18:56 +08:00
Huihuang Shi
a2516ecc85 fix "Casting operation to a pointer"
The print_param struct's member emit who is used for callback,
the forth parameter of it is used for transmit the private data
of the "print_param".

The type translation between "void *" and private date broke the
violations.

Use the same type to fix it out.

Tracked-On: #861
Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Xu Anthony <anthony.xu@intel.com>
2018-11-06 13:37:33 +08:00
Manisha Chinthapally
ee918f8533 HV:debug:profiling Fixed inappropriate condition check
Fixed the condition to be able to collect MSR sample data
Also populating addition information to help identifity appropriate data

Tracked-On: #1693
Signed-off-by: Manisha Chinthapally <manisha.chinthapally@intel.com>
2018-11-06 09:19:33 +08:00
Yin Fengwei
7f57a74fe7 hypercall doc: Sync the comments for each hypercall from .h to .c
For all the hypercalls, we sync the comments from .h to .c as
comments in .h file are used in architectural design and the
comments in .c are used in module design.

Tracked-On: #1595
Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
2018-11-06 09:12:40 +08:00
Xiangyang Wu
99586e32cc HV:treewide:rename vm data structure
For data structure types "struct vm", its name is identical
with variable name in the same scope. This is a MISRA C  violation.

Naming convention rule:If the data structure type is used by multi
modules, its corresponding logic resource is exposed to external
components (such as SOS, UOS), and its name meaning is simplistic
(such as vcpu, vm), its name needs prefix "acrn_".

The following udpates are made:
struct vm *vm-->struct acrn_vm *vm

Tracked-On: #861

Signed-off-by: Xiangyang Wu <xiangyang.wu@linux.intel.com>
2018-11-05 15:35:49 +08:00
Xiangyang Wu
ace4f48c9a HV:treewide:rename vcpu_arch data structure
For data structure types "struct vcpu_arch", its name
shall follow Naming convention.

Naming convention rule:If the data structure type is
used by multi modules, its corresponding logic resource
is exposed to external components (such as SOS, UOS),
and its name meaning is simplistic (such as vcpu, vm),
its name needs prefix "acrn_". Variable name can be
shortened from its data structure type name.

The following udpates are made:
struct vcpu_arch arch_vcpu-->struct acrn_vcpu_arch arch

Tracked-On: #861

Signed-off-by: Xiangyang Wu <xiangyang.wu@linux.intel.com>
2018-11-05 15:35:49 +08:00
Xiangyang Wu
fa26a16645 HV:treewide:rename vcpu data structure
For data structure types "struct vcpu", its name is identical
with variable name in the same scope. This is a MISRA C  violation.

Naming convention rule:If the data structure type is used by multi
modules, its corresponding logic resource is exposed to external
components (such as SOS, UOS), and its name meaning is simplistic
(such as vcpu, vm), its name needs prefix "acrn_".

The following udpates are made:
struct vcpu *vcpu-->struct acrn_vcpu *vcpu

Tracked-On: #861

Signed-off-by: Xiangyang Wu <xiangyang.wu@linux.intel.com>
2018-11-05 15:35:49 +08:00
Jason Chen CJ
8efd9edb82 hv: vPCI needs to handle reset IO port CF9 differently
Currently vpci treats IO port CF9 as a regular PCI CONFIG_ADDRESS port,
so that SOS can't do system reboot through port CF9.

This patch handles port CF9 in this way:
- SOS (vm0): it is allowed to actually access the physical IO port for byte
  accesses.
- UOS (non-vm0) or partitioning guests: any accesses to port CF9 are
  ignored.

Tracked-On: #1568
Signed-off-by: Zide Chen zide.chen@intel.com
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
2018-11-05 14:42:50 +08:00
Junjie Mao
e0fcb70daa HV: io: add structure and API docs
This patch adds more comments to describe the structures and functions that are
public to the other components in the hypervisor. The comments are in
doxygen-style for document generation.

v2 -> v3:

* Reformat the flow in the doc for vhm_io_request.

v1 -> v2:

* Fix typos and inconsistencies in the comments.
* Wrap the text-based diagram in the doc for vhm_request in @verbatim

Tracked-On: #1595
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
2018-11-04 20:30:38 -08:00
Li, Fei1
a4be10f375 hv: mmu: unmap the trusty EPT when destroy_secure_world
Unmap the trusty EPT mapping when destroy_secure_world. The reason is
now the normal world and trusty will share the PD and PT page. Before
we add the mapping for each world, we should unmap it from another world.
Besides, fix a minor bug for condition priority.

Tracked-On: #861
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2018-11-05 11:27:34 +08:00